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Reel/Frame:	036550/0001			Pages:	983
		Recorded:	09/03/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14793
Page 28 of 148
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Patent #:	7145977	Issue Dt:	12/05/2006	Application #:	10604550	Filing Dt:	07/30/2003
Publication #:	US20050025277	Pub Dt:	02/03/2005
Title:	DIAGNOSTIC METHOD AND APPARATUS FOR NON-DESTRUCTIVELY OBSERVING LATCH DATA

Patent #:	6913968	Issue Dt:	07/05/2005	Application #:	10604565	Filing Dt:	07/30/2003
Publication #:	US20050026363	Pub Dt:	02/03/2005
Title:	METHOD AND STRUCTURE FOR VERTICAL DRAM DEVICES WITH SELF-ALIGNED UPPER TRENCH SHAPING

Patent #:	6833720	Issue Dt:	12/21/2004	Application #:	10604572	Filing Dt:	07/31/2003
Title:	ELECTRICAL DETECTION OF DICING DAMAGE

Patent #:	7359947	Issue Dt:	04/15/2008	Application #:	10604583	Filing Dt:	07/31/2003
Publication #:	US20050027803	Pub Dt:	02/03/2005
Title:	AUTONOMIC E-MAIL PROCESSING SYSTEM AND METHOD

Patent #:	6838355	Issue Dt:	01/04/2005	Application #:	10604602	Filing Dt:	08/04/2003
Title:	DAMASCENE INTERCONNECT STRUCTURES INCLUDING ETCHBACK FOR LOW-K DIELECTRIC MATERIALS

Patent #:	6833603	Issue Dt:	12/21/2004	Application #:	10604696	Filing Dt:	08/11/2003
Title:	DYNAMICALLY PATTERNED SHIELDED HIGH-Q INDUCTOR

Patent #:	6930004	Issue Dt:	08/16/2005	Application #:	10604731	Filing Dt:	08/13/2003
Publication #:	US20050037561	Pub Dt:	02/17/2005
Title:	SELF-ALIGNED DRAIN/CHANNEL JUNCTION IN VERTICAL PASS TRANSISTOR DRAM CELL DESIGN FOR DEVICE SCALING

Patent #:	6897712	Issue Dt:	05/24/2005	Application #:	10604799	Filing Dt:	08/18/2003
Publication #:	US20050040864	Pub Dt:	02/24/2005
Title:	APPARATUS AND METHOD FOR DETECTING LOSS OF HIGH-SPEED SIGNAL

Patent #:	7291568	Issue Dt:	11/06/2007	Application #:	10604905	Filing Dt:	08/26/2003
Publication #:	US20050048705	Pub Dt:	03/03/2005
Title:	METHOD FOR FABRICATING A NITRIDED SILICON-OXIDE GATE DIELECTRIC

Patent #:	6788591	Issue Dt:	09/07/2004	Application #:	10604909	Filing Dt:	08/26/2003
Title:	SYSTEM AND METHOD FOR DIRECT WRITE TO DYNAMIC RANDOM ACCESS MEMORY (DRAM) USING PFET BIT-SWITCH

Patent #:	6831866	Issue Dt:	12/14/2004	Application #:	10604911	Filing Dt:	08/26/2003
Title:	METHOD AND APPARATUS FOR READ BITLINE CLAMPING FOR GAIN CELL DRAM DEVICES

Patent #:	NONE	Issue Dt:		Application #:	10604912	Filing Dt:	08/26/2003
Publication #:	US20050048732	Pub Dt:	03/03/2005
Title:	METHOD TO PRODUCE TRANSISTOR HAVING REDUCED GATE HEIGHT

Patent #:	NONE	Issue Dt:		Application #:	10605100	Filing Dt:	09/09/2003
Publication #:	US20050054169	Pub Dt:	03/10/2005
Title:	A RAISED SOURFCE DRAIN MOSFET WITH NOTCH FORMED ON TOP OF GATE STRUCTURE FILLED WITH A DIELECTRIC PLUG

Patent #:	6921711	Issue Dt:	07/26/2005	Application #:	10605106	Filing Dt:	09/09/2003
Publication #:	US20050051854	Pub Dt:	03/10/2005
Title:	METHOD FOR FORMING METAL REPLACEMENT GATE OF HIGH PERFORMANCE

Patent #:	7410846	Issue Dt:	08/12/2008	Application #:	10605108	Filing Dt:	09/09/2003
Publication #:	US20050054145	Pub Dt:	03/10/2005
Title:	METHOD FOR REDUCED N+ DIFFUSION IN STRAINED SI ON SIGE SUBSTRATE

Patent #:	7275234	Issue Dt:	09/25/2007	Application #:	10605109	Filing Dt:	09/09/2003
Publication #:	US20050055661	Pub Dt:	03/10/2005
Title:	SYSTEM AND METHOD OF AUTOMATICALLY GENERATING KERF DESIGN DATA

Patent #:	6821833	Issue Dt:	11/23/2004	Application #:	10605110	Filing Dt:	09/09/2003
Title:	METHOD FOR SEPARATELY OPTIMIZING THIN GATE DIELECTRIC OF PMOS AND NMOS TRANSISTORS WITHIN THE SAME SEMICONDUCTOR CHIP AND DEVICE MANUFACTURED THEREBY

Patent #:	6908850	Issue Dt:	06/21/2005	Application #:	10605130	Filing Dt:	09/10/2003
Publication #:	US20050055494	Pub Dt:	03/10/2005
Title:	STRUCTURE AND METHOD FOR SILICIDED METAL GATE TRANSISTORS

Patent #:	6906360	Issue Dt:	06/14/2005	Application #:	10605134	Filing Dt:	09/10/2003
Publication #:	US20050051851	Pub Dt:	03/10/2005
Title:	STRUCTURE AND METHOD OF MAKING STRAINED CHANNEL CMOS TRANSISTORS HAVING LATTICE-MISMATCHED EPITAXIAL EXTENSION AND SOURCE AND DRAIN REGIONS

Patent #:	6890808	Issue Dt:	05/10/2005	Application #:	10605135	Filing Dt:	09/10/2003
Publication #:	US20050054148	Pub Dt:	03/10/2005
Title:	METHOD AND STRUCTURE FOR IMPROVED MOSFETS USING POLY/SILICIDE GATE HEIGHT CONTROL

Patent #:	6887751	Issue Dt:	05/03/2005	Application #:	10605167	Filing Dt:	09/12/2003
Publication #:	US20050059201	Pub Dt:	03/17/2005
Title:	MOSFET PERFORMANCE IMPROVEMENT USING DEFORMATION IN SOI STRUCTURE

Patent #:	7029966	Issue Dt:	04/18/2006	Application #:	10605261	Filing Dt:	09/18/2003
Publication #:	US20050064690	Pub Dt:	03/24/2005
Title:	PROCESS OPTIONS OF FORMING SILICIDED METAL GATES FOR ADVANCED CMOS DEVICES

Patent #:	6869866	Issue Dt:	03/22/2005	Application #:	10605310	Filing Dt:	09/22/2003
Publication #:	US20050064687	Pub Dt:	03/24/2005
Title:	SILICIDE PROXIMITY STRUCTURES FOR CMOS DEVICE PERFORMANCE IMPROVEMENTS

Patent #:	6991979	Issue Dt:	01/31/2006	Application #:	10605311	Filing Dt:	09/22/2003
Publication #:	US20050064635	Pub Dt:	03/24/2005
Title:	METHOD FOR AVOIDING OXIDE UNDERCUT DURING PRE-SILICIDE CLEAN FOR THIN SPACER FETS

Patent #:	6838347	Issue Dt:	01/04/2005	Application #:	10605331	Filing Dt:	09/23/2003
Title:	METHOD FOR REDUCING LINE EDGE ROUGHNESS OF OXIDE MATERIAL USING CHEMICAL OXIDE REMOVAL

Patent #:	NONE	Issue Dt:		Application #:	10605408	Filing Dt:	09/29/2003
Publication #:	US20050070070	Pub Dt:	03/31/2005
Title:	METHOD OF FORMING STRAINED SILICON ON INSULATOR

Patent #:	7112535	Issue Dt:	09/26/2006	Application #:	10605439	Filing Dt:	09/30/2003
Publication #:	US20050070102	Pub Dt:	03/31/2005
Title:	PRECISION POLYSILICON RESISTOR PROCESS

Patent #:	7071532	Issue Dt:	07/04/2006	Application #:	10605440	Filing Dt:	09/30/2003
Publication #:	US20050067673	Pub Dt:	03/31/2005
Title:	ADJUSTABLE SELF-ALIGNED AIR GAP DIELECTRIC FOR LOW CAPACITANCE WIRING

Patent #:	6876028	Issue Dt:	04/05/2005	Application #:	10605444	Filing Dt:	09/30/2003
Publication #:	US20050067701	Pub Dt:	03/31/2005
Title:	METAL-INSULATOR-METAL CAPACITOR AND METHOD OF FABRICATION

Patent #:	7138701	Issue Dt:	11/21/2006	Application #:	10605483	Filing Dt:	10/02/2003
Publication #:	US20050073006	Pub Dt:	04/07/2005
Title:	ELECTROSTATIC DISCHARGE PROTECTION NETWORKS FOR TRIPLE WELL SEMICONDUCTOR DEVICES

Patent #:	6879021	Issue Dt:	04/12/2005	Application #:	10605523	Filing Dt:	10/06/2003
Publication #:	US20050073023	Pub Dt:	04/07/2005
Title:	ELECTRONICALLY PROGRAMMABLE ANTIFUSE AND CIRCUITS MADE THEREWITH

Patent #:	6954085	Issue Dt:	10/11/2005	Application #:	10605603	Filing Dt:	10/13/2003
Publication #:	US20050077917	Pub Dt:	04/14/2005
Title:	SYSTEM AND METHOD FOR DYNAMICALLY EXECUTING A FUNCTION IN A PROGRAMMABLE LOGIC ARRAY

Patent #:	6995094	Issue Dt:	02/07/2006	Application #:	10605607	Filing Dt:	10/13/2003
Publication #:	US20050079724	Pub Dt:	04/14/2005
Title:	METHOD FOR DEEP TRENCH ETCHING THROUGH A BURIED INSULATOR LAYER

Patent #:	7127560	Issue Dt:	10/24/2006	Application #:	10605616	Filing Dt:	10/14/2003
Publication #:	US20050080994	Pub Dt:	04/14/2005
Title:	METHOD OF DYNAMICALLY CONTROLLING CACHE SIZE

Patent #:	6876058	Issue Dt:	04/05/2005	Application #:	10605617	Filing Dt:	10/14/2003
Publication #:	US20050077593	Pub Dt:	04/14/2005
Title:	WIRING PROTECTION ELEMENT FOR LASER DELETED TUNGSTEN FUSE

Patent #:	7119403	Issue Dt:	10/10/2006	Application #:	10605672	Filing Dt:	10/16/2003
Publication #:	US20050082634	Pub Dt:	04/21/2005
Title:	HIGH PERFORMANCE STRAINED CMOS DEVICES

Patent #:	6911384	Issue Dt:	06/28/2005	Application #:	10605697	Filing Dt:	10/21/2003
Publication #:	US20040106274	Pub Dt:	06/03/2004
Title:	GATE STRUCTURE WITH INDEPENDENTLY TAILORED VERTICAL DOPING PROFILE

Patent #:	7265850	Issue Dt:	09/04/2007	Application #:	10605751	Filing Dt:	10/23/2003
Publication #:	US20050089775	Pub Dt:	04/28/2005
Title:	FORTIFIED, COMPENSATED AND UNCOMPENSATED PROCESS-SENSITIVE SCATTEROMETRY TARGETS

Patent #:	6875685	Issue Dt:	04/05/2005	Application #:	10605766	Filing Dt:	10/24/2003
Publication #:	US20050087875	Pub Dt:	04/28/2005
Title:	METHOD OF FORMING GAS DIELECTRIC WITH SUPPORT STRUCTURE

Patent #:	7284230	Issue Dt:	10/16/2007	Application #:	10605849	Filing Dt:	10/30/2003
Publication #:	US20050094863	Pub Dt:	05/05/2005
Title:	SYSTEM FOR SEARCH AND ANALYSIS OF SYSTEMATIC DEFECTS IN INTEGRATED CIRCUITS

Patent #:	7292904	Issue Dt:	11/06/2007	Application #:	10605854	Filing Dt:	10/31/2003
Publication #:	US20050096771	Pub Dt:	05/05/2005
Title:	METHOD FOR SIZING PRODUCTION LOT STARTS WITHIN A LINEAR SYSTEM PROGRAMMING ENVIRONMENT

Patent #:	6861716	Issue Dt:	03/01/2005	Application #:	10605861	Filing Dt:	10/31/2003
Title:	LADDER-TYPE GATE STRUCTURE FOR FOUR-TERMINAL SOI SEMICONDUCTOR DEVICE

Patent #:	7064409	Issue Dt:	06/20/2006	Application #:	10605885	Filing Dt:	11/04/2003
Publication #:	US20050093091	Pub Dt:	05/05/2005
Title:	STRUCTURE AND PROGRAMMING OF LASER FUSE

Patent #:	7067886	Issue Dt:	06/27/2006	Application #:	10605888	Filing Dt:	11/04/2003
Publication #:	US20050093072	Pub Dt:	05/05/2005
Title:	METHOD OF ASSESSING POTENTIAL FOR CHARGING DAMAGE IN SOI DESIGNS AND STRUCTURES FOR ELIMINATING POTENTIAL FOR DAMAGE

Patent #:	7015582	Issue Dt:	03/21/2006	Application #:	10605891	Filing Dt:	11/04/2003
Publication #:	US20040195670	Pub Dt:	10/07/2004
Title:	DUMMY METAL FILL SHAPES FOR IMPROVED RELIABILITY OF HYBRID OXIDE/LOW-K DIELECTRICS

Patent #:	6962843	Issue Dt:	11/08/2005	Application #:	10605905	Filing Dt:	11/05/2003
Publication #:	US20050093074	Pub Dt:	05/05/2005
Title:	METHOD OF FABRICATING A FINFET

Patent #:	7129126	Issue Dt:	10/31/2006	Application #:	10605906	Filing Dt:	11/05/2003
Publication #:	US20050093076	Pub Dt:	05/05/2005
Title:	METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES

Patent #:	7153776	Issue Dt:	12/26/2006	Application #:	10605926	Filing Dt:	11/06/2003
Publication #:	US20040099954	Pub Dt:	05/27/2004
Title:	METHOD FOR REDUCING AMINE BASED CONTAMINANTS

Patent #:	7089129	Issue Dt:	08/08/2006	Application #:	10605990	Filing Dt:	11/12/2003
Publication #:	US20050102117	Pub Dt:	05/12/2005
Title:	ELECTROMIGRATION CHECK OF SIGNAL NETS USING NET CAPACITANCE TO EVALUATE THERMAL CHARACTERISTICS

Patent #:	6879448	Issue Dt:	04/12/2005	Application #:	10609237	Filing Dt:	06/26/2003
Publication #:	US20040264007	Pub Dt:	12/30/2004
Title:	APPARATUS FOR ACHROMATIZING OPTICAL BEAMS

Patent #:	6888224	Issue Dt:	05/03/2005	Application #:	10609784	Filing Dt:	06/30/2003
Title:	METHODS AND SYSTEMS FOR FABRICATING ELECTRICAL CONNECTIONS TO SEMICONDUCTOR STRUCTURES INCORPORATING LOW-K DIELECTRIC MATERIALS

Patent #:	6858530	Issue Dt:	02/22/2005	Application #:	10609789	Filing Dt:	06/30/2003
Publication #:	US20040089952	Pub Dt:	05/13/2004
Title:	STRUCTURE AND METHOD FOR CHARGE SENSITIVE ELECTRICAL DEVICES

Patent #:	6837777	Issue Dt:	01/04/2005	Application #:	10610098	Filing Dt:	06/30/2003
Publication #:	US20040000326	Pub Dt:	01/01/2004
Title:	WAFER EDGE CLEANING UTILIZING POLISH PAD MATERIAL

Patent #:	7169226	Issue Dt:	01/30/2007	Application #:	10610612	Filing Dt:	07/01/2003
Publication #:	US20050003229	Pub Dt:	01/06/2005
Title:	DEFECT REDUCTION BY OXIDATION OF SILICON

Patent #:	NONE	Issue Dt:		Application #:	10610636	Filing Dt:	07/01/2003
Publication #:	US20040018729	Pub Dt:	01/29/2004
Title:	Enhanced interface thermoelectric coolers with all-metal tips

Patent #:	6815749	Issue Dt:	11/09/2004	Application #:	10614961	Filing Dt:	07/08/2003
Title:	BACKSIDE BURIED STRAP FOR SOI DRAM TRENCH CAPACITOR

Patent #:	6922085	Issue Dt:	07/26/2005	Application #:	10616012	Filing Dt:	07/08/2003
Publication #:	US20040051565	Pub Dt:	03/18/2004
Title:	COMPARATOR AND METHOD FOR DETECTING A SIGNAL USING A REFERENCE DERIVED FROM A DIFFERENTIAL DATA SIGNAL PAIR

Patent #:	7235148	Issue Dt:	06/26/2007	Application #:	10616341	Filing Dt:	07/09/2003
Publication #:	US20040007313	Pub Dt:	01/15/2004
Title:	SELECTIVELY ROUGHENING CONDUCTORS FOR HIGH FREQUENCY PRINTED WIRING BOARDS

Patent #:	6901003	Issue Dt:	05/31/2005	Application #:	10616847	Filing Dt:	07/10/2003
Publication #:	US20050007813	Pub Dt:	01/13/2005
Title:	LOWER POWER AND REDUCED DEVICE SPLIT LOCAL AND CONTINUOUS BITLINE FOR DOMINO READ SRAMS

Patent #:	8024126	Issue Dt:	09/20/2011	Application #:	10616880	Filing Dt:	07/10/2003
Publication #:	US20050009095	Pub Dt:	01/13/2005
Title:	MOMENT ANALYSIS OF TERTIARY PROTEIN STRUCTURES

Patent #:	6875661	Issue Dt:	04/05/2005	Application #:	10617118	Filing Dt:	07/10/2003
Publication #:	US20050009229	Pub Dt:	01/13/2005
Title:	SOLUTION DEPOSITION OF CHALCOGENIDE FILMS

Patent #:	7533325	Issue Dt:	05/12/2009	Application #:	10619641	Filing Dt:	07/14/2003
Publication #:	US20050015656	Pub Dt:	01/20/2005
Title:	ANAMORPHIC CODES

Patent #:	7254754	Issue Dt:	08/07/2007	Application #:	10619648	Filing Dt:	07/14/2003
Publication #:	US20050015700	Pub Dt:	01/20/2005
Title:	RAID 3 + 3

Patent #:	7281177	Issue Dt:	10/09/2007	Application #:	10619649	Filing Dt:	07/14/2003
Publication #:	US20050015694	Pub Dt:	01/20/2005
Title:	AUTONOMIC PARITY EXCHANGE

Patent #:	7437593	Issue Dt:	10/14/2008	Application #:	10619816	Filing Dt:	07/14/2003
Publication #:	US20050015664	Pub Dt:	01/20/2005
Title:	APPARATUS, SYSTEM, AND METHOD FOR MANAGING ERRORS IN PREFETCHED DATA

Patent #:	7294879	Issue Dt:	11/13/2007	Application #:	10622477	Filing Dt:	07/18/2003
Publication #:	US20060163631	Pub Dt:	07/27/2006
Title:	VERTICAL MOSFET WITH DUAL WORK FUNCTION MATERIALS

Patent #:	7173605	Issue Dt:	02/06/2007	Application #:	10622656	Filing Dt:	07/18/2003
Publication #:	US20050012721	Pub Dt:	01/20/2005
Title:	METHOD AND APPARATUS FOR PROVIDING PROJECTED USER INTERFACE FOR COMPUTING DEVICE

Patent #:	6908815	Issue Dt:	06/21/2005	Application #:	10624781	Filing Dt:	07/22/2003
Publication #:	US20040108555	Pub Dt:	06/10/2004
Title:	DUAL WORK FUNCTION SEMICONDUCTOR STRUCTURE WITH BORDERLESS CONTACT AND METHOD OF FABRICATING THE SAME

Patent #:	7138326	Issue Dt:	11/21/2006	Application #:	10625635	Filing Dt:	07/23/2003
Publication #:	US20040135233	Pub Dt:	07/15/2004
Title:	WAFER INTEGRATED RIGID SUPPORT RING

Patent #:	6803660	Issue Dt:	10/12/2004	Application #:	10627790	Filing Dt:	07/25/2003
Title:	PATTERNING LAYERS COMPRISED OF SPIN-ON CERAMIC FILMS

Patent #:	7071539	Issue Dt:	07/04/2006	Application #:	10628925	Filing Dt:	07/28/2003
Publication #:	US20050023689	Pub Dt:	02/03/2005
Title:	CHEMICAL PLANARIZATION PERFORMANCE FOR COPPER/LOW-K INTERCONNECT STRUCTURES

Patent #:	6967377	Issue Dt:	11/22/2005	Application #:	10629014	Filing Dt:	07/29/2003
Publication #:	US20040023460	Pub Dt:	02/05/2004
Title:	DOUBLE-GATE FET WITH PLANARIZED SURFACES AND SELF-ALIGNED SILICIDES

Patent #:	6989607	Issue Dt:	01/24/2006	Application #:	10629469	Filing Dt:	07/29/2003
Publication #:	US20040021205	Pub Dt:	02/05/2004
Title:	STRESS REDUCTION IN FLIP-CHIP PBGA PACKAGING BY UTILIZING SEGMENTED CHIPS AND/OR CHIP CARRIERS

Patent #:	7225376	Issue Dt:	05/29/2007	Application #:	10630957	Filing Dt:	07/30/2003
Publication #:	US20040064771	Pub Dt:	04/01/2004
Title:	METHOD AND SYSTEM FOR CODING TEST PATTERN FOR SCAN DESIGN

Patent #:	7128472	Issue Dt:	10/31/2006	Application #:	10631933	Filing Dt:	07/31/2003
Publication #:	US20050025434	Pub Dt:	02/03/2005
Title:	METHOD AND APPARATUS FOR PROVIDING OPTOELECTRONIC COMMUNICATION WITH AN ELECTRONIC DEVICE

Patent #:	7055119	Issue Dt:	05/30/2006	Application #:	10632183	Filing Dt:	07/31/2003
Publication #:	US20050028130	Pub Dt:	02/03/2005
Title:	CUSTOMIZED MESH PLANE, METHOD AND COMPUTER PROGRAM PRODUCT FOR CREATING CUSTOMIZED MESH PLANES WITHIN ELECTRONIC PACKAGES

Patent #:	7045372	Issue Dt:	05/16/2006	Application #:	10632652	Filing Dt:	08/02/2003
Publication #:	US20040021201	Pub Dt:	02/05/2004
Title:	APPARATUS AND METHOD FOR FORMING A BATTERY IN AN INTEGRATED CIRCUIT

Patent #:	6939791	Issue Dt:	09/06/2005	Application #:	10632653	Filing Dt:	08/02/2003
Publication #:	US20040021226	Pub Dt:	02/05/2004
Title:	CONTACT CAPPING LOCAL INTERCONNECT

Patent #:	7223517	Issue Dt:	05/29/2007	Application #:	10634667	Filing Dt:	08/05/2003
Publication #:	US20050031964	Pub Dt:	02/10/2005
Title:	LITHOGRAPHIC ANTIREFLECTIVE HARDMASK COMPOSITIONS AND USES THEREOF

Patent #:	6862799	Issue Dt:	03/08/2005	Application #:	10636110	Filing Dt:	08/07/2003
Publication #:	US20040027232	Pub Dt:	02/12/2004
Title:	METHOD FOR CHANGING AN ELECTRICAL RESISTANCE OF A RESISTOR

Patent #:	7305583	Issue Dt:	12/04/2007	Application #:	10637329	Filing Dt:	08/08/2003
Publication #:	US20050034018	Pub Dt:	02/10/2005
Title:	COMMAND INITIATED LOGICAL DUMPING FACILITY

Patent #:	7018873	Issue Dt:	03/28/2006	Application #:	10639942	Filing Dt:	08/13/2003
Publication #:	US20050037582	Pub Dt:	02/17/2005
Title:	A METHOD OF MAKING A DEVICE THRESHOLD CONTROL OF FRONT-GATE SILICON-ON-INSULATOR MOSFET USING A SELF-ALIGNED BACK-GATE

Patent #:	7060624	Issue Dt:	06/13/2006	Application #:	10639989	Filing Dt:	08/13/2003
Publication #:	US20050037608	Pub Dt:	02/17/2005
Title:	DEEP FILLED VIAS

Patent #:	6969436	Issue Dt:	11/29/2005	Application #:	10640484	Filing Dt:	08/13/2003
Publication #:	US20040084137	Pub Dt:	05/06/2004
Title:	METHOD AND STRUCTURE FOR PRODUCING Z-AXIS INTERCONNECTION ASSEMBLY OF PRINTED WIRING BOARD ELEMENTS

Patent #:	7075153	Issue Dt:	07/11/2006	Application #:	10640807	Filing Dt:	08/14/2003
Publication #:	US20040048425	Pub Dt:	03/11/2004
Title:	GROUNDED BODY SOI SRAM CELL

Patent #:	6791855	Issue Dt:	09/14/2004	Application #:	10641753	Filing Dt:	08/14/2003
Publication #:	US20040052134	Pub Dt:	03/18/2004
Title:	REDUNDANT ARRAY ARCHITECTURE FOR WORD REPLACEMENT IN CAM

Patent #:	8214169	Issue Dt:	07/03/2012	Application #:	10643193	Filing Dt:	08/18/2003
Publication #:	US20050043908	Pub Dt:	02/24/2005
Title:	CIRCUITS AND METHODS FOR CHARACTERIZING RANDOM VARIATIONS IN DEVICE CHARACTERISTICS IN SEMICONDUCTOR INTEGRATED CIRCUITS

Patent #:	6964908	Issue Dt:	11/15/2005	Application #:	10643307	Filing Dt:	08/19/2003
Publication #:	US20050042835	Pub Dt:	02/24/2005
Title:	METAL-INSULATOR-METAL CAPACITOR AND METHOD OF FABRICATING SAME

Patent #:	6943097	Issue Dt:	09/13/2005	Application #:	10643534	Filing Dt:	08/19/2003
Publication #:	US20050042865	Pub Dt:	02/24/2005
Title:	ATOMIC LAYER DEPOSITION OF METALLIC CONTACTS, GATES AND DIFFUSION BARRIERS

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Title:	METHOD OF REDUCING LEAKAGE CURRENT IN SUB ONE VOLT SOI CIRCUITS

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Publication #:	US20040150096	Pub Dt:	08/05/2004
Title:	Capping coating for 3D integration applications

Patent #:	6815277	Issue Dt:	11/09/2004	Application #:	10645063	Filing Dt:	08/21/2003
Publication #:	US20040038464	Pub Dt:	02/26/2004
Title:	MULTIPLE-PLANE FINFET CMOS

Patent #:	6987689	Issue Dt:	01/17/2006	Application #:	10645240	Filing Dt:	08/20/2003
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Title:	NON-VOLATILE MULTI-STABLE MEMORY DEVICE AND METHODS OF MAKING AND USING THE SAME

Patent #:	7964237	Issue Dt:	06/21/2011	Application #:	10645384	Filing Dt:	08/21/2003
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Title:	FULLY AUTOMATED PASTE DISPENSE PROCESS FOR DISPENSING SMALL DOTS AND LINES

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Title:	ANTIREFLECTIVE HARDMASK AND USES THEREOF

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Title:	ULTRA-THIN SILICON-ON-INSULATOR AND STRAINED-SILICON-DIRECT-ON-INSULATOR WITH HYBRID CRYSTAL ORIENTATIONS

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Title:	METHODS AND SYSTEMS FOR MODEL-BASED MANAGEMENT USING ABSTRACT MODELS

Patent #:	6984846	Issue Dt:	01/10/2006	Application #:	10648346	Filing Dt:	08/27/2003
Publication #:	US20050045872	Pub Dt:	03/03/2005
Title:	GRADIOMETER-BASED FLUX QUBIT FOR QUANTUM COMPUTING AND METHOD THEREFOR

Patent #:	7081673	Issue Dt:	07/25/2006	Application #:	10648884	Filing Dt:	08/27/2003
Publication #:	US20040207084	Pub Dt:	10/21/2004
Title:	MULTILAYERED CAP BARRIER IN MICROELECTRONIC INTERCONNECT STRUCTURES

100

Patent #:	6920061	Issue Dt:	07/19/2005	Application #:	10649200	Filing Dt:	08/27/2003
Publication #:	US20050047196	Pub Dt:	03/03/2005
Title:	LOADLESS NMOS FOUR TRANSISTOR DYNAMIC DUAL VT SRAM CELL

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

06/29/2015

Assignee

GLOBALFOUNDRIES U.S. 2 LLC

2070 ROUTE 52

HOPEWELL JUNCTION, NEW YORK 12533

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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