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Patent #:
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Issue Dt:
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07/05/2005
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Application #:
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10650229
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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ULTRA THIN CHANNEL MOSFET
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Patent #:
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Issue Dt:
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04/27/2010
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Application #:
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10650878
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR COMPUTER COMMUNICATION USING AUDIO SIGNALS
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Patent #:
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Issue Dt:
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10/31/2006
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Application #:
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10651150
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
Title:
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SIMULATION MANAGEMENT SYSTEM
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10651151
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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ELECTRONIC CIRCUIT DESIGN ANALYSIS SYSTEM
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Patent #:
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Issue Dt:
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07/01/2008
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Application #:
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10651186
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Filing Dt:
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08/28/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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METHOD, SYSTEM AND PROGRAM PRODUCT PROVIDING A CONFIGURATION SPECIFICATION LANGUAGE HAVING CLONE LATCH SUPPORT
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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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10651874
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
Title:
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PARTIAL GOOD INTEGRATED CIRCUIT AND METHOD OF TESTING SAME
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Patent #:
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Issue Dt:
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02/15/2005
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Application #:
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10652400
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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ULTRA HIGH-SPEED SI/SIGE MODULATION-DOPED FIELD EFFECT TRANSISTORS ON ULTRA THIN SOI/SGOI SUBSTRATE
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10652534
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Filing Dt:
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08/29/2003
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Publication #:
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Pub Dt:
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02/26/2004
| | | | |
Title:
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HIGH IMPEDANCE ANTIFUSE
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Patent #:
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Issue Dt:
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01/11/2005
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Application #:
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10653295
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Filing Dt:
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09/03/2003
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Publication #:
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Pub Dt:
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04/29/2004
| | | | |
Title:
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STRUCTURE HAVING EMBEDDED FLUSH CIRCUITRY FEATURES AND METHOD OF FABRICATING
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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10653476
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Filing Dt:
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09/02/2003
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Publication #:
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Pub Dt:
|
03/03/2005
| | | | |
Title:
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METHOD FOR PRODUCING SELF-ALIGNED MASK, ARTICLES PRODUCED BY SAME AND COMPOSITION FOR SAME
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Patent #:
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Issue Dt:
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01/10/2006
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Application #:
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10653912
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Filing Dt:
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09/04/2003
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Publication #:
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Pub Dt:
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03/04/2004
| | | | |
Title:
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BETA CONTROL USING A RAPID THERMAL OXIDATION
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Patent #:
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Issue Dt:
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09/06/2005
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Application #:
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10653925
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Filing Dt:
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09/04/2003
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Publication #:
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Pub Dt:
|
03/25/2004
| | | | |
Title:
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DISCONTINUOUS DIELECTRIC INTERFACE FOR BIPOLAR TRANSISTORS
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Patent #:
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Issue Dt:
|
10/12/2004
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Application #:
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10654231
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Filing Dt:
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09/03/2003
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Title:
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METHOD OF MEASURING CRYSTAL DEFECTS IN THIN SI/SIGE BILAYERS
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Patent #:
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Issue Dt:
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01/24/2006
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Application #:
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10654232
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Filing Dt:
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09/03/2003
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Publication #:
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Pub Dt:
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03/03/2005
| | | | |
Title:
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USE OF THIN SOI TO INHIBIT RELAXATION OF SIGE LAYERS
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Patent #:
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Issue Dt:
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08/29/2006
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Application #:
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10656596
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Filing Dt:
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09/05/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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SINGLE CYCLE READ/WRITE/WRITEBACK PIPELINE, FULL-WORDLINE I/O DRAM ARCHITECTURE WITH ENHANCED WRITE AND SINGLE ENDED SENSING
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Patent #:
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Issue Dt:
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05/15/2007
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10657093
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
Title:
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SELF ASSEMBLED NANO-DEVICES USING DNA
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Patent #:
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Issue Dt:
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11/23/2004
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Application #:
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10657168
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
|
03/11/2004
| | | | |
Title:
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RADIATION SENSITIVE SILICON-CONTAINING NEGATIVE RESISTS AND USE THEREOF
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Patent #:
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Issue Dt:
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07/22/2008
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Application #:
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10657483
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Filing Dt:
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09/08/2003
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Publication #:
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Pub Dt:
|
03/18/2004
| | | | |
Title:
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METHOD AND STRUCTURE FOR PRODUCING Z-AXIS INTERCONNECTION ASSEMBLY OF PRINTED WIRING BOARD ELEMENTS
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Patent #:
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Issue Dt:
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02/22/2005
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Application #:
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10657665
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Filing Dt:
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09/08/2003
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Publication #:
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Pub Dt:
|
03/18/2004
| | | | |
Title:
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ATTENUATED EMBEDDED PHASE SHIFT PHOTOMASK BLANKS
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Patent #:
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Issue Dt:
|
08/09/2005
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Application #:
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10658036
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
|
02/17/2005
| | | | |
Title:
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METAL-INSULATOR-METAL CAPACITOR
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Patent #:
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Issue Dt:
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11/27/2007
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Application #:
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10658859
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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PRESSURIZED OXYGEN FOR EVALUATION OF MOLDING COMPOUND STABILITY IN SEMICONDUCTOR PACKAGING
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Patent #:
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Issue Dt:
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08/09/2005
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Application #:
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10658940
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Filing Dt:
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09/09/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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SELF-TEST ARCHITECTURE TO IMPLEMENT DATA COLUMN REDUNDANCY IN A RAM
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Patent #:
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Issue Dt:
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04/25/2006
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Application #:
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10659778
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Filing Dt:
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09/10/2003
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Publication #:
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Pub Dt:
|
04/01/2004
| | | | |
Title:
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DUAL DAMASCENE INTERCONNECT STRUCTURE USING LOW STRESS FLUOROSILICATE INSULATOR WITH COPPER CONDUCTORS
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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10659950
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
|
03/11/2004
| | | | |
Title:
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POLYSILICON BACK-GATED SOI MOSFET FOR DYNAMIC THRESHOLD VOLTAGE CONTROL
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Patent #:
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Issue Dt:
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11/21/2006
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Application #:
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10660048
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
|
03/10/2005
| | | | |
Title:
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SILICON GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTOR WITH CARBON INCORPORATION
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Patent #:
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Issue Dt:
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07/06/2004
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Application #:
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10660261
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
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03/25/2004
| | | | |
Title:
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SEMICONDUCTOR CHIP MODULE AND METHOD OF MANUFACTURE OF SAME
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10660364
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
|
08/05/2004
| | | | |
Title:
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Ion gun deposition and alignment for liquid-crystal applications
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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10660477
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR REPAIR OF REFLECTIVE PHOTOMASKS
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10660755
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
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03/11/2004
| | | | |
Title:
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INTRALEVEL DECOUPLING CAPACITOR, METHOD OF MANUFACTURE AND TESTING CIRCUIT OF THE SAME
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10661041
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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TECHNIQUES FOR PATTERNING FEATURES IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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10661050
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Filing Dt:
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09/11/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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PROGRAMMABLE LOW-POWER HIGH-FREQUENCY DIVIDER
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Patent #:
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Issue Dt:
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04/18/2006
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Application #:
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10661299
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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COOLING SYSTEM FOR A SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME
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Patent #:
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NONE
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Issue Dt:
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Application #:
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10661328
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
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03/18/2004
| | | | |
Title:
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Semiconductor recessed mask interconnect technology
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Patent #:
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Issue Dt:
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06/27/2006
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Application #:
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10662022
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Filing Dt:
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09/12/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
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STRUCTURES WITH IMPROVED INTERFACIAL STRENGTH OF SICOH DIELECTRICS AND METHOD FOR PREPARING THE SAME
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Patent #:
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Issue Dt:
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07/11/2006
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Application #:
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10662709
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Filing Dt:
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09/15/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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METHOD OF FABRICATING A CONNECTION DEVICE
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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10662900
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Filing Dt:
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09/15/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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REDUCTION OF SILICIDE FORMATION TEMPERATURE ON SIGE CONTAINING SUBSTRATES
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Patent #:
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Issue Dt:
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09/26/2006
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Application #:
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10663020
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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11/24/2005
| | | | |
Title:
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METHOD FOR VLSI SYSTEM DEBUG AND TIMING ANALYSIS
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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10663471
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Filing Dt:
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09/15/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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SELF-ALIGNED PLANAR DOUBLE-GATE PROCESS BY SELF-ALIGNED OXIDATION
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Patent #:
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Issue Dt:
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09/27/2005
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Application #:
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10663553
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Filing Dt:
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09/16/2003
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Publication #:
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Pub Dt:
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03/17/2005
| | | | |
Title:
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NEGATIVE RESIST COMPOSITION WITH FLUOROSULFONAMIDE-CONTAINING POLYMER
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Patent #:
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Issue Dt:
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12/25/2007
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Application #:
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10663907
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Filing Dt:
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09/17/2003
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Publication #:
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Pub Dt:
|
03/17/2005
| | | | |
Title:
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DIAGNOSIS OF EQUIPMENT FAILURES USING AN INTEGRATED APPROACH OF CASE BASED REASONING AND RELIABILITY ANALYSIS
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Patent #:
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Issue Dt:
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04/21/2009
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Application #:
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10664073
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Filing Dt:
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09/17/2003
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Publication #:
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Pub Dt:
|
04/01/2004
| | | | |
Title:
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FIB/RIE METHOD FOR IN-LINE CIRCUIT MODIFICATION OF MICROELECTRONIC CHIPS CONTAINING ORGANIC DIELECTRIC
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Patent #:
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Issue Dt:
|
11/30/2004
|
Application #:
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10664714
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Filing Dt:
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09/18/2003
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Title:
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METHOD OF IMPROVING THE QUALITY OF DEFECTIVE SEMICONDUCTOR MATERIAL
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Patent #:
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Issue Dt:
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06/07/2005
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Application #:
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10664996
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Filing Dt:
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09/17/2003
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Publication #:
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Pub Dt:
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05/13/2004
| | | | |
Title:
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MANUFACTURING METHODS FOR PRINTED CIRCUIT BOARDS
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Patent #:
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Issue Dt:
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09/19/2006
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Application #:
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10665092
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Filing Dt:
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09/18/2003
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Publication #:
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Pub Dt:
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03/24/2005
| | | | |
Title:
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SYSTEM AND METHOD FOR INCREMENTAL STATISTICAL TIMING ANALYSIS OF DIGITAL CIRCUITS
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Patent #:
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Issue Dt:
|
10/03/2006
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Application #:
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10665273
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Filing Dt:
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09/18/2003
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Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
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SYSTEM AND METHOD FOR CORRELATED PROCESS PESSIMISM REMOVAL FOR STATIC TIMING ANALYSIS
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10665289
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Filing Dt:
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09/22/2003
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Publication #:
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Pub Dt:
|
03/18/2004
| | | | |
Title:
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METHOD AND SYSTEM FOR GRAPHICS RENDERING USING HARDWARE-EVENT-TRIGGERED EXECUTION OF CAPTURED GRAPHICS HARDWARE INSTRUCTIONS
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Patent #:
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Issue Dt:
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04/19/2005
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Application #:
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10665322
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Filing Dt:
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09/20/2003
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Publication #:
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Pub Dt:
|
04/01/2004
| | | | |
Title:
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PLASMA ENHANCED LINER
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|
Patent #:
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NONE
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Issue Dt:
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Application #:
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10665584
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
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03/24/2005
| | | | |
Title:
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Formation of low resistance via contacts in interconnect structures
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Patent #:
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Issue Dt:
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02/17/2009
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Application #:
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10665700
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
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03/24/2005
| | | | |
Title:
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FAULT TOLERANT MUTUAL EXCLUSION LOCKS FOR SHARED MEMORY SYSTEMS
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Patent #:
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Issue Dt:
|
08/30/2005
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Application #:
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10665713
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
|
04/01/2004
| | | | |
Title:
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STI PULL-DOWN TO CONTROL SIGE FACET GROWTH
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Patent #:
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Issue Dt:
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06/20/2006
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Application #:
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10665798
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Filing Dt:
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09/18/2003
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Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR CHIP-COOLING
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Patent #:
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Issue Dt:
|
11/01/2005
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Application #:
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10665996
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Filing Dt:
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09/18/2003
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Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
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METHOD FOR INTERLAYER AND YIELD BASED OPTICAL PROXIMITY CORRECTION
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Patent #:
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Issue Dt:
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09/23/2008
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Application #:
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10666353
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
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03/24/2005
| | | | |
Title:
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SYSTEM AND METHOD FOR STATISTICAL TIMING ANALYSIS OF DIGITAL CIRCUITS
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Patent #:
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Issue Dt:
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08/01/2006
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Application #:
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10666470
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
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SYSTEM AND METHOD FOR PROBABILISTIC CRITICALITY PREDICTION OF DIGITAL CIRCUITS
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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10666541
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
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WATER AND AQUEOUS BASE SOLUBLE ANTIREFLECTIVE COATING/HARDMASK MATERIALS
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Patent #:
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Issue Dt:
|
04/22/2008
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Application #:
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10666564
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Filing Dt:
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09/19/2003
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Publication #:
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Pub Dt:
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03/24/2005
| | | | |
Title:
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Closed air gap interconnect structure
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Patent #:
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Issue Dt:
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01/17/2006
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Application #:
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10667083
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Filing Dt:
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09/18/2003
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Publication #:
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Pub Dt:
|
03/25/2004
| | | | |
Title:
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GENERATION OF REFINED SWITCHING WINDOWS IN STATIC TIMING ANALYSIS
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Patent #:
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Issue Dt:
|
07/27/2004
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Application #:
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10667308
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Filing Dt:
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09/23/2003
|
Publication #:
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Pub Dt:
|
03/25/2004
| | | | |
Title:
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STRUCTURE AND METHOD OF FORMING BITLINE CONTACTS FOR A VERTICAL DRAM ARRAY USING A LINE BITLINE CONTACT MASK
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Patent #:
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Issue Dt:
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03/29/2005
|
Application #:
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10667603
|
Filing Dt:
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09/23/2003
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Publication #:
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Pub Dt:
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03/24/2005
| | | | |
Title:
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STRAINED SILICON ON RELAXED SIGE FILM WITH UNIFORM MISFIT DISLOCATION DENSITY
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Patent #:
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Issue Dt:
|
03/18/2014
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Application #:
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10668562
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Filing Dt:
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09/23/2003
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Publication #:
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Pub Dt:
|
04/07/2005
| | | | |
Title:
|
METHODS AND APPARATUS FOR SNAPSHOT-BASED EQUALIZATION OF A COMMUNICATIONS CHANNEL
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Patent #:
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Issue Dt:
|
04/26/2005
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Application #:
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10669727
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Filing Dt:
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09/25/2003
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Title:
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FIELD EFFECT TRANSISTOR WITH STRESSED CHANNEL AND METHOD FOR MAKING SAME
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Patent #:
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Issue Dt:
|
02/27/2007
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Application #:
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10669898
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Filing Dt:
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09/24/2003
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Publication #:
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Pub Dt:
|
03/24/2005
| | | | |
Title:
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METHOD AND APPARATUS FOR FABRICATING CMOS FIELD EFFECT TRANSISTORS
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Patent #:
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Issue Dt:
|
01/10/2006
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Application #:
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10669944
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Filing Dt:
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09/24/2003
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Publication #:
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Pub Dt:
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03/24/2005
| | | | |
Title:
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APPARATUS AND METHODS FOR INTEGRALLY PACKAGING OPTOELECTRONIC DEVICES, IC CHIPS AND OPTICAL TRANSMISSION LINES
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Patent #:
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Issue Dt:
|
04/21/2009
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Application #:
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10670823
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Filing Dt:
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09/25/2003
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Publication #:
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Pub Dt:
|
04/28/2005
| | | | |
Title:
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MANAGING A PLURALITY OF PROCESSORS AS DEVICES
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Patent #:
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Issue Dt:
|
06/16/2009
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Application #:
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10670836
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Filing Dt:
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09/25/2003
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Publication #:
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Pub Dt:
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03/31/2005
| | | | |
Title:
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PROCESSOR DEDICATED CODE HANDLING IN A MULTI-PROCESSOR ENVIRONMENT
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Patent #:
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Issue Dt:
|
04/07/2009
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Application #:
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10670841
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Filing Dt:
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09/25/2003
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Publication #:
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Pub Dt:
|
04/14/2005
| | | | |
Title:
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ASYMMETRIC HETEROGENEOUS MULTI-THREADED OPERATING SYSTEM
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Patent #:
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|
Issue Dt:
|
07/18/2006
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Application #:
|
10672500
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Filing Dt:
|
09/26/2003
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Publication #:
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Pub Dt:
|
03/31/2005
| | | | |
Title:
|
METHODS FOR MODELING LATCH TRANSPARENCY
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Patent #:
|
|
Issue Dt:
|
07/18/2006
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Application #:
|
10672631
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Filing Dt:
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09/27/2003
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Publication #:
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Pub Dt:
|
03/31/2005
| | | | |
Title:
|
THIN GERMANIUM OXYNITRIDE GATE DIELECTRIC FOR GERMANIUM-BASED DEVICES
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Patent #:
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Issue Dt:
|
03/08/2005
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Application #:
|
10672940
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Filing Dt:
|
09/26/2003
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Publication #:
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Pub Dt:
|
06/10/2004
| | | | |
Title:
|
DEVICE FOR CONTACTING AND/OR MODIFYING A SURFACE HAVING A CANTILEVER AND A METHOD FOR PRODUCTION OF SAID CANTILEVER
|
|
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Patent #:
|
|
Issue Dt:
|
07/18/2006
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Application #:
|
10673648
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Filing Dt:
|
09/30/2003
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Publication #:
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Pub Dt:
|
04/14/2005
| | | | |
Title:
|
METHOD OF DEPOSITING METAL LAYERS FROM METAL-CARBONYL PRECURSORS
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|
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Patent #:
|
|
Issue Dt:
|
04/08/2008
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Application #:
|
10673801
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Filing Dt:
|
09/29/2003
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Publication #:
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Pub Dt:
|
03/31/2005
| | | | |
Title:
|
SEGMENTED CONTENT ADDRESSABLE MEMORY ARCHITECTURE FOR IMPROVED CYCLE TIME AND REDUCED POWER CONSUMPTION
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|
|
Patent #:
|
|
Issue Dt:
|
12/06/2005
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Application #:
|
10674331
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Filing Dt:
|
09/30/2003
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Publication #:
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|
Pub Dt:
|
03/31/2005
| | | | |
Title:
|
FABRICATION OF SEMICONDUCTOR DIES WITH MICRO-PINS AND STRUCTURES PRODUCED THEREWITH
|
|
|
Patent #:
|
|
Issue Dt:
|
11/23/2004
|
Application #:
|
10674644
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Filing Dt:
|
09/30/2003
|
Title:
|
THREE DIMENSIONAL CMOS INTEGRATED CIRCUITS HAVING DEVICE LAYERS BUILT ON DIFFERENT CRYSTAL ORIENTED WAFERS
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|
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Patent #:
|
|
Issue Dt:
|
04/12/2005
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Application #:
|
10674645
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Filing Dt:
|
09/30/2003
|
Publication #:
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|
Pub Dt:
|
03/31/2005
| | | | |
Title:
|
PRE-ANNEAL OF COSI, TO PREVENT FORMATION OF AMORPHOUS LAYER BETWEEN TI-O-N AND COSI
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
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Application #:
|
10674647
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Filing Dt:
|
09/30/2003
|
Publication #:
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|
Pub Dt:
|
03/31/2005
| | | | |
Title:
|
THIN BURIED OXIDES BY LOW-DOSE OXYGEN IMPLANTATION INTO MODIFIED SILICON
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2009
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Application #:
|
10674648
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Filing Dt:
|
09/30/2003
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Publication #:
|
|
Pub Dt:
|
03/31/2005
| | | | |
Title:
|
SOI BY OXIDATION OF POROUS SILICON
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10674853
|
Filing Dt:
|
09/29/2003
|
Publication #:
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|
Pub Dt:
|
03/31/2005
| | | | |
Title:
|
Atomic laminates for diffusion barrier applications
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2006
|
Application #:
|
10674961
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Filing Dt:
|
09/30/2003
|
Publication #:
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|
Pub Dt:
|
04/15/2004
| | | | |
Title:
|
METHOD OF FILM DEPOSITION, AND FABRICATION OF STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
10675139
|
Filing Dt:
|
09/30/2003
|
Publication #:
|
|
Pub Dt:
|
04/19/2007
| | | | |
Title:
|
SILICON BASED OPTICAL VIAS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/30/2006
|
Application #:
|
10675625
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Filing Dt:
|
09/30/2003
|
Title:
|
FINFET CMOS WITH NVRAM CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2004
|
Application #:
|
10676171
|
Filing Dt:
|
10/01/2003
|
Publication #:
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|
Pub Dt:
|
04/01/2004
| | | | |
Title:
|
METHOD TO FABRICATE SIGE HBTS WITH CONTROLLED CURRENT GAIN AND IMPROVED BREAKDOWN VOLTAGE CHARACTERISTICS
|
|
|
Patent #:
|
|
Issue Dt:
|
10/05/2004
|
Application #:
|
10679058
|
Filing Dt:
|
10/02/2003
|
Publication #:
|
|
Pub Dt:
|
04/01/2004
| | | | |
Title:
|
SYSTEM FOR CONVERTING OPTICAL BEAMS TO COLLIMATED FLAT-TOP BEAMS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/18/2007
|
Application #:
|
10679782
|
Filing Dt:
|
10/06/2003
|
Publication #:
|
|
Pub Dt:
|
04/07/2005
| | | | |
Title:
|
SILICON-CONTAINING COMPOSITIONS FOR SPIN-ON ARC/HARDMASK MATERIALS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2008
|
Application #:
|
10680679
|
Filing Dt:
|
10/07/2003
|
Publication #:
|
|
Pub Dt:
|
04/07/2005
| | | | |
Title:
|
METHOD AND SYSTEM FOR USING STATISTICAL SIGNATURES FOR TESTING HIGH-SPEED CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2005
|
Application #:
|
10680820
|
Filing Dt:
|
10/07/2003
|
Publication #:
|
|
Pub Dt:
|
04/07/2005
| | | | |
Title:
|
SPLIT POLY-SIGE/POLY-SI ALLOY GATE STACK
|
|
|
Patent #:
|
|
Issue Dt:
|
10/18/2005
|
Application #:
|
10681513
|
Filing Dt:
|
10/08/2003
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
Title:
|
TRANSFER MOLDING OF INTEGRATED CIRCUIT PACKAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
10681856
|
Filing Dt:
|
10/08/2003
|
Publication #:
|
|
Pub Dt:
|
04/15/2004
| | | | |
Title:
|
COMPILABLE ADDRESS MAGNITUDE COMPARATOR FOR MEMORY ARRAY SELF-TESTING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/11/2007
|
Application #:
|
10683333
|
Filing Dt:
|
10/10/2003
|
Publication #:
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|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
INTERCONNECT STRUCTURES WITH ENGINEERED DIELECTRICS WITH NANOCOLUMNAR POROSITY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/15/2006
|
Application #:
|
10684952
|
Filing Dt:
|
10/14/2003
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
DUAL DAMASCENE STRUCTURE AND METHOD
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10685012
|
Filing Dt:
|
10/14/2003
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
Photoresist ash process with reduced inter-level dielectric ( ILD) damage
|
|
|
Patent #:
|
|
Issue Dt:
|
09/27/2005
|
Application #:
|
10685013
|
Filing Dt:
|
10/14/2003
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
STRUCTURE FOR AND METHOD OF FABRICATING A HIGH-MOBILITY FIELD-EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/09/2006
|
Application #:
|
10685022
|
Filing Dt:
|
10/14/2003
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
CIRCUIT AND METHOD FOR REDUCING JITTER IN A PLL OF HIGH SPEED SERIAL LINKS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2006
|
Application #:
|
10685261
|
Filing Dt:
|
10/14/2003
|
Publication #:
|
|
Pub Dt:
|
04/22/2004
| | | | |
Title:
|
STRUCTURE AND METHOD FOR IMPROVED ADHESION BETWEEN TWO POLYMER FILMS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10685636
|
Filing Dt:
|
10/15/2003
|
Publication #:
|
|
Pub Dt:
|
04/21/2005
| | | | |
Title:
|
Techniques for layer transfer processing
|
|
|
Patent #:
|
|
Issue Dt:
|
07/19/2005
|
Application #:
|
10685828
|
Filing Dt:
|
10/14/2003
|
Publication #:
|
|
Pub Dt:
|
04/14/2005
| | | | |
Title:
|
SYSTEM AND METHOD FOR READING DATA STORED ON A MAGNETIC SHIFT REGISTER
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10686216
|
Filing Dt:
|
10/15/2003
|
Publication #:
|
|
Pub Dt:
|
04/21/2005
| | | | |
Title:
|
Method and apparatus for forming lateral electrical contacts for photonic crystal devices
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2006
|
Application #:
|
10687294
|
Filing Dt:
|
10/16/2003
|
Publication #:
|
|
Pub Dt:
|
07/22/2004
| | | | |
Title:
|
SINGLE AND MULTILEVEL REWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
09/06/2005
|
Application #:
|
10687333
|
Filing Dt:
|
10/16/2003
|
Publication #:
|
|
Pub Dt:
|
04/29/2004
| | | | |
Title:
|
BODY CONTACT MOSFET
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10688418
|
Filing Dt:
|
10/17/2003
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
Title:
|
Method for testing chips on flat solder bumps
|
|
|
Patent #:
|
|
Issue Dt:
|
10/25/2005
|
Application #:
|
10688508
|
Filing Dt:
|
10/17/2003
|
Publication #:
|
|
Pub Dt:
|
05/06/2004
| | | | |
Title:
|
HIGH-DIELECTRIC CONSTANT INSULATORS FOR FEOL CAPACITORS
|
|