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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 30 of 148
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1
Patent #:
7034362
Issue Dt:
04/25/2006
Application #:
10688692
Filing Dt:
10/17/2003
Publication #:
US20050082531
Pub Dt:
04/21/2005
Title:
DOUBLE SILICON-ON-INSULATOR (SOI) METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) STRUCTURES
2
Patent #:
NONE
Issue Dt:
Application #:
10688744
Filing Dt:
10/17/2003
Publication #:
US20050002223
Pub Dt:
01/06/2005
Title:
Output driver impedance control for addressable memory devices
3
Patent #:
7303949
Issue Dt:
12/04/2007
Application #:
10689506
Filing Dt:
10/20/2003
Publication #:
US20050082616
Pub Dt:
04/21/2005
Title:
HIGH PERFORMANCE STRESS-ENHANCED MOSFETS USING SI:C AND SIGE EPITAXIAL SOURCE/DRAIN AND METHOD OF MANUFACTURE
4
Patent #:
7628974
Issue Dt:
12/08/2009
Application #:
10689675
Filing Dt:
10/22/2003
Publication #:
US20050089467
Pub Dt:
04/28/2005
Title:
CONTROL OF CARBON NANOTUBE DIAMETER USING CVD OR PECVD GROWTH
5
Patent #:
7081676
Issue Dt:
07/25/2006
Application #:
10691299
Filing Dt:
10/22/2003
Publication #:
US20040087160
Pub Dt:
05/06/2004
Title:
Structure for controlling the interface roughness of cobalt disilicide
6
Patent #:
7271699
Issue Dt:
09/18/2007
Application #:
10691881
Filing Dt:
10/23/2003
Publication #:
US20040085181
Pub Dt:
05/06/2004
Title:
CHANGING AN ELECTRICAL RESISTANCE OF A RESISTOR
7
Patent #:
7329446
Issue Dt:
02/12/2008
Application #:
10691882
Filing Dt:
10/23/2003
Publication #:
US20040086741
Pub Dt:
05/06/2004
Title:
DRILL STACK FORMATION
8
Patent #:
6939664
Issue Dt:
09/06/2005
Application #:
10693199
Filing Dt:
10/24/2003
Publication #:
US20050089792
Pub Dt:
04/28/2005
Title:
LOW-ACTIVATION ENERGY SILICON-CONTAINING RESIST SYSTEM
9
Patent #:
7244341
Issue Dt:
07/17/2007
Application #:
10693276
Filing Dt:
10/23/2003
Publication #:
US20040206619
Pub Dt:
10/21/2004
Title:
METHOD TO ACHIEVE LOW AND STABLE FERROMAGNETIC COUPLING FIELD
10
Patent #:
7366342
Issue Dt:
04/29/2008
Application #:
10694299
Filing Dt:
10/27/2003
Publication #:
US20050089211
Pub Dt:
04/28/2005
Title:
SIMULTANEOUS COMPUTATION OF MULTIPLE POINTS ON ONE OR MULTIPLE CUT LINES
11
Patent #:
7055126
Issue Dt:
05/30/2006
Application #:
10694339
Filing Dt:
10/27/2003
Publication #:
US20050091634
Pub Dt:
04/28/2005
Title:
RENESTING INTERACTION MAP INTO DESIGN FOR EFFICIENT LONG RANGE CALCULATIONS
12
Patent #:
7343271
Issue Dt:
03/11/2008
Application #:
10694465
Filing Dt:
10/27/2003
Publication #:
US20050091013
Pub Dt:
04/28/2005
Title:
INCORPORATION OF A PHASE MAP INTO FAST MODEL-BASED OPTICAL PROXIMITY CORRECTION SIMULATION KERNELS TO ACCOUNT FOR NEAR AND MID-RANGE FLARE
13
Patent #:
7010776
Issue Dt:
03/07/2006
Application #:
10694466
Filing Dt:
10/27/2003
Publication #:
US20050091631
Pub Dt:
04/28/2005
Title:
EXTENDING THE RANGE OF LITHOGRAPHIC SIMULATION INTEGRALS
14
Patent #:
7287239
Issue Dt:
10/23/2007
Application #:
10694473
Filing Dt:
10/27/2003
Publication #:
US20050091014
Pub Dt:
04/28/2005
Title:
PERFORMANCE IN MODEL-BASED OPC ENGINE UTILIZING EFFICIENT POLYGON PINNING METHOD
15
Patent #:
7163883
Issue Dt:
01/16/2007
Application #:
10694500
Filing Dt:
10/27/2003
Publication #:
US20040087078
Pub Dt:
05/06/2004
Title:
EDGE SEAL FOR A SEMICONDUCTOR DEVICE
16
Patent #:
7173303
Issue Dt:
02/06/2007
Application #:
10695335
Filing Dt:
10/28/2003
Publication #:
US20040092060
Pub Dt:
05/13/2004
Title:
FIN FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED GATE
17
Patent #:
7247924
Issue Dt:
07/24/2007
Application #:
10695336
Filing Dt:
10/28/2003
Publication #:
US20040084754
Pub Dt:
05/06/2004
Title:
METHOD OF CONTROLLING GRAIN SIZE IN A POLYSILICON LAYER AND IN SEMICONDUCTOR DEVICES HAVING POLYSILICON STRUCTURES
18
Patent #:
8008724
Issue Dt:
08/30/2011
Application #:
10695748
Filing Dt:
10/30/2003
Publication #:
US20050093030
Pub Dt:
05/05/2005
Title:
STRUCTURE AND METHOD TO ENHANCE BOTH NFET AND PFET PERFORMANCE USING DIFFERENT KINDS OF STRESSED LAYERS
19
Patent #:
6977194
Issue Dt:
12/20/2005
Application #:
10695752
Filing Dt:
10/30/2003
Publication #:
US20050093059
Pub Dt:
05/05/2005
Title:
STRUCTURE AND METHOD TO IMPROVE CHANNEL MOBILITY BY GATE ELECTRODE STRESS MODIFICATION
20
Patent #:
6927611
Issue Dt:
08/09/2005
Application #:
10696139
Filing Dt:
10/29/2003
Publication #:
US20050093591
Pub Dt:
05/05/2005
Title:
SEMIDIGITAL DELAY-LOCKED LOOP USING AN ANALOG-BASED FINITE STATE MACHINE
21
Patent #:
7353359
Issue Dt:
04/01/2008
Application #:
10696511
Filing Dt:
10/28/2003
Publication #:
US20050091298
Pub Dt:
04/28/2005
Title:
AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS OF A MATRIX
22
Patent #:
6861158
Issue Dt:
03/01/2005
Application #:
10696601
Filing Dt:
10/29/2003
Publication #:
US20040241460
Pub Dt:
12/02/2004
Title:
FORMATION OF SILICON-GERMANIUM-ON-INSULATOR (SGOI) BY AN INTEGRAL HIGH TEMPERATURE SIMOX-GE INTERDIFFUSION ANNEAL
23
Patent #:
7023055
Issue Dt:
04/04/2006
Application #:
10696634
Filing Dt:
10/29/2003
Publication #:
US20050093104
Pub Dt:
05/05/2005
Title:
CMOS ON HYBRID SUBSTRATE WITH DIFFERENT CRYSTAL ORIENTATIONS USING SILICON-TO-SILICON DIRECT WAFER BONDING
24
Patent #:
7329361
Issue Dt:
02/12/2008
Application #:
10696771
Filing Dt:
10/29/2003
Publication #:
US20050095858
Pub Dt:
05/05/2005
Title:
METHOD AND APPARATUS FOR FABRICATING OR ALTERING MICROSTRUCTURES USING LOCAL CHEMICAL ALTERATIONS
25
Patent #:
NONE
Issue Dt:
Application #:
10697012
Filing Dt:
10/31/2003
Publication #:
US20040092109
Pub Dt:
05/13/2004
Title:
Semiconductor device and method for making the device having an electrically modulated conduction channel
26
Patent #:
7282148
Issue Dt:
10/16/2007
Application #:
10697077
Filing Dt:
10/30/2003
Publication #:
US20050092676
Pub Dt:
05/05/2005
Title:
POROUS SILICON COMPOSITE STRUCTURE AS LARGE FILTRATION ARRAY
27
Patent #:
7754353
Issue Dt:
07/13/2010
Application #:
10697271
Filing Dt:
10/31/2003
Publication #:
US20050095389
Pub Dt:
05/05/2005
Title:
METHOD AND STRUCTURE FOR ULTRA-HIGH DENSITY, HIGH DATA RATE FERROELECTRIC STORAGE DISK TECHNOLOGY USING STABILIZATION BY A SURFACE CONDUCTING LAYER
28
Patent #:
7057216
Issue Dt:
06/06/2006
Application #:
10698122
Filing Dt:
10/31/2003
Publication #:
US20050093021
Pub Dt:
05/05/2005
Title:
HIGH MOBILITY HETEROJUNCTION COMPLEMENTARY FIELD EFFECT TRANSISTORS AND METHODS THEREOF
29
Patent #:
7018916
Issue Dt:
03/28/2006
Application #:
10698483
Filing Dt:
11/03/2003
Publication #:
US20050095837
Pub Dt:
05/05/2005
Title:
STRUCTURE AND METHOD FOR FORMING A DIELECTRIC CHAMBER AND ELECTRONIC DEVICE INCLUDING THE DIELECTRIC CHAMBER
30
Patent #:
7211300
Issue Dt:
05/01/2007
Application #:
10698884
Filing Dt:
10/31/2003
Publication #:
US20040091638
Pub Dt:
05/13/2004
Title:
METHOD AND APPARATUS FOR PERFORMING LASER CVD
31
Patent #:
6943444
Issue Dt:
09/13/2005
Application #:
10699122
Filing Dt:
10/30/2003
Publication #:
US20050092007
Pub Dt:
05/05/2005
Title:
COOLING OF SURFACE TEMPERATURE OF A DEVICE
32
Patent #:
7186446
Issue Dt:
03/06/2007
Application #:
10699226
Filing Dt:
10/31/2003
Publication #:
US20050095443
Pub Dt:
05/05/2005
Title:
PLASMA ENHANCED ALD OF TANTALUM NITRIDE AND BILAYER
33
Patent #:
7187081
Issue Dt:
03/06/2007
Application #:
10699238
Filing Dt:
10/31/2003
Publication #:
US20040147111
Pub Dt:
07/29/2004
Title:
POLYCARBOSILANE BURIED ETCH STOPS IN INTERCONNECT STRUCTURES
34
Patent #:
7496550
Issue Dt:
02/24/2009
Application #:
10699283
Filing Dt:
10/31/2003
Publication #:
US20050096887
Pub Dt:
05/05/2005
Title:
TECHNIQUES FOR RECONSTRUCTING SYNTHETIC NETWORKS USING PAIR-WISE CORRELATION ANALYSIS
35
Patent #:
NONE
Issue Dt:
Application #:
10699399
Filing Dt:
10/30/2003
Publication #:
US20050094706
Pub Dt:
05/05/2005
Title:
Transparent cooling duct
36
Patent #:
7084460
Issue Dt:
08/01/2006
Application #:
10700085
Filing Dt:
11/03/2003
Publication #:
US20050093100
Pub Dt:
05/05/2005
Title:
METHOD FOR FABRICATING SIGE-ON-INSULATOR (SGOI) AND GE-ON-INSULATOR (GOI) SUBSTRATES
37
Patent #:
7449067
Issue Dt:
11/11/2008
Application #:
10700327
Filing Dt:
11/03/2003
Publication #:
US20050106834
Pub Dt:
05/19/2005
Title:
METHOD AND APPARATUS FOR FILLING VIAS
38
Patent #:
7376852
Issue Dt:
05/20/2008
Application #:
10700989
Filing Dt:
11/04/2003
Publication #:
US20050097379
Pub Dt:
05/05/2005
Title:
METHOD FOR CONTROLLING POWER CHANGE FOR A SEMICONDUCTOR MODULE
39
Patent #:
6884672
Issue Dt:
04/26/2005
Application #:
10701191
Filing Dt:
11/04/2003
Publication #:
US20050095831
Pub Dt:
05/05/2005
Title:
METHOD FOR FORMING AN ELECTRONIC DEVICE
40
Patent #:
6919635
Issue Dt:
07/19/2005
Application #:
10701311
Filing Dt:
11/04/2003
Publication #:
US20050093133
Pub Dt:
05/05/2005
Title:
HIGH DENSITY MICROVIA SUBSTRATE WITH HIGH WIREABILITY
41
Patent #:
7015082
Issue Dt:
03/21/2006
Application #:
10701526
Filing Dt:
11/06/2003
Publication #:
US20050098829
Pub Dt:
05/12/2005
Title:
HIGH MOBILITY CMOS CIRCUITS
42
Patent #:
7579069
Issue Dt:
08/25/2009
Application #:
10702280
Filing Dt:
11/06/2003
Publication #:
US20050100743
Pub Dt:
05/12/2005
Title:
NEGATIVE COEFFICIENT OF THERMAL EXPANSION PARTICLES AND METHOD OF FORMING THE SAME
43
Patent #:
NONE
Issue Dt:
Application #:
10702416
Filing Dt:
11/06/2003
Publication #:
US20050098605
Pub Dt:
05/12/2005
Title:
Apparatus and method for low pressure wirebond
44
Patent #:
7951660
Issue Dt:
05/31/2011
Application #:
10703355
Filing Dt:
11/07/2003
Publication #:
US20050098804
Pub Dt:
05/12/2005
Title:
METHODS FOR FABRICATING A METAL-OXIDE-SEMICONDUCTOR DEVICE STRUCTURE
45
Patent #:
6764922
Issue Dt:
07/20/2004
Application #:
10704052
Filing Dt:
11/07/2003
Publication #:
US20040106267
Pub Dt:
06/03/2004
Title:
OXYNITRIDE SHALLOW TRENCH ISOLATION AND METHOD OF FORMATION
46
Patent #:
6831369
Issue Dt:
12/14/2004
Application #:
10705115
Filing Dt:
11/10/2003
Publication #:
US20040104438
Pub Dt:
06/03/2004
Title:
SEMICONDUCTOR STRUCTURE HAVING IN-SITU FORMED UNIT RESISTORS AND METHOD FOR FABRICATION
47
Patent #:
6828232
Issue Dt:
12/07/2004
Application #:
10705116
Filing Dt:
11/10/2003
Publication #:
US20040094843
Pub Dt:
05/20/2004
Title:
SEMICONDUCTOR STRUCTURE HAVING IN-SITU FORMED UNIT RESISTORS AND METHOD FOR FABRICATION
48
Patent #:
7029964
Issue Dt:
04/18/2006
Application #:
10706061
Filing Dt:
11/13/2003
Publication #:
US20050106790
Pub Dt:
05/19/2005
Title:
A METHOD OF MANUFACTURING A STRAINED SILICON ON A SIGE ON SOI SUBSTRATE
49
Patent #:
7007251
Issue Dt:
02/28/2006
Application #:
10706228
Filing Dt:
11/12/2003
Publication #:
US20050102596
Pub Dt:
05/12/2005
Title:
DATABASE MINING SYSTEM AND METHOD FOR COVERAGE ANALYSIS OF FUNCTIONAL VERIFICATION OF INTEGRATED CIRCUIT DESIGNS
50
Patent #:
6865723
Issue Dt:
03/08/2005
Application #:
10706538
Filing Dt:
11/12/2003
Publication #:
US20040098686
Pub Dt:
05/20/2004
Title:
METHOD FOR INSERTION OF TEST POINTS INTO INTEGRATED LOGIC CIRCUIT DESIGNS
51
Patent #:
6939797
Issue Dt:
09/06/2005
Application #:
10706773
Filing Dt:
11/12/2003
Publication #:
US20040173908
Pub Dt:
09/09/2004
Title:
ADVANCED BEOL INTERCONNECT STRUCTURES WITH LOW-K PE CVD CAP LAYER AND METHOD THEREOF
52
Patent #:
6998204
Issue Dt:
02/14/2006
Application #:
10707009
Filing Dt:
11/13/2003
Publication #:
US20050106472
Pub Dt:
05/19/2005
Title:
ALTERNATING PHASE MASK BUILT BY ADDITIVE FILM DEPOSITION
53
Patent #:
7122849
Issue Dt:
10/17/2006
Application #:
10707018
Filing Dt:
11/14/2003
Publication #:
US20050106799
Pub Dt:
05/19/2005
Title:
STRESSED SEMICONDUCTOR DEVICE STRUCTURES HAVING GRANULAR SEMICONDUCTOR MATERIAL
54
Patent #:
7646649
Issue Dt:
01/12/2010
Application #:
10707053
Filing Dt:
11/18/2003
Publication #:
US20050108468
Pub Dt:
05/19/2005
Title:
MEMORY DEVICE WITH PROGRAMMABLE RECEIVERS TO IMPROVE PERFORMANCE
55
Patent #:
7170181
Issue Dt:
01/30/2007
Application #:
10707064
Filing Dt:
11/19/2003
Publication #:
US20050104188
Pub Dt:
05/19/2005
Title:
OPTIMUM PADSET FOR WIRE BONDING RF TECHNOLOGIES WITH HIGH-Q INDUCTORS
56
Patent #:
7129561
Issue Dt:
10/31/2006
Application #:
10707065
Filing Dt:
11/19/2003
Publication #:
US20050104157
Pub Dt:
05/19/2005
Title:
TRI-METAL AND DUAL-METAL STACKED INDUCTORS
57
Patent #:
7089520
Issue Dt:
08/08/2006
Application #:
10707069
Filing Dt:
11/19/2003
Publication #:
US20050108670
Pub Dt:
05/19/2005
Title:
METHODOLOGY FOR PLACEMENT BASED ON CIRCUIT FUNCTION AND LATCHUP SENSITIVITY
58
Patent #:
7115997
Issue Dt:
10/03/2006
Application #:
10707075
Filing Dt:
11/19/2003
Publication #:
US20050104217
Pub Dt:
05/19/2005
Title:
SEEDLESS WIREBOND PAD PLATING
59
Patent #:
7056820
Issue Dt:
06/06/2006
Application #:
10707089
Filing Dt:
11/20/2003
Publication #:
US20050112794
Pub Dt:
05/26/2005
Title:
IMPROVED BOND PAD
60
Patent #:
7098537
Issue Dt:
08/29/2006
Application #:
10707117
Filing Dt:
11/21/2003
Publication #:
US20050110144
Pub Dt:
05/26/2005
Title:
INTERCONNECT STRUCTURE DIFFUSION BARRIER WITH HIGH NITROGEN CONTENT
61
Patent #:
6835117
Issue Dt:
12/28/2004
Application #:
10707120
Filing Dt:
11/21/2003
Title:
ENDPOINT DETECTION IN CHEMICAL-MECHANICAL POLISHING OF PATTERNED WAFERS HAVING A LOW PATTERN DENSITY
62
Patent #:
6940324
Issue Dt:
09/06/2005
Application #:
10707121
Filing Dt:
11/21/2003
Publication #:
US20050110534
Pub Dt:
05/26/2005
Title:
VARIATION OF EFFECTIVE FILTER CAPACITANCE IN PHASE LOCK LOOP CIRCUIT LOOP FILTERS
63
Patent #:
7122462
Issue Dt:
10/17/2006
Application #:
10707122
Filing Dt:
11/21/2003
Publication #:
US20050112864
Pub Dt:
05/26/2005
Title:
BACK END INTERCONNECT WITH A SHAPED INTERFACE
64
Patent #:
NONE
Issue Dt:
Application #:
10707150
Filing Dt:
11/24/2003
Publication #:
US20050112279
Pub Dt:
05/26/2005
Title:
DYNAMIC RELEASE WAFER GRIP AND METHOD OF USE
65
Patent #:
6989322
Issue Dt:
01/24/2006
Application #:
10707175
Filing Dt:
11/25/2003
Publication #:
US20050112857
Pub Dt:
05/26/2005
Title:
METHOD OF FORMING ULTRA-THIN SILICIDATION-STOP EXTENSIONS IN MOSFET DEVICES
66
Patent #:
6946887
Issue Dt:
09/20/2005
Application #:
10707178
Filing Dt:
11/25/2003
Publication #:
US20050110536
Pub Dt:
05/26/2005
Title:
PHASE FREQUENCY DETECTOR WITH PROGRAMMABLE MINIMUM PULSE WIDTH
67
Patent #:
7060546
Issue Dt:
06/13/2006
Application #:
10707200
Filing Dt:
11/26/2003
Publication #:
US20050112811
Pub Dt:
05/26/2005
Title:
ULTRA-THIN SOI MOSFET METHOD AND STRUCTURE
68
Patent #:
NONE
Issue Dt:
Application #:
10707282
Filing Dt:
12/03/2003
Publication #:
US20050127475
Pub Dt:
06/16/2005
Title:
APPARATUS AND METHOD FOR ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE
69
Patent #:
7106164
Issue Dt:
09/12/2006
Application #:
10707283
Filing Dt:
12/03/2003
Publication #:
US20050122204
Pub Dt:
06/09/2005
Title:
APPARATUS AND METHOD FOR ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE
70
Patent #:
7240261
Issue Dt:
07/03/2007
Application #:
10707373
Filing Dt:
12/09/2003
Publication #:
US20050138508
Pub Dt:
06/23/2005
Title:
SCAN CHAIN DIAGNOSTICS USING LOGIC PATHS
71
Patent #:
NONE
Issue Dt:
Application #:
10707388
Filing Dt:
12/10/2003
Publication #:
US20050130383
Pub Dt:
06/16/2005
Title:
SILICIDE RESISTOR IN BEOL LAYER OF SEMICONDUCTOR DEVICE AND METHOD
72
Patent #:
NONE
Issue Dt:
Application #:
10707449
Filing Dt:
12/15/2003
Publication #:
US20040115875
Pub Dt:
06/17/2004
Title:
METHOD AND STRUCTURE FOR FORMING PRECISION MIM FUSIBLE CIRCUIT ELEMENTS USING FUSES AND ANTIFUSES
73
Patent #:
7391620
Issue Dt:
06/24/2008
Application #:
10707479
Filing Dt:
12/17/2003
Publication #:
US20040207989
Pub Dt:
10/21/2004
Title:
SYSTEM FOR IMPROVING POWER DISTRIBUTION CURRENT MEASUREMENT ON PRINTED CIRCUIT BOARDS
74
Patent #:
7247912
Issue Dt:
07/24/2007
Application #:
10707690
Filing Dt:
01/05/2004
Publication #:
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Pub Dt:
07/07/2005
Title:
STRUCTURES AND METHODS FOR MAKING STRAINED MOSFETS
75
Patent #:
7098544
Issue Dt:
08/29/2006
Application #:
10707713
Filing Dt:
01/06/2004
Publication #:
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Pub Dt:
07/07/2005
Title:
EDGE SEAL FOR INTEGRATED CIRCUIT CHIPS
76
Patent #:
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Issue Dt:
10/10/2006
Application #:
10707722
Filing Dt:
01/07/2004
Publication #:
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Pub Dt:
07/14/2005
Title:
TUNABLE SEMICONDUCTOR DIODES
77
Patent #:
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Issue Dt:
06/27/2006
Application #:
10707725
Filing Dt:
01/07/2004
Publication #:
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Pub Dt:
07/07/2005
Title:
METHOD OF MAKING FIELD EFFECT TRANSISTORS HAVING SELF-ALIGNED SOURCE AND DRAIN REGIONS USING INDEPENDENTLY CONTROLLED SPACER WIDTHS
78
Patent #:
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Issue Dt:
07/18/2006
Application #:
10707746
Filing Dt:
01/08/2004
Publication #:
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Pub Dt:
07/14/2005
Title:
Method for integrating thermistor
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Issue Dt:
06/06/2006
Application #:
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Filing Dt:
01/09/2004
Publication #:
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Pub Dt:
07/14/2005
Title:
FET GATE STRUCTURE WITH METAL GATE ELECTRODE AND SILICIDE CONTACT
80
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Issue Dt:
12/13/2005
Application #:
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Filing Dt:
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Publication #:
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Pub Dt:
07/14/2005
Title:
METHOD OF FORMING FET SILICIDE GATE STRUCTURES INCORPORATING INNER SPACERS
81
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Issue Dt:
01/01/2008
Application #:
10707776
Filing Dt:
01/12/2004
Publication #:
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Pub Dt:
07/14/2005
Title:
METHOD AND SYSTEM FOR CREATING, VIEWING, EDITING, AND SHARING OUTPUT FROM A DESIGN CHECKING SYSTEM
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Issue Dt:
01/17/2006
Application #:
10707810
Filing Dt:
01/14/2004
Publication #:
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Pub Dt:
07/14/2005
Title:
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83
Patent #:
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Issue Dt:
01/30/2007
Application #:
10707811
Filing Dt:
01/14/2004
Publication #:
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Pub Dt:
07/14/2005
Title:
SACRIFICIAL INORGANIC POLYMER INTERMETAL DIELECTRIC DAMASCENE WIRE AND VIA LINER
84
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7202132
Issue Dt:
04/10/2007
Application #:
10707840
Filing Dt:
01/16/2004
Publication #:
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Pub Dt:
07/21/2005
Title:
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85
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06/03/2008
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Filing Dt:
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Publication #:
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Pub Dt:
07/21/2005
Title:
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86
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Issue Dt:
10/10/2006
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Filing Dt:
01/16/2004
Publication #:
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Pub Dt:
07/21/2005
Title:
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87
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Issue Dt:
11/29/2005
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Publication #:
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Pub Dt:
07/21/2005
Title:
HIGH TOLERANCE TCR BALANCED HIGH CURRENT RESISTOR FOR RF CMOS AND RF SIGE BICMOS APPLICATIONS AND CADENCED BASED HIERARCHICAL PARAMETERIZED CELL DESIGN KIT WITH TUNABLE TCR AND ESD RESISTOR BALLASTING FEATURE
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Issue Dt:
11/25/2008
Application #:
10707864
Filing Dt:
01/19/2004
Publication #:
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Pub Dt:
07/21/2005
Title:
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89
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Issue Dt:
10/19/2004
Application #:
10707890
Filing Dt:
01/21/2004
Title:
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90
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Issue Dt:
12/13/2005
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Filing Dt:
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Publication #:
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Pub Dt:
07/21/2005
Title:
LOW-VOLTAGE DIFFERENTIAL AMPLIFIER
91
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7207096
Issue Dt:
04/24/2007
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Filing Dt:
01/22/2004
Publication #:
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Pub Dt:
07/28/2005
Title:
Method of manufacturing high performance copper inductors with bond pads
92
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Issue Dt:
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Filing Dt:
01/22/2004
Publication #:
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Pub Dt:
07/28/2005
Title:
SELECTIVE NITRIDATION OF GATE OXIDES
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Issue Dt:
06/12/2007
Application #:
10707962
Filing Dt:
01/28/2004
Publication #:
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Pub Dt:
07/28/2005
Title:
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94
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Issue Dt:
06/13/2006
Application #:
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Filing Dt:
01/28/2004
Publication #:
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Pub Dt:
07/28/2005
Title:
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05/29/2007
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10707964
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Publication #:
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Pub Dt:
07/28/2005
Title:
METHOD AND STRUCTURE TO CREATE MULTIPLE DEVICE WIDTHS IN FINFET TECHNOLOGY IN BOTH BULK AND SOI
96
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07/29/2008
Application #:
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Filing Dt:
01/30/2004
Publication #:
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Pub Dt:
08/04/2005
Title:
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10708023
Filing Dt:
02/03/2004
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Pub Dt:
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Title:
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98
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10708039
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02/04/2004
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Pub Dt:
08/04/2005
Title:
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03/20/2007
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Publication #:
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Pub Dt:
09/01/2005
Title:
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100
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6949981
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09/27/2005
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10708233
Filing Dt:
02/18/2004
Publication #:
US20050179501
Pub Dt:
08/18/2005
Title:
DYNAMIC THRESHOLD FOR VCO CALIBRATION
Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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