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Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 32 of 148
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148
1
Patent #:
7106110
Issue Dt:
09/12/2006
Application #:
10710681
Filing Dt:
07/28/2004
Publication #:
US20060022723
Pub Dt:
02/02/2006
Title:
CLOCK DITHERING SYSTEM AND METHOD DURING FREQUENCY SCALING
2
Patent #:
7205216
Issue Dt:
04/17/2007
Application #:
10710700
Filing Dt:
07/29/2004
Publication #:
US20060024916
Pub Dt:
02/02/2006
Title:
MODIFICATION OF ELECTRICAL PROPERTIES FOR SEMICONDUCTOR WAFERS
3
Patent #:
NONE
Issue Dt:
Application #:
10710709
Filing Dt:
07/29/2004
Publication #:
US20060025880
Pub Dt:
02/02/2006
Title:
HOST CONTROL FOR A VARIETY OF TOOLS IN SEMICONDUCTOR FABS
4
Patent #:
7216313
Issue Dt:
05/08/2007
Application #:
10710733
Filing Dt:
07/30/2004
Publication #:
US20060025972
Pub Dt:
02/02/2006
Title:
INCORPORATION OF UNCERTAINTY INFORMATION IN MODELING A CHARACTERISTIC OF A DEVICE
5
Patent #:
7174523
Issue Dt:
02/06/2007
Application #:
10710734
Filing Dt:
07/30/2004
Publication #:
US20060026544
Pub Dt:
02/02/2006
Title:
VARIABLE SIGMA ADJUST METHODOLOGY FOR STATIC TIMING
6
Patent #:
7002214
Issue Dt:
02/21/2006
Application #:
10710736
Filing Dt:
07/30/2004
Publication #:
US20060022270
Pub Dt:
02/02/2006
Title:
ULTRA-THIN BODY SUPER-STEEP RETROGRADE WELL (SSRW) FET DEVICES
7
Patent #:
7115955
Issue Dt:
10/03/2006
Application #:
10710738
Filing Dt:
07/30/2004
Publication #:
US20060022266
Pub Dt:
02/02/2006
Title:
SEMICONDUCTOR DEVICE HAVING A STRAINED RAISED SOURCE/DRAIN
8
Patent #:
7053712
Issue Dt:
05/30/2006
Application #:
10710745
Filing Dt:
07/30/2004
Publication #:
US20060022753
Pub Dt:
02/02/2006
Title:
METHOD AND APPARATUS FOR CONTROLLING COMMON-MODE OUTPUT VOLTAGE IN FULLY DIFFERENTIAL AMPLIFIERS
9
Patent #:
7190007
Issue Dt:
03/13/2007
Application #:
10710821
Filing Dt:
08/05/2004
Publication #:
US20060027889
Pub Dt:
02/09/2006
Title:
ISOLATED FULLY DEPLETED SILICON-ON-INSULATOR REGIONS BY SELECTIVE ETCH
10
Patent #:
6951784
Issue Dt:
10/04/2005
Application #:
10710822
Filing Dt:
08/05/2004
Title:
THREE-MASK METHOD OF CONSTRUCTING THE FINAL HARD MASK USED FOR ETCHING THE SILICON FINS FOR FINFETS
11
Patent #:
7247546
Issue Dt:
07/24/2007
Application #:
10710826
Filing Dt:
08/05/2004
Publication #:
US20060027808
Pub Dt:
02/09/2006
Title:
METHOD OF FORMING STRAINED SILICON MATERIALS WITH IMPROVED THERMAL CONDUCTIVITY
12
Patent #:
7390748
Issue Dt:
06/24/2008
Application #:
10710827
Filing Dt:
08/05/2004
Publication #:
US20060030154
Pub Dt:
02/09/2006
Title:
METHOD OF FORMING A POLISHING INHIBITING LAYER USING A SLURRY HAVING AN ADDITIVE
13
Patent #:
7397087
Issue Dt:
07/08/2008
Application #:
10710847
Filing Dt:
08/06/2004
Publication #:
US20060027878
Pub Dt:
02/09/2006
Title:
FEOL/MEOL METAL RESISTOR FOR HIGH END CMOS
14
Patent #:
7459913
Issue Dt:
12/02/2008
Application #:
10710947
Filing Dt:
08/13/2004
Publication #:
US20060035393
Pub Dt:
02/16/2006
Title:
METHODS FOR THE DETERMINATION OF FILM CONTINUITY AND GROWTH MODES IN THIN DIELECTRIC FILMS
15
Patent #:
7193318
Issue Dt:
03/20/2007
Application #:
10711023
Filing Dt:
08/18/2004
Publication #:
US20060038281
Pub Dt:
02/23/2006
Title:
MULTIPLE POWER DENSITY CHIP STRUCTURE
16
Patent #:
7304000
Issue Dt:
12/04/2007
Application #:
10711043
Filing Dt:
08/19/2004
Publication #:
US20060040504
Pub Dt:
02/23/2006
Title:
PHOTORESIST TRIMMING PROCESS
17
Patent #:
7206652
Issue Dt:
04/17/2007
Application #:
10711079
Filing Dt:
08/20/2004
Publication #:
US20060052889
Pub Dt:
03/09/2006
Title:
METHOD AND SYSTEM FOR INTELLIGENT AUTOMATED RETICLE MANAGEMENT
18
Patent #:
7060612
Issue Dt:
06/13/2006
Application #:
10711130
Filing Dt:
08/26/2004
Publication #:
US20060046418
Pub Dt:
03/02/2006
Title:
METHOD OF ADJUSTING RESISTORS POST SILICIDE PROCESS
19
Patent #:
7253098
Issue Dt:
08/07/2007
Application #:
10711145
Filing Dt:
08/27/2004
Publication #:
US20060043590
Pub Dt:
03/02/2006
Title:
MAINTAINING UNIFORM CMP HARD MASK THICKNESS
20
Patent #:
7348641
Issue Dt:
03/25/2008
Application #:
10711182
Filing Dt:
08/31/2004
Publication #:
US20070181930
Pub Dt:
08/09/2007
Title:
STRUCTURE AND METHOD OF MAKING DOUBLE-GATED SELF-ALIGNED FINFET HAVING GATES OF DIFFERENT LENGTHS
21
Patent #:
7388257
Issue Dt:
06/17/2008
Application #:
10711200
Filing Dt:
09/01/2004
Publication #:
US20060043421
Pub Dt:
03/02/2006
Title:
MULTI-GATE DEVICE WITH HIGH K DIELECTRIC FOR CHANNEL TOP SURFACE
22
Patent #:
7098721
Issue Dt:
08/29/2006
Application #:
10711205
Filing Dt:
09/01/2004
Publication #:
US20060044049
Pub Dt:
03/02/2006
Title:
LOW VOLTAGE PROGRAMMABLE EFUSE WITH DIFFERENTIAL SENSING SCHEME
23
Patent #:
7406397
Issue Dt:
07/29/2008
Application #:
10711224
Filing Dt:
09/02/2004
Publication #:
US20060047474
Pub Dt:
03/02/2006
Title:
SELF HEATING MONITOR FOR SIGE AND SOI CMOS DEVICES
24
Patent #:
8288828
Issue Dt:
10/16/2012
Application #:
10711298
Filing Dt:
09/09/2004
Publication #:
US20060051959
Pub Dt:
03/09/2006
Title:
VIA CONTACT STRUCTURE HAVING DUAL SILICIDE LAYERS
25
Patent #:
6956266
Issue Dt:
10/18/2005
Application #:
10711300
Filing Dt:
09/09/2004
Title:
STRUCTURE AND METHOD FOR LATCHUP SUPPRESSION UTILIZING TRENCH AND MASKED SUB-COLLECTOR IMPLANTATION
26
Patent #:
7208414
Issue Dt:
04/24/2007
Application #:
10711365
Filing Dt:
09/14/2004
Publication #:
US20060057844
Pub Dt:
03/16/2006
Title:
METHOD FOR ENHANCED UNI-DIRECTIONAL DIFFUSION OF METAL AND SUBSEQUENT SILICIDE FORMATION
27
Patent #:
7316971
Issue Dt:
01/08/2008
Application #:
10711367
Filing Dt:
09/14/2004
Publication #:
US20060057831
Pub Dt:
03/16/2006
Title:
WIRE BOND PADS
28
Patent #:
7112470
Issue Dt:
09/26/2006
Application #:
10711383
Filing Dt:
09/15/2004
Publication #:
US20060057822
Pub Dt:
03/16/2006
Title:
CHIP DICING
29
Patent #:
7285474
Issue Dt:
10/23/2007
Application #:
10711394
Filing Dt:
09/16/2004
Publication #:
US20060057835
Pub Dt:
03/16/2006
Title:
AIR-GAP INSULATED INTERCONNECTIONS
30
Patent #:
7231617
Issue Dt:
06/12/2007
Application #:
10711418
Filing Dt:
09/17/2004
Publication #:
US20060071676
Pub Dt:
04/06/2006
Title:
DETERMINATION OF GRAIN SIZES OF ELECTRICALLY CONDUCTIVE LINES IN SEMICONDUCTOR INTEGRATED CIRCUITS
31
Patent #:
7078722
Issue Dt:
07/18/2006
Application #:
10711453
Filing Dt:
09/20/2004
Publication #:
US20060060856
Pub Dt:
03/23/2006
Title:
NFET AND PFET DEVICES AND METHODS OF FABRICATING SAME
32
Patent #:
7176119
Issue Dt:
02/13/2007
Application #:
10711456
Filing Dt:
09/20/2004
Publication #:
US20060063373
Pub Dt:
03/23/2006
Title:
METHOD OF FABRICATING COPPER DAMASCENE AND DUAL DAMASCENE INTERCONNECT WIRING
33
Patent #:
7317215
Issue Dt:
01/08/2008
Application #:
10711482
Filing Dt:
09/21/2004
Publication #:
US20060060887
Pub Dt:
03/23/2006
Title:
SIGE HETEROJUNCTION BIPOLAR TRANSISTOR (HBT)
34
Patent #:
7265018
Issue Dt:
09/04/2007
Application #:
10711486
Filing Dt:
09/21/2004
Publication #:
US20060060886
Pub Dt:
03/23/2006
Title:
METHOD TO BUILD SELF-ALIGNED NPN IN ADVANCED BICMOS TECHNOLOGY
35
Patent #:
7445141
Issue Dt:
11/04/2008
Application #:
10711501
Filing Dt:
09/22/2004
Publication #:
US20060060636
Pub Dt:
03/23/2006
Title:
SOLDER INTERCONNECTION ARRAY WITH OPTIMAL MECHANICAL INTEGRITY
36
Patent #:
NONE
Issue Dt:
Application #:
10711640
Filing Dt:
09/29/2004
Publication #:
US20060071304
Pub Dt:
04/06/2006
Title:
STRUCTURE AND LAYOUT OF A FET PRIME CELL
37
Patent #:
7560375
Issue Dt:
07/14/2009
Application #:
10711697
Filing Dt:
09/30/2004
Publication #:
US20060073695
Pub Dt:
04/06/2006
Title:
GAS DIELECTRIC STRUCTURE FORMING METHODS
38
Patent #:
7409019
Issue Dt:
08/05/2008
Application #:
10711713
Filing Dt:
09/30/2004
Publication #:
US20060067440
Pub Dt:
03/30/2006
Title:
HIGH SPEED MULTI-MODE RECEIVER WITH ADAPTIVE RECEIVER EQUALIZATION AND CONTROLLABLE TRANSMITTER PRE-DISTORTION
39
Patent #:
7157341
Issue Dt:
01/02/2007
Application #:
10711742
Filing Dt:
10/01/2004
Publication #:
US20060073688
Pub Dt:
04/06/2006
Title:
GATE STACKS
40
Patent #:
7098521
Issue Dt:
08/29/2006
Application #:
10711744
Filing Dt:
10/01/2004
Publication #:
US20060071292
Pub Dt:
04/06/2006
Title:
REDUCED GUARD RING IN SCHOTTKY BARRIER DIODE STRUCTURE
41
Patent #:
7771604
Issue Dt:
08/10/2010
Application #:
10711758
Filing Dt:
10/04/2004
Publication #:
US20060073394
Pub Dt:
04/06/2006
Title:
REDUCED MASK COUNT GATE CONDUCTOR DEFINITION
42
Patent #:
7233071
Issue Dt:
06/19/2007
Application #:
10711764
Filing Dt:
10/04/2004
Publication #:
US20060073682
Pub Dt:
04/06/2006
Title:
LOW-K DIELECTRIC LAYER BASED UPON CARBON NANOSTRUCTURES
43
Patent #:
7485210
Issue Dt:
02/03/2009
Application #:
10711818
Filing Dt:
10/07/2004
Publication #:
US20060076230
Pub Dt:
04/13/2006
Title:
SPUTTERING TARGET FIXTURE
44
Patent #:
7274073
Issue Dt:
09/25/2007
Application #:
10711844
Filing Dt:
10/08/2004
Publication #:
US20060076628
Pub Dt:
04/13/2006
Title:
INTEGRATED CIRCUIT WITH BULK AND SOI DEVICES CONNECTED WITH AN EPITAXIAL REGION
45
Patent #:
7456426
Issue Dt:
11/25/2008
Application #:
10711845
Filing Dt:
10/08/2004
Publication #:
US20060076643
Pub Dt:
04/13/2006
Title:
FIN-TYPE ANTIFUSE
46
Patent #:
7411135
Issue Dt:
08/12/2008
Application #:
10711885
Filing Dt:
10/12/2004
Publication #:
US20060076159
Pub Dt:
04/13/2006
Title:
CONTOUR STRUCTURES TO HIGHLIGHT INSPECTION REGIONS
47
Patent #:
7402870
Issue Dt:
07/22/2008
Application #:
10711899
Filing Dt:
10/12/2004
Publication #:
US20060076627
Pub Dt:
04/13/2006
Title:
ULTRA SHALLOW JUNCTION FORMATION BY EPITAXIAL INTERFACE LIMITED DIFFUSION
48
Patent #:
7101806
Issue Dt:
09/05/2006
Application #:
10711953
Filing Dt:
10/15/2004
Publication #:
US20060081556
Pub Dt:
04/20/2006
Title:
DEEP TRENCH FORMATION IN SEMICONDUCTOR DEVICE FABRICATION
49
Patent #:
7363601
Issue Dt:
04/22/2008
Application #:
10711959
Filing Dt:
10/15/2004
Publication #:
US20060085768
Pub Dt:
04/20/2006
Title:
INTEGRATED CIRCUIT SELECTIVE SCALING
50
Patent #:
6949768
Issue Dt:
09/27/2005
Application #:
10711974
Filing Dt:
10/18/2004
Title:
PLANAR SUBSTRATE DEVICES INTEGRATED WITH FINFETS AND METHOD OF MANUFACTURE
51
Patent #:
7337415
Issue Dt:
02/26/2008
Application #:
10711978
Filing Dt:
10/18/2004
Publication #:
US20060085769
Pub Dt:
04/20/2006
Title:
IMPROVING SYSTEMATIC YIELD IN SEMICONDUCTOR MANUFACTURE
52
Patent #:
7400555
Issue Dt:
07/15/2008
Application #:
10712925
Filing Dt:
11/13/2003
Publication #:
US20050107970
Pub Dt:
05/19/2005
Title:
BUILT IN SELF TEST CIRCUIT FOR MEASURING TOTAL TIMING UNCERTAINTY IN A DIGITAL DATA PATH
53
Patent #:
7064027
Issue Dt:
06/20/2006
Application #:
10713227
Filing Dt:
11/13/2003
Publication #:
US20050104095
Pub Dt:
05/19/2005
Title:
METHOD AND STRUCTURE TO USE AN ETCH RESISTANT LINER ON TRANSISTOR GATE STRUCTURE TO ACHIEVE HIGH DEVICE PERFORMANCE
54
Patent #:
6971585
Issue Dt:
12/06/2005
Application #:
10713346
Filing Dt:
11/13/2003
Publication #:
US20050121533
Pub Dt:
06/09/2005
Title:
SYSTEM AND METHOD FOR PROTECTING EQUIPMENT FROM DAMAGE DUE TO LOW OR RAPIDLY CHANGING TEMPERATURES
55
Patent #:
7132323
Issue Dt:
11/07/2006
Application #:
10713447
Filing Dt:
11/14/2003
Publication #:
US20050106800
Pub Dt:
05/19/2005
Title:
CMOS WELL STRUCTURE AND METHOD OF FORMING THE SAME
56
Patent #:
7041538
Issue Dt:
05/09/2006
Application #:
10713971
Filing Dt:
11/14/2003
Publication #:
US20040104433
Pub Dt:
06/03/2004
Title:
METHOD AND STRUCTURE OF A DISPOSABLE REVERSED SPACER PROCESS FOR HIGH PERFORMANCE RECESSED CHANNEL CMOS
57
Patent #:
7131098
Issue Dt:
10/31/2006
Application #:
10714750
Filing Dt:
11/17/2003
Publication #:
US20050108674
Pub Dt:
05/19/2005
Title:
COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING UNCERTAINTY IN INTEGRATED CIRCUIT DESIGNS WITH PROGRAMMABLE LOGIC
58
Patent #:
7137827
Issue Dt:
11/21/2006
Application #:
10715288
Filing Dt:
11/17/2003
Publication #:
US20050106902
Pub Dt:
05/19/2005
Title:
INTERPOSER WITH ELECTRICAL CONTACT BUTTON AND METHOD
59
Patent #:
7602000
Issue Dt:
10/13/2009
Application #:
10715376
Filing Dt:
11/19/2003
Publication #:
US20050104101
Pub Dt:
05/19/2005
Title:
SPIN-CURRENT SWITCHED MAGNETIC MEMORY ELEMENT SUITABLE FOR CIRCUIT INTEGRATION AND METHOD OF FABRICATING THE MEMORY ELEMENT
60
Patent #:
7902682
Issue Dt:
03/08/2011
Application #:
10715689
Filing Dt:
11/18/2003
Publication #:
US20050104147
Pub Dt:
05/19/2005
Title:
ULTRAVIOLET ENERGY CURABLE TAPE AND METHOD OF MAKING A SEMICONDUCTOR CHIP USING THE TAPE
61
Patent #:
6998290
Issue Dt:
02/14/2006
Application #:
10715736
Filing Dt:
11/18/2003
Publication #:
US20040099960
Pub Dt:
05/27/2004
Title:
ECONOMICAL HIGH DENSITY CHIP CARRIER
62
Patent #:
NONE
Issue Dt:
Application #:
10716785
Filing Dt:
11/19/2003
Publication #:
US20050106494
Pub Dt:
05/19/2005
Title:
Silicon-containing resist systems with cyclic ketal protecting groups
63
Patent #:
6937337
Issue Dt:
08/30/2005
Application #:
10716927
Filing Dt:
11/19/2003
Publication #:
US20050105092
Pub Dt:
05/19/2005
Title:
OVERLAY TARGET AND MEASUREMENT METHOD USING REFERENCE AND SUB-GRIDS
64
Patent #:
NONE
Issue Dt:
Application #:
10717279
Filing Dt:
11/19/2003
Publication #:
US20050104092
Pub Dt:
05/19/2005
Title:
SEMICONDUCTOR FIELD-EFFECT TRANSISTOR FORMED ON A STRAINED-LAYER HAVING THREADING DISLOCATION EXTEND CONTINOUSLY BETWEEN THE SOURCE AND DRAIN REGIONS
65
Patent #:
6793961
Issue Dt:
09/21/2004
Application #:
10717385
Filing Dt:
11/19/2003
Publication #:
US20040100729
Pub Dt:
05/27/2004
Title:
ENHANCEMENT OF MAGNETIZATION SWITCHING SPEED IN SOFT FERROMAGNETIC FILMS THROUGH CONTROL OF EDGE STRESS ANISOTROPY
66
Patent #:
7091566
Issue Dt:
08/15/2006
Application #:
10717737
Filing Dt:
11/20/2003
Publication #:
US20050110085
Pub Dt:
05/26/2005
Title:
DUAL GATE FINFET
67
Patent #:
7251743
Issue Dt:
07/31/2007
Application #:
10719113
Filing Dt:
11/20/2003
Publication #:
US20050114741
Pub Dt:
05/26/2005
Title:
METHOD, SYSTEM, AND PROGRAM FOR TRANSMITTING INPUT/OUTPUT REQUESTS FROM A PRIMARY CONTROLLER TO A SECONDARY CONTROLLER
68
Patent #:
7302603
Issue Dt:
11/27/2007
Application #:
10719180
Filing Dt:
11/20/2003
Publication #:
US20050114729
Pub Dt:
05/26/2005
Title:
HOST-INITIATED DATA RECONSTRUCTION FOR IMPROVED RAID READ OPERATIONS
69
Patent #:
6878616
Issue Dt:
04/12/2005
Application #:
10719704
Filing Dt:
11/21/2003
Title:
LOW-K DIELECTRIC MATERIAL SYSTEM FOR IC APPLICATION
70
Patent #:
6806177
Issue Dt:
10/19/2004
Application #:
10719861
Filing Dt:
11/21/2003
Publication #:
US20040104409
Pub Dt:
06/03/2004
Title:
SELF-ALIGNED BORDERLESS CONTACTS
71
Patent #:
7451210
Issue Dt:
11/11/2008
Application #:
10720300
Filing Dt:
11/24/2003
Publication #:
US20050114739
Pub Dt:
05/26/2005
Title:
HYBRID METHOD FOR EVENT PREDICTION AND SYSTEM CONTROL
72
Patent #:
7111266
Issue Dt:
09/19/2006
Application #:
10720464
Filing Dt:
11/24/2003
Publication #:
US20050114814
Pub Dt:
05/26/2005
Title:
MULTIPLE VOLTAGE INTEGRATED CIRCUIT AND DESIGN METHOD THEREFOR
73
Patent #:
7119578
Issue Dt:
10/10/2006
Application #:
10720466
Filing Dt:
11/24/2003
Publication #:
US20050110519
Pub Dt:
05/26/2005
Title:
SINGLE SUPPLY LEVEL CONVERTER
74
Patent #:
NONE
Issue Dt:
Application #:
10720962
Filing Dt:
11/24/2003
Publication #:
US20050110004
Pub Dt:
05/26/2005
Title:
Magnetic tunnel junction with improved tunneling magneto-resistance
75
Patent #:
7295604
Issue Dt:
11/13/2007
Application #:
10720974
Filing Dt:
11/24/2003
Publication #:
US20050111536
Pub Dt:
05/26/2005
Title:
METHOD FOR DETERMINING JITTER OF A SIGNAL IN A SERIAL LINK AND HIGH SPEED SERIAL LINK
76
Patent #:
7645356
Issue Dt:
01/12/2010
Application #:
10721657
Filing Dt:
11/25/2003
Publication #:
US20050112900
Pub Dt:
05/26/2005
Title:
METHOD OF PROCESSING WAFERS WITH RESONANT HEATING
77
Patent #:
6978214
Issue Dt:
12/20/2005
Application #:
10721966
Filing Dt:
11/25/2003
Publication #:
US20050114050
Pub Dt:
05/26/2005
Title:
VALIDATION OF ELECTRICAL PERFORMANCE OF AN ELECTRONIC PACKAGE PRIOR TO FABRICATION
78
Patent #:
7214886
Issue Dt:
05/08/2007
Application #:
10722226
Filing Dt:
11/25/2003
Publication #:
US20050109535
Pub Dt:
05/26/2005
Title:
HIGH PERFORMANCE CHIP CARRIER SUBSTRATE
79
Patent #:
7303113
Issue Dt:
12/04/2007
Application #:
10722432
Filing Dt:
11/28/2003
Publication #:
US20050116013
Pub Dt:
06/02/2005
Title:
METHOD AND STRUCTURE FOR CONTROLLED IMPEDANCE WIRE BONDS USING CO-DISPENSING OF DIELECTRIC SPACERS
80
Patent #:
7064050
Issue Dt:
06/20/2006
Application #:
10722557
Filing Dt:
11/28/2003
Publication #:
US20050116230
Pub Dt:
06/02/2005
Title:
METAL CARBIDE GATE STRUCTURE AND METHOD OF FABRICATION
81
Patent #:
7015580
Issue Dt:
03/21/2006
Application #:
10722704
Filing Dt:
11/25/2003
Publication #:
US20050112861
Pub Dt:
05/26/2005
Title:
ROUGHENED BONDING PAD AND BONDING WIRE SURFACES FOR LOW PRESSURE WIRE BONDING
82
Patent #:
6967380
Issue Dt:
11/22/2005
Application #:
10722867
Filing Dt:
11/26/2003
Publication #:
US20040157418
Pub Dt:
08/12/2004
Title:
CMOS DEVICE HAVING RETROGRADE N-WELL AND P-WELL
83
Patent #:
7049662
Issue Dt:
05/23/2006
Application #:
10722873
Filing Dt:
11/26/2003
Publication #:
US20050110087
Pub Dt:
05/26/2005
Title:
STRUCTURE AND METHOD TO FABRICATE FINFET DEVICES
84
Patent #:
7089528
Issue Dt:
08/08/2006
Application #:
10723640
Filing Dt:
11/26/2003
Publication #:
US20040181728
Pub Dt:
09/16/2004
Title:
METHODS AND SYSTEMS FOR ESTIMATING RETICLE BIAS STATES
85
Patent #:
6881672
Issue Dt:
04/19/2005
Application #:
10723700
Filing Dt:
11/26/2003
Publication #:
US20040110371
Pub Dt:
06/10/2004
Title:
SELECTIVE SILICIDE BLOCKING
86
Patent #:
7171585
Issue Dt:
01/30/2007
Application #:
10723751
Filing Dt:
11/26/2003
Publication #:
US20050132253
Pub Dt:
06/16/2005
Title:
DIAGNOSING FAULTS AND ERRORS FROM A DATA REPOSITORY USING DIRECTED GRAPHS
87
Patent #:
7442282
Issue Dt:
10/28/2008
Application #:
10724044
Filing Dt:
12/01/2003
Publication #:
US20040129576
Pub Dt:
07/08/2004
Title:
ELECTROLYTIC PROCESSING APPARATUS AND METHOD
88
Patent #:
7247569
Issue Dt:
07/24/2007
Application #:
10725848
Filing Dt:
12/02/2003
Publication #:
US20050118826
Pub Dt:
06/02/2005
Title:
ULTRA-THIN SI MOSFET DEVICE STRUCTURE AND METHOD OF MANUFACTURE
89
Patent #:
7075150
Issue Dt:
07/11/2006
Application #:
10725849
Filing Dt:
12/02/2003
Publication #:
US20050116289
Pub Dt:
06/02/2005
Title:
ULTRA-THIN SI CHANNEL MOSFET USING A SELF-ALIGNED OXYGEN IMPLANT AND DAMASCENE TECHNIQUE
90
Patent #:
NONE
Issue Dt:
Application #:
10725850
Filing Dt:
12/02/2003
Publication #:
US20050116290
Pub Dt:
06/02/2005
Title:
Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers
91
Patent #:
7450748
Issue Dt:
11/11/2008
Application #:
10725854
Filing Dt:
12/02/2003
Publication #:
US20050117795
Pub Dt:
06/02/2005
Title:
MASK INSPECTION PROCESS ACCOUNTING FOR MASK WRITER PROXIMITY CORRECTION
92
Patent #:
7067902
Issue Dt:
06/27/2006
Application #:
10726140
Filing Dt:
12/02/2003
Publication #:
US20050118803
Pub Dt:
06/02/2005
Title:
BUILDING METAL PILLARS IN A CHIP FOR STRUCTURE SUPPORT
93
Patent #:
6946709
Issue Dt:
09/20/2005
Application #:
10726326
Filing Dt:
12/02/2003
Publication #:
US20050116296
Pub Dt:
06/02/2005
Title:
COMPLEMENTARY TRANSISTORS HAVING DIFFERENT SOURCE AND DRAIN EXTENSION SPACING CONTROLLED BY DIFFERENT SPACER SIZES
94
Patent #:
7057709
Issue Dt:
06/06/2006
Application #:
10727901
Filing Dt:
12/04/2003
Publication #:
US20050122501
Pub Dt:
06/09/2005
Title:
PRINTING A MASK WITH MAXIMUM POSSIBLE PROCESS WINDOW THROUGH ADJUSTMENT OF THE SOURCE DISTRIBUTION
95
Patent #:
6979518
Issue Dt:
12/27/2005
Application #:
10727925
Filing Dt:
12/04/2003
Publication #:
US20040170907
Pub Dt:
09/02/2004
Title:
ATTENUATED EMBEDDED PHASE SHIFT PHOTOMASK BLANKS
96
Patent #:
NONE
Issue Dt:
Application #:
10728289
Filing Dt:
12/04/2003
Publication #:
US20050125758
Pub Dt:
06/09/2005
Title:
Positioning of inverting buffers in a netlist
97
Patent #:
7045873
Issue Dt:
05/16/2006
Application #:
10728750
Filing Dt:
12/08/2003
Publication #:
US20050121699
Pub Dt:
06/09/2005
Title:
DYNAMIC THRESHOLD VOLTAGE MOSFET ON SOI
98
Patent #:
7276787
Issue Dt:
10/02/2007
Application #:
10729254
Filing Dt:
12/05/2003
Publication #:
US20050121768
Pub Dt:
06/09/2005
Title:
SILICON CHIP CARRIER WITH CONDUCTIVE THROUGH-VIAS AND METHOD FOR FABRICATING SAME
99
Patent #:
7820369
Issue Dt:
10/26/2010
Application #:
10729452
Filing Dt:
12/04/2003
Publication #:
US20050123852
Pub Dt:
06/09/2005
Title:
METHOD FOR PATTERNING A LOW ACTIVATION ENERGY PHOTORESIST
100
Patent #:
7297811
Issue Dt:
11/20/2007
Application #:
10729453
Filing Dt:
12/04/2003
Publication #:
US20050124827
Pub Dt:
06/09/2005
Title:
PRECURSORS TO FLUOROALKANOL-CONTAINING OLEFIN MONOMERS AND ASSOCIATED METHODS OF SYNTHESIS AND USE
Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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