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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
NONE
Issue Dt:
Application #:
10914433
Filing Dt:
08/09/2004
Publication #:
Pub Dt:
03/31/2005
Title:
Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers
2
Patent #:
Issue Dt:
08/16/2005
Application #:
10915087
Filing Dt:
08/10/2004
Publication #:
Pub Dt:
01/13/2005
Title:
PATTERNING LAYERS COMPRISED OF SPIN-ON CERAMIC FILMS
3
Patent #:
Issue Dt:
01/12/2010
Application #:
10915374
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
03/10/2005
Title:
THERMOPLASTIC ADHESIVE PREFORM FOR HEAT SINK ATTACHMENT
4
Patent #:
Issue Dt:
07/08/2008
Application #:
10915790
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHODS AND ARRANGEMENTS FOR LINK POWER REDUCTION
5
Patent #:
Issue Dt:
10/31/2006
Application #:
10916201
Filing Dt:
08/11/2004
Publication #:
Pub Dt:
02/16/2006
Title:
MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS
6
Patent #:
Issue Dt:
12/29/2009
Application #:
10916755
Filing Dt:
08/12/2004
Publication #:
Pub Dt:
02/16/2006
Title:
ULTRATHIN POLYMERIC PHOTOACID GENERATOR LAYER AND METHOD OF FABRICATING AT LEAST ONE OF A DEVICE AND A MASK BY USING SAID LAYER
7
Patent #:
Issue Dt:
09/18/2007
Application #:
10916814
Filing Dt:
08/12/2004
Publication #:
Pub Dt:
01/20/2005
Title:
ULTRA-THIN CHANNEL DEVICE WITH RAISED SOURCE AND DRAIN AND SOLID SOURCE EXTENSION DOPING
8
Patent #:
Issue Dt:
03/21/2006
Application #:
10916934
Filing Dt:
08/12/2004
Publication #:
Pub Dt:
01/27/2005
Title:
PHOTORESIST COMPOSITION
9
Patent #:
Issue Dt:
05/19/2009
Application #:
10917193
Filing Dt:
08/12/2004
Publication #:
Pub Dt:
02/16/2006
Title:
PHYSICAL DESIGN SYSTEM AND METHOD
10
Patent #:
Issue Dt:
12/25/2007
Application #:
10919121
Filing Dt:
08/16/2004
Publication #:
Pub Dt:
02/16/2006
Title:
THREE DIMENSIONAL INTEGRATED CIRCUIT
11
Patent #:
Issue Dt:
08/09/2005
Application #:
10920762
Filing Dt:
08/18/2004
Publication #:
Pub Dt:
01/27/2005
Title:
UNDERLAYER COMPOSITIONS FOR MULTILAYER LITHOGRAPHIC PROCESSES
12
Patent #:
Issue Dt:
12/30/2008
Application #:
10920786
Filing Dt:
08/18/2004
Publication #:
Pub Dt:
02/23/2006
Title:
METHOD FOR DESIGNING ALTERNATING PHASE SHIFT MASKS
13
Patent #:
Issue Dt:
02/13/2007
Application #:
10920936
Filing Dt:
08/18/2004
Publication #:
Pub Dt:
02/03/2005
Title:
DAMASCENE RESISTOR AND METHOD FOR MEASURING THE WIDTH OF SAME
14
Patent #:
Issue Dt:
10/31/2006
Application #:
10921007
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
02/23/2006
Title:
INTEGRATED DUAL DAMASCENE RIE PROCESS WITH ORGANIC PATTERNING LAYER
15
Patent #:
Issue Dt:
05/29/2007
Application #:
10923247
Filing Dt:
08/20/2004
Publication #:
Pub Dt:
02/23/2006
Title:
DUV LASER ANNEALING AND STABILIZATION OF SICOH FILMS
16
Patent #:
Issue Dt:
11/22/2005
Application #:
10925021
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
01/27/2005
Title:
LAMINATION OF LIQUID CRYSTAL POLYMER DIELECTRIC FILMS
17
Patent #:
Issue Dt:
03/04/2008
Application #:
10926587
Filing Dt:
08/26/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD AND SYSTEM FOR BUILDING BINARY DECISION DIAGRAMS EFFICIENTLY IN A STRUCTURAL NETWORK REPRESENTATION OF A DIGITAL CIRCUIT
18
Patent #:
Issue Dt:
07/04/2006
Application #:
10928178
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
UV ABSORBING GLASS CLOTH AND USE THEREOF
19
Patent #:
Issue Dt:
07/01/2008
Application #:
10929935
Filing Dt:
08/30/2004
Publication #:
Pub Dt:
03/02/2006
Title:
TEST-CASES FOR FUNCTIONAL VERIFICATION OF SYSTEM-LEVEL INTERCONNECT
20
Patent #:
Issue Dt:
11/08/2005
Application #:
10930304
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
02/03/2005
Title:
HIGH DENSITY CHIP CARRIER WITH INTEGRATED PASSIVE DEVICES
21
Patent #:
Issue Dt:
06/05/2007
Application #:
10930404
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
12/29/2005
Title:
STRAINED-SILICON CMOS DEVICE AND METHOD
22
Patent #:
Issue Dt:
12/25/2007
Application #:
10930823
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
04/14/2005
Title:
PLATING APPARATUS FOR SUBSTRATE
23
Patent #:
Issue Dt:
08/21/2007
Application #:
10931100
Filing Dt:
08/31/2004
Publication #:
Pub Dt:
03/02/2006
Title:
APPARATUS, SYSTEM, AND METHOD FOR REDUCING ROTATIONAL VIBRATION TRANSMISSION WITHIN A DATA STORAGE SYSTEM
24
Patent #:
Issue Dt:
09/05/2006
Application #:
10931660
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
03/02/2006
Title:
BIPOLAR TRANSISTOR WITH EXTRINSIC STRESS LAYER
25
Patent #:
Issue Dt:
10/03/2006
Application #:
10931855
Filing Dt:
09/01/2004
Publication #:
Pub Dt:
03/02/2006
Title:
VERTICAL BIPOLAR TRANSISTOR WITH A MAJORITY CARRIER ACCUMULATION LAYER AS A SUBCOLLECTOR FOR SOI BICMOS WITH REDUCED BURIED OXIDE THICKNESS FOR LOW-SUBSTRATE BIAS OPERATION
26
Patent #:
Issue Dt:
11/28/2006
Application #:
10932598
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF PRODUCING SILICON-GERMANIUM-ON-INSULATOR MATERIAL USING UNSTRAINED GE-CONTAINING SOURCE LAYERS
27
Patent #:
Issue Dt:
08/29/2006
Application #:
10932982
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
03/03/2005
Title:
ULTRA-THIN SILICON-ON-INSULATOR AND STRAINED-SILICON-DIRECT-ON-INSULATOR WITH HYBRID CRYSTAL ORIENTATIONS
28
Patent #:
Issue Dt:
10/14/2008
Application #:
10933051
Filing Dt:
09/02/2004
Publication #:
Pub Dt:
03/02/2006
Title:
COOLING OF SUBSTRATE USING INTERPOSER CHANNELS
29
Patent #:
Issue Dt:
10/03/2006
Application #:
10933706
Filing Dt:
09/03/2004
Publication #:
Pub Dt:
03/09/2006
Title:
SENSE AMPLIFIER CIRCUITS AND HIGH SPEED LATCH CIRCUITS USING GATED DIODES
30
Patent #:
Issue Dt:
05/20/2008
Application #:
10935136
Filing Dt:
09/07/2004
Publication #:
Pub Dt:
02/24/2005
Title:
STRESS INDUCING SPACERS
31
Patent #:
Issue Dt:
06/09/2009
Application #:
10935497
Filing Dt:
09/07/2004
Publication #:
Pub Dt:
03/09/2006
Title:
METHOD AND PROCESS FOR FORMING A SELF-ALIGNED SILICIDE CONTACT
32
Patent #:
Issue Dt:
07/03/2007
Application #:
10939230
Filing Dt:
09/10/2004
Publication #:
Pub Dt:
03/16/2006
Title:
FLEXURE PLATE FOR MAINTAINING CONTACT BETWEEN A COOLING PLATE/HEAT SINK AND A MICROCHIP
33
Patent #:
Issue Dt:
06/26/2007
Application #:
10939736
Filing Dt:
09/13/2004
Publication #:
Pub Dt:
03/16/2006
Title:
METHOD OF CREATING DEFECT FREE HIGH GE CONTENT (>25%) SIGE-ON-INSULATOR (SGOI) SUBSTRATES USING WAFER BONDING TECHNIQUES
34
Patent #:
Issue Dt:
03/17/2009
Application #:
10939823
Filing Dt:
09/13/2004
Publication #:
Pub Dt:
03/16/2006
Title:
METHOD FOR EVOLVING EFFICIENT COMMUNICATIONS
35
Patent #:
Issue Dt:
12/04/2007
Application #:
10940543
Filing Dt:
09/14/2004
Publication #:
Pub Dt:
03/16/2006
Title:
POWER NETWORK RECONFIGURATION USING MEM SWITCHES
36
Patent #:
NONE
Issue Dt:
Application #:
10941415
Filing Dt:
09/15/2004
Publication #:
Pub Dt:
03/16/2006
Title:
Method for creating and synthesizing multiple instances of a component from a single logical model
37
Patent #:
Issue Dt:
08/21/2007
Application #:
10942559
Filing Dt:
09/16/2004
Publication #:
Pub Dt:
03/10/2005
Title:
FAST FIRING FLATTENING APPARATUS FOR SINTERED MULTILAYER CERAMIC ELECTRONIC SUBSTRATES
38
Patent #:
Issue Dt:
08/22/2006
Application #:
10946552
Filing Dt:
09/21/2004
Publication #:
Pub Dt:
02/17/2005
Title:
MACRO DESIGN TECHNIQUES TO ACCOMMODATE CHIP LEVEL WIRING AND CIRCUIT PLACEMENT ACROSS THE MACRO
39
Patent #:
Issue Dt:
09/23/2008
Application #:
10948421
Filing Dt:
09/23/2004
Publication #:
Pub Dt:
05/19/2005
Title:
LAYER TRANSFER OF LOW DEFECT SIGE USING AN ETCH-BACK PROCESS
40
Patent #:
Issue Dt:
01/06/2009
Application #:
10948772
Filing Dt:
09/23/2004
Publication #:
Pub Dt:
03/23/2006
Title:
SINGLE PASS VARIABLE BIT RATE CONTROL STRATEGY AND ENCODER FOR PROCESSING A VIDEO FRAME OF A SEQUENCE OF VIDEO FRAMES
41
Patent #:
Issue Dt:
08/29/2006
Application #:
10949837
Filing Dt:
09/24/2004
Publication #:
Pub Dt:
02/17/2005
Title:
MULTILAYER INTERCONNECT STRUCTURE CONTAINING AIR GAPS AND METHOD FOR MAKING
42
Patent #:
Issue Dt:
04/15/2008
Application #:
10951745
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SILICON-ON-INSULATOR WAFER HAVING REENTRANT SHAPE DIELECTRIC TRENCHES
43
Patent #:
Issue Dt:
03/13/2007
Application #:
10952269
Filing Dt:
09/28/2004
Publication #:
Pub Dt:
02/24/2005
Title:
METHOD AND APPARATUS FOR ADDRESS DECODING OF EMBEDDED DRAM DEVICES
44
Patent #:
Issue Dt:
02/06/2007
Application #:
10953378
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/10/2005
Title:
INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR SI-GE BIPOLAR TECHNOLOGY
45
Patent #:
Issue Dt:
02/12/2008
Application #:
10953752
Filing Dt:
09/29/2004
Publication #:
Pub Dt:
03/30/2006
Title:
UV-CURABLE SOLVENT FREE COMPOSITIONS AND USE THEREOF IN CERAMIC CHIP DEFECT REPAIR
46
Patent #:
NONE
Issue Dt:
Application #:
10954672
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Title:
Device and method for reducing dishing of critical on-chip interconnect lines
47
Patent #:
Issue Dt:
09/11/2007
Application #:
10954838
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
03/30/2006
Title:
STRUCTURE AND METHOD FOR MANUFACTURING MOSFET WITH SUPER-STEEP RETROGRADED ISLAND
48
Patent #:
Issue Dt:
04/14/2009
Application #:
10956466
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Title:
SYSTEM AND METHOD FOR TOLERATING MULTIPLE STORAGE DEVICE FAILURES IN A STORAGE SYSTEM WITH CONSTRAINED PARITY IN-DEGREE
49
Patent #:
Issue Dt:
08/07/2007
Application #:
10956851
Filing Dt:
10/01/2004
Publication #:
Pub Dt:
03/17/2005
Title:
SELF-ALIGNED NANOTUBE FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME
50
Patent #:
Issue Dt:
01/20/2009
Application #:
10957342
Filing Dt:
10/01/2004
Publication #:
Pub Dt:
12/08/2005
Title:
SELECTIVE IMPLEMENTATION OF BARRIER LAYERS TO ACHIEVE THRESHOLD VOLTAGE CONTROL IN CMOS DEVICE FABRICATION WITH HIGH-K DIELECTRICS
51
Patent #:
Issue Dt:
01/23/2007
Application #:
10957833
Filing Dt:
10/04/2004
Publication #:
Pub Dt:
02/24/2005
Title:
SOI WAFERS WITH 30-100 ¿ BURIED OXIDE (BOX) CREATED BY WAFER BONDING USING 30-100 ¿ THIN OXIDE AS BONDING LAYER
52
Patent #:
Issue Dt:
10/21/2008
Application #:
10958717
Filing Dt:
10/05/2004
Publication #:
Pub Dt:
04/06/2006
Title:
HYBRID ORIENTATION CMOS WITH PARTIAL INSULATION PROCESS
53
Patent #:
Issue Dt:
09/30/2008
Application #:
10959938
Filing Dt:
10/06/2004
Publication #:
Pub Dt:
04/21/2005
Title:
SYSTEM AND METHOD OF TRANSFER PRINTING AN ORGANIC SEMICONDUCTOR
54
Patent #:
Issue Dt:
07/24/2007
Application #:
10960730
Filing Dt:
10/07/2004
Publication #:
Pub Dt:
04/13/2006
Title:
ARCHITECTURAL LEVEL THROUGHPUT BASED POWER MODELING METHODOLOGY AND APPARATUS FOR PERVASIVELY CLOCK-GATED PROCESSOR CORES
55
Patent #:
Issue Dt:
05/29/2007
Application #:
10962121
Filing Dt:
10/08/2004
Publication #:
Pub Dt:
03/31/2005
Title:
METHODS FOR MODELING LATCH TRANSPARENCY
56
Patent #:
Issue Dt:
08/08/2006
Application #:
10963228
Filing Dt:
10/12/2004
Publication #:
Pub Dt:
07/07/2005
Title:
METHOD FOR SCALABLE, LOW-COST POLYSILICON CAPACITOR IN A PLANAR DRAM
57
Patent #:
Issue Dt:
01/20/2009
Application #:
10963475
Filing Dt:
10/12/2004
Publication #:
Pub Dt:
04/20/2006
Title:
APPARATUS, SYSTEM, AND METHOD FOR FACILITATING PORT TESTING OF A MULTI-PORT HOST ADAPTER
58
Patent #:
Issue Dt:
02/17/2009
Application #:
10964254
Filing Dt:
10/13/2004
Publication #:
Pub Dt:
04/13/2006
Title:
ULTRA LOW K PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION PROCESSES USING A SINGLE BIFUNCTIONAL PRECURSOR CONTAINING BOTH A SICOH MATRIX FUNCTIONALITY AND ORGANIC POROGEN FUNCTIONALITY
59
Patent #:
Issue Dt:
10/16/2007
Application #:
10964882
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
04/20/2006
Title:
MODIFIED VIA BOTTOM STRUCTURE FOR RELIABILITY ENHANCEMENT
60
Patent #:
Issue Dt:
05/29/2007
Application #:
10965031
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD OF FORMING LOW RESISTANCE AND RELIABLE VIA IN INTER-LEVEL DIELECTRIC INTERCONNECT
61
Patent #:
Issue Dt:
08/08/2006
Application #:
10965106
Filing Dt:
10/14/2004
Publication #:
Pub Dt:
04/20/2006
Title:
MULTI-THRESHOLD COMPLEMENTARY METAL-OXIDE SEMICONDUCTOR (MTCMOS) BUS CIRCUIT AND METHOD FOR REDUCING BUS POWER CONSUMPTION VIA PULSED STANDBY SWITCHING
62
Patent #:
Issue Dt:
09/25/2007
Application #:
10965992
Filing Dt:
10/15/2004
Publication #:
Pub Dt:
03/03/2005
Title:
METHOD TO CONTROL DEVICE THRESHOLD OF SOI MOSFET'S
63
Patent #:
Issue Dt:
02/12/2008
Application #:
10966202
Filing Dt:
10/15/2004
Publication #:
Pub Dt:
04/20/2006
Title:
MICROELECTRONIC DEVICES AND METHODS
64
Patent #:
Issue Dt:
02/19/2008
Application #:
10966301
Filing Dt:
10/15/2004
Publication #:
Pub Dt:
10/13/2005
Title:
PROCESS OF REMOVING RESIDUE FROM A PRECISION SURFACE USING LIQUID OR SUPERCRITICAL CARBON DIOXIDE COMPOSITION
65
Patent #:
Issue Dt:
07/17/2007
Application #:
10966492
Filing Dt:
10/15/2004
Publication #:
Pub Dt:
04/20/2006
Title:
METHOD FOR OPTIMIZING INTEGRATED CIRCUIT DEVICE DESIGN AND SERVICE
66
Patent #:
Issue Dt:
05/02/2006
Application #:
10967035
Filing Dt:
10/15/2004
Publication #:
Pub Dt:
03/03/2005
Title:
METHOD OF MAKING A CIRCUITIZED SUBSTRATE
67
Patent #:
Issue Dt:
09/16/2008
Application #:
10968181
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
04/20/2006
Title:
SYSTEM AND METHOD FOR SENSOR REPLICATION FOR ENSEMBLE AVERAGING IN MICRO-ELECTROMECHANICAL SYSTEMS (MEMS)
68
Patent #:
Issue Dt:
10/14/2008
Application #:
10968917
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
05/11/2006
Title:
SYSTEM AND METHOD FOR PROBLEM DETERMINATION USING DEPENDENCY GRAPHS AND RUN-TIME BEHAVIOR MODELS
69
Patent #:
Issue Dt:
05/27/2008
Application #:
10969684
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
03/17/2005
Title:
METHOD OF MAKING A PRINTED WIRING BOARD WITH CONFORMALLY PLATED CIRCUIT TRACES
70
Patent #:
NONE
Issue Dt:
Application #:
10969705
Filing Dt:
10/20/2004
Publication #:
Pub Dt:
03/24/2005
Title:
Structure and method for eliminating metal contact to P-well or N-well shorts or high leakage paths using polysilicon liner
71
Patent #:
Issue Dt:
09/25/2007
Application #:
10970458
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
04/27/2006
Title:
HANDLING OF THE TRANSMIT ENABLE SIGNAL IN A DYNAMIC RANDOM ACCESS MEMORY CONTROLLER
72
Patent #:
Issue Dt:
06/24/2008
Application #:
10970469
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
04/27/2006
Title:
METHOD, SYSTEM AND PROGRAM PRODUCT FOR DEFINING AND RECORDING MINIUM AND MAXIMUM EVENT COUNTS OF A SIMULATION UTILIZING A HIGH LEVEL LANGUAGE
73
Patent #:
Issue Dt:
04/25/2006
Application #:
10970522
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
04/27/2006
Title:
METHOD AND SUM ADDRESSED CELL ENCODER FOR ENHANCED COMPARE AND SEARCH TIMING FOR CAM COMPARE
74
Patent #:
Issue Dt:
08/08/2006
Application #:
10970524
Filing Dt:
10/21/2004
Publication #:
Pub Dt:
04/27/2006
Title:
METHOD AND STRUCTURE TO CONTROL COMMON MODE IMPEDANCE IN FAN-OUT REGIONS
75
Patent #:
Issue Dt:
10/03/2006
Application #:
10971238
Filing Dt:
10/22/2004
Publication #:
Pub Dt:
03/10/2005
Title:
METHOD OF CLOSING AN ANTIFUSE USING LASER ENERGY
76
Patent #:
Issue Dt:
11/13/2007
Application #:
10971947
Filing Dt:
10/22/2004
Publication #:
Pub Dt:
03/10/2005
Title:
SYSTEM ON A CHIP BUS WITH AUTOMATIC PIPELINE STAGE INSERTION FOR TIMING CLOSURE
77
Patent #:
Issue Dt:
09/05/2006
Application #:
10972696
Filing Dt:
10/25/2004
Publication #:
Pub Dt:
05/11/2006
Title:
SYSTEM AND METHOD FOR IMPROVING SPATIAL RESOLUTION OF ELECTRON HOLOGRAPHY
78
Patent #:
Issue Dt:
11/28/2006
Application #:
10973366
Filing Dt:
10/26/2004
Publication #:
Pub Dt:
05/11/2006
Title:
SRAM RING OSCILLATOR
79
Patent #:
NONE
Issue Dt:
Application #:
10973683
Filing Dt:
10/26/2004
Publication #:
Pub Dt:
04/27/2006
Title:
Material and process for etched structure filling and planarizing
80
Patent #:
Issue Dt:
02/10/2009
Application #:
10976068
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
04/28/2005
Title:
ALUMINUM NITRIDE AND ALUMINUM OXIDE/ALUMINUM NITRIDE HETEROSTRUCTURE GATE DIELECTRIC STACK BASED FIELD EFFECT TRANSISTORS AND METHOD FOR FORMING SAME
81
Patent #:
Issue Dt:
12/13/2005
Application #:
10976598
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/05/2005
Title:
MAGNETIC RANDOM ACCESS MEMORY USING MEMORY CELLS WITH ROTATED MAGNETIC STORAGE ELEMENTS
82
Patent #:
Issue Dt:
06/30/2009
Application #:
10977159
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/04/2006
Title:
METHOD FOR HIGH-DENSITY PACKAGING AND COOLING OF HIGH-POWERED COMPUTE AND STORAGE SERVER BLADES
83
Patent #:
Issue Dt:
10/30/2007
Application #:
10977432
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/18/2006
Title:
DYNAMIC MEMORY ARCHITECTURE EMPLOYING PASSIVE EXPIRATION OF DATA
84
Patent #:
Issue Dt:
09/12/2006
Application #:
10977667
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/05/2005
Title:
INTEGRATED LINE DRIVER
85
Patent #:
Issue Dt:
07/10/2007
Application #:
10977768
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/04/2006
Title:
FINFET BODY CONTACT STRUCTURE
86
Patent #:
Issue Dt:
02/17/2009
Application #:
10978028
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SCANNING PROBE-BASED LITHOGRAPHY METHOD
87
Patent #:
Issue Dt:
06/10/2008
Application #:
10978056
Filing Dt:
10/30/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SYSTEMS AND METHODS FOR STORAGE AREA NETWORK DESIGN
88
Patent #:
Issue Dt:
10/24/2006
Application #:
10978067
Filing Dt:
10/28/2004
Publication #:
Pub Dt:
05/04/2006
Title:
POWER GATING TECHNIQUES ABLE TO HAVE DATA RETENTION AND VARIABILITY IMMUNITY PROPERTIES
89
Patent #:
Issue Dt:
01/11/2011
Application #:
10978389
Filing Dt:
11/02/2004
Publication #:
Pub Dt:
05/18/2006
Title:
SYSTEM AND METHOD FOR RECOVERY OF DATA FOR A LOST SECTOR IN A STORAGE SYSTEM
90
Patent #:
Issue Dt:
09/25/2007
Application #:
10978715
Filing Dt:
11/01/2004
Publication #:
Pub Dt:
05/04/2006
Title:
HETERO-INTEGRATED STRAINED SILICON N-AND P-MOSFETS
91
Patent #:
Issue Dt:
12/13/2005
Application #:
10979366
Filing Dt:
11/01/2004
Publication #:
Pub Dt:
03/24/2005
Title:
PRINTED WIRING BOARD INTERPOSER SUB-ASSEMBLY AND METHOD
92
Patent #:
Issue Dt:
01/20/2009
Application #:
10979633
Filing Dt:
11/02/2004
Publication #:
Pub Dt:
05/04/2006
Title:
Field effect transistor including damascene gate with an internal spacer structure
93
Patent #:
Issue Dt:
01/09/2007
Application #:
10980220
Filing Dt:
11/03/2004
Publication #:
Pub Dt:
07/07/2005
Title:
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN <110> SI UNDER BIAXIAL COMPRESSIVE STRAIN
94
Patent #:
Issue Dt:
01/22/2008
Application #:
10980365
Filing Dt:
11/03/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SILICON CONTAINING TARC / BARRIER LAYER
95
Patent #:
Issue Dt:
11/07/2006
Application #:
10981155
Filing Dt:
11/04/2004
Publication #:
Pub Dt:
05/04/2006
Title:
NOVEL CIRCUIT FOR MINIMIZING FILTER CAPACITANCE LEAKAGE INDUCED JITTER IN PHASE LOCKED LOOPS (PLLS)
96
Patent #:
Issue Dt:
02/26/2008
Application #:
10981233
Filing Dt:
11/04/2004
Publication #:
Pub Dt:
05/04/2006
Title:
HARDMASK FOR RELIABILITY OF SILICON BASED DIELECTRICS
97
Patent #:
Issue Dt:
03/13/2012
Application #:
10981926
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
03/24/2005
Title:
DUAL MAGNETIC TUNNEL JUNCTION SENSOR WITH A LONGITUDINAL BIAS STACK
98
Patent #:
Issue Dt:
12/04/2007
Application #:
10982411
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
06/16/2005
Title:
USE OF HYDROGEN IMPLANTATION TO IMPROVE MATERIAL PROPERTIES OF SILICON-GERMANIUM-ON-INSULATOR MATERIAL MADE BY THERMAL DIFFUSION
99
Patent #:
Issue Dt:
10/04/2011
Application #:
10982575
Filing Dt:
11/05/2004
Publication #:
Pub Dt:
05/11/2006
Title:
METHOD FOR THERMAL CHARACTERIZATION UNDER NON-UNIFORM HEAT LOAD
100
Patent #:
Issue Dt:
03/27/2007
Application #:
10983345
Filing Dt:
11/08/2004
Publication #:
Pub Dt:
05/11/2006
Title:
SYSTEM AND METHOD FOR PLASMA INDUCED MODIFICATION AND IMPROVEMENT OF CRITICAL DIMENSION UNIFORMITY
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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