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Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14793
Page 38 of 148
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1
Patent #:
7098057
Issue Dt:
08/29/2006
Application #:
10983488
Filing Dt:
11/08/2004
Publication #:
US20050127392
Pub Dt:
06/16/2005
Title:
ULTRA HIGH-SPEED SI/SIGE MODULATION-DOPED FIELD EFFECT TRANSISTORS ON ULTRA THIN SOI/SGOI SUBSTRATE
2
Patent #:
7078802
Issue Dt:
07/18/2006
Application #:
10983563
Filing Dt:
11/08/2004
Publication #:
US20050064106
Pub Dt:
03/24/2005
Title:
METHOD FOR BONDING HEAT SINKS TO OVERMOLD MATERIAL AND RESULTING STRUCTURE
3
Patent #:
7401312
Issue Dt:
07/15/2008
Application #:
10983819
Filing Dt:
11/08/2004
Publication #:
US20050132319
Pub Dt:
06/16/2005
Title:
AUTOMATIC METHOD FOR ROUTING AND DESIGNING AN LSI
4
Patent #:
7031178
Issue Dt:
04/18/2006
Application #:
10984055
Filing Dt:
11/09/2004
Publication #:
US20050094427
Pub Dt:
05/05/2005
Title:
MAGNETIC SHIFT REGISTER WITH SHIFTABLE MAGNETIC DOMAINS BETWEEN TWO REGIONS, AND METHOD OF USING THE SAME
5
Patent #:
7501318
Issue Dt:
03/10/2009
Application #:
10984212
Filing Dt:
11/09/2004
Publication #:
US20050095803
Pub Dt:
05/05/2005
Title:
FORMATION OF SILICON-GERMANIUM-ON-INSULATOR (SGOI) BY AN INTEGRAL HIGH TEMPERATURE SIMOX-GE INTERDIFFUSION ANNEAL
6
Patent #:
7393777
Issue Dt:
07/01/2008
Application #:
10984439
Filing Dt:
11/09/2004
Publication #:
US20050085064
Pub Dt:
04/21/2005
Title:
SACRIFICIAL METAL SPACER DAMASCENE PROCESS
7
Patent #:
6987289
Issue Dt:
01/17/2006
Application #:
10984578
Filing Dt:
11/09/2004
Publication #:
US20050082578
Pub Dt:
04/21/2005
Title:
HIGH-DENSITY FINFET INTEGRATION SCHEME
8
Patent #:
7193904
Issue Dt:
03/20/2007
Application #:
10985453
Filing Dt:
11/10/2004
Publication #:
US20060098499
Pub Dt:
05/11/2006
Title:
RANDOM ACCESS MEMORY WITH STABILITY ENHANCEMENT AND EARLY READ ELIMINATION
9
Patent #:
7309529
Issue Dt:
12/18/2007
Application #:
10985455
Filing Dt:
11/10/2004
Publication #:
US20050064199
Pub Dt:
03/24/2005
Title:
STRUCTURE AND METHOD FOR IMPROVED ADHESION BETWEEN TWO POLYMER FILMS
10
Patent #:
7499970
Issue Dt:
03/03/2009
Application #:
10986577
Filing Dt:
11/12/2004
Publication #:
US20060106927
Pub Dt:
05/18/2006
Title:
METHOD AND SYSTEM FOR SUPERVISOR PARTITIONING OF CLIENT RESOURCES
11
Patent #:
NONE
Issue Dt:
Application #:
10986595
Filing Dt:
11/12/2004
Publication #:
US20050130236
Pub Dt:
06/16/2005
Title:
Method, system, and apparatus for measurement and recording of blood chemistry and other physiological measurements
12
Patent #:
7351360
Issue Dt:
04/01/2008
Application #:
10986665
Filing Dt:
11/12/2004
Publication #:
US20060112857
Pub Dt:
06/01/2006
Title:
SELF ORIENTING MICRO PLATES OF THERMALLY CONDUCTING MATERIAL AS COMPONENT IN THERMAL PASTE OR ADHESIVE
13
Patent #:
7353131
Issue Dt:
04/01/2008
Application #:
10986773
Filing Dt:
11/15/2004
Publication #:
US20050144577
Pub Dt:
06/30/2005
Title:
METHOD AND SYSTEM FOR LOGIC VERIFICATION USING MIRROR INTERFACE
14
Patent #:
7087477
Issue Dt:
08/08/2006
Application #:
10987532
Filing Dt:
11/12/2004
Publication #:
US20050121676
Pub Dt:
06/09/2005
Title:
FINFET SRAM CELL USING LOW MOBILITY PLANE FOR CELL STABILITY AND METHOD FOR FORMING
15
Patent #:
7130212
Issue Dt:
10/31/2006
Application #:
10987749
Filing Dt:
11/12/2004
Publication #:
US20050111252
Pub Dt:
05/26/2005
Title:
FIELD EFFECT DEVICE WITH A CHANNEL WITH A SWITCHABLE CONDUCTIVITY
16
Patent #:
7230334
Issue Dt:
06/12/2007
Application #:
10987985
Filing Dt:
11/12/2004
Publication #:
US20060103011
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT CHIP PACKAGES HAVING INTEGRATED MICROCHANNEL COOLING MODULES
17
Patent #:
7544883
Issue Dt:
06/09/2009
Application #:
10988015
Filing Dt:
11/12/2004
Publication #:
US20060102223
Pub Dt:
05/18/2006
Title:
INTEGRATED THERMOELECTRIC COOLING DEVICES AND METHODS FOR FABRICATING SAME
18
Patent #:
7323761
Issue Dt:
01/29/2008
Application #:
10988132
Filing Dt:
11/12/2004
Publication #:
US20060102982
Pub Dt:
05/18/2006
Title:
ANTIFUSE STRUCTURE HAVING AN INTEGRATED HEATING ELEMENT
19
Patent #:
7217496
Issue Dt:
05/15/2007
Application #:
10988137
Filing Dt:
11/12/2004
Publication #:
US20060105269
Pub Dt:
05/18/2006
Title:
FLUORINATED PHOTORESIST MATERIALS WITH IMPROVED ETCH RESISTANT PROPERTIES
20
Patent #:
7128135
Issue Dt:
10/31/2006
Application #:
10988215
Filing Dt:
11/12/2004
Publication #:
US20060102324
Pub Dt:
05/18/2006
Title:
COOLING DEVICE USING MULTIPLE FANS AND HEAT SINKS
21
Patent #:
7458413
Issue Dt:
12/02/2008
Application #:
10988219
Filing Dt:
11/12/2004
Publication #:
US20060102318
Pub Dt:
05/18/2006
Title:
SEMICONDUCTOR CHIP HEAT TRANSFER DEVICE
22
Patent #:
7613368
Issue Dt:
11/03/2009
Application #:
10988220
Filing Dt:
11/12/2004
Publication #:
US20060105607
Pub Dt:
05/18/2006
Title:
MIXED ELECTRICAL AND OPTICAL LGA INTERPOSER FOR FACILITATING CHIP TO BOARD COMMUNICATIONS BY DUAL SIGNAL TYPES
23
Patent #:
NONE
Issue Dt:
Application #:
10988484
Filing Dt:
11/12/2004
Publication #:
US20060103023
Pub Dt:
05/18/2006
Title:
Methods for incorporating high k dielectric materials for enhanced SRAM operation and structures produced thereby
24
Patent #:
7242055
Issue Dt:
07/10/2007
Application #:
10988733
Filing Dt:
11/15/2004
Publication #:
US20060102968
Pub Dt:
05/18/2006
Title:
NITROGEN-CONTAINING FIELD EFFECT TRANSISTOR GATE STACK CONTAINING A THRESHOLD VOLTAGE CONTROL LAYER FORMED VIA DEPOSITION OF A METAL OXIDE
25
Patent #:
8721952
Issue Dt:
05/13/2014
Application #:
10989078
Filing Dt:
11/16/2004
Publication #:
US20060105571
Pub Dt:
05/18/2006
Title:
PNEUMATIC METHOD AND APPARATUS FOR NANO IMPRINT LITHOGRAPHY HAVING A CONFORMING MASK
26
Patent #:
7098070
Issue Dt:
08/29/2006
Application #:
10990252
Filing Dt:
11/16/2004
Publication #:
US20060105496
Pub Dt:
05/18/2006
Title:
DEVICE AND METHOD FOR FABRICATING DOUBLE-SIDED SOI WAFER SCALE PACKAGE WITH THROUGH VIA CONNECTIONS
27
Patent #:
NONE
Issue Dt:
Application #:
10990300
Filing Dt:
11/15/2004
Publication #:
US20060105559
Pub Dt:
05/18/2006
Title:
Ultrathin buried insulators in Si or Si-containing material
28
Patent #:
7313013
Issue Dt:
12/25/2007
Application #:
10990401
Filing Dt:
11/18/2004
Publication #:
US20060104110
Pub Dt:
05/18/2006
Title:
SPIN-CURRENT SWITCHABLE MAGNETIC MEMORY ELEMENT AND METHOD OF FABRICATING THE MEMORY ELEMENT
29
Patent #:
7387911
Issue Dt:
06/17/2008
Application #:
10990778
Filing Dt:
11/16/2004
Publication #:
US20060105547
Pub Dt:
05/18/2006
Title:
APPLICATION OF A THERMALLY CONDUCTIVE THIN FILM TO A WAFER BACKSIDE PRIOR TO DICING TO PREVENT CHIPPING AND CRACKING
30
Patent #:
7582534
Issue Dt:
09/01/2009
Application #:
10991582
Filing Dt:
11/18/2004
Publication #:
US20060105523
Pub Dt:
05/18/2006
Title:
CHEMICAL DOPING OF NANO-COMPONENTS
31
Patent #:
7344955
Issue Dt:
03/18/2008
Application #:
10992072
Filing Dt:
11/19/2004
Publication #:
US20060110890
Pub Dt:
05/25/2006
Title:
CUT-AND-PASTE IMPRINT LITHOGRAPHIC MOLD AND METHOD THEREFOR
32
Patent #:
7141457
Issue Dt:
11/28/2006
Application #:
10992150
Filing Dt:
11/18/2004
Publication #:
US20060105507
Pub Dt:
05/18/2006
Title:
METHOD TO FORM SI-CONTAINING SOI AND UNDERLYING SUBSTRATE WITH DIFFERENT ORIENTATIONS
33
Patent #:
7326857
Issue Dt:
02/05/2008
Application #:
10992399
Filing Dt:
11/18/2004
Publication #:
US20060101638
Pub Dt:
05/18/2006
Title:
METHOD AND STRUCTURE FOR CREATING PRINTED CIRCUIT BOARDS WITH STEPPED THICKNESS
34
Patent #:
6949764
Issue Dt:
09/27/2005
Application #:
10993244
Filing Dt:
11/19/2004
Publication #:
US20050087805
Pub Dt:
04/28/2005
Title:
FULLY-DEPLETED-COLLECTOR SILICON-ON-INSULATOR (SOI) BIPOLAR TRANSISTOR USEFUL ALONE OR IN SOI BICMOS
35
Patent #:
7317226
Issue Dt:
01/08/2008
Application #:
10993270
Filing Dt:
11/19/2004
Publication #:
US20050090080
Pub Dt:
04/28/2005
Title:
PATTERNED SOI BY OXYGEN IMPLANTATION AND ANNEALING
36
Patent #:
8089133
Issue Dt:
01/03/2012
Application #:
10993305
Filing Dt:
11/19/2004
Publication #:
US20050078376
Pub Dt:
04/14/2005
Title:
OPTICAL ASSEMBLIES FOR TRANSMITTING AND MANIPULATING OPTICAL BEAMS
37
Patent #:
7440986
Issue Dt:
10/21/2008
Application #:
10993567
Filing Dt:
11/19/2004
Publication #:
US20050138050
Pub Dt:
06/23/2005
Title:
METHOD FOR ESTIMATING STORAGE REQUIREMENTS FOR A MULTI-DIMENSIONAL CLUSTERING DATA CONFIGURATION
38
Patent #:
7005319
Issue Dt:
02/28/2006
Application #:
10993941
Filing Dt:
11/19/2004
Title:
GLOBAL PLANARIZATION OF WAFER SCALE PACKAGE WITH PRECISION DIE THICKNESS CONTROL
39
Patent #:
7405108
Issue Dt:
07/29/2008
Application #:
10994494
Filing Dt:
11/20/2004
Publication #:
US20060110851
Pub Dt:
05/25/2006
Title:
METHODS FOR FORMING CO-PLANAR WAFER-SCALE CHIP PACKAGES
40
Patent #:
7442579
Issue Dt:
10/28/2008
Application #:
10994574
Filing Dt:
11/22/2004
Publication #:
US20060110852
Pub Dt:
05/25/2006
Title:
METHODS TO ACHIEVE PRECISION ALIGNMENT FOR WAFER SCALE PACKAGES
41
Patent #:
NONE
Issue Dt:
Application #:
10994742
Filing Dt:
11/22/2004
Publication #:
US20060109940
Pub Dt:
05/25/2006
Title:
Timing bias compensation for a data receiver with decision-feedback equalizer
42
Patent #:
7208133
Issue Dt:
04/24/2007
Application #:
10994944
Filing Dt:
11/22/2004
Publication #:
US20060110313
Pub Dt:
05/25/2006
Title:
METHOD FOR THE PREPARATION OF IV-VI SEMICONDUCTOR NANOPARTICLES
43
Patent #:
7180320
Issue Dt:
02/20/2007
Application #:
10995791
Filing Dt:
11/23/2004
Publication #:
US20050162181
Pub Dt:
07/28/2005
Title:
ADAPTIVE INTEGRATED CIRCUIT BASED ON TRANSISTOR CURRENT MEASUREMENTS
44
Patent #:
7092280
Issue Dt:
08/15/2006
Application #:
10996284
Filing Dt:
11/22/2004
Publication #:
US20060109706
Pub Dt:
05/25/2006
Title:
SRAM WITH DYNAMICALLY ASYMMETRIC CELL
45
Patent #:
7392493
Issue Dt:
06/24/2008
Application #:
10996292
Filing Dt:
11/22/2004
Publication #:
US20060112364
Pub Dt:
05/25/2006
Title:
TECHNIQES FOR SUPER FAST BUFFER INSERTION
46
Patent #:
7296252
Issue Dt:
11/13/2007
Application #:
10996293
Filing Dt:
11/22/2004
Publication #:
US20060031804
Pub Dt:
02/09/2006
Title:
CLUSTERING TECHNIQUES FOR FASTER AND BETTER PLACEMENT OF VLSI CIRCUITS
47
Patent #:
7180818
Issue Dt:
02/20/2007
Application #:
10996311
Filing Dt:
11/22/2004
Publication #:
US20060109733
Pub Dt:
05/25/2006
Title:
HIGH PERFORMANCE REGISTER FILE WITH BOOTSTRAPPED STORAGE SUPPLY AND METHOD OF READING DATA THEREFORM
48
Patent #:
7378895
Issue Dt:
05/27/2008
Application #:
10996312
Filing Dt:
11/23/2004
Publication #:
US20060109042
Pub Dt:
05/25/2006
Title:
ON-CHIP ELECTRICALLY ALTERABLE RESISTOR
49
Patent #:
7323370
Issue Dt:
01/29/2008
Application #:
10997597
Filing Dt:
11/24/2004
Publication #:
US20050087804
Pub Dt:
04/28/2005
Title:
SOI DEVICE WITH REDUCED JUNCTION CAPACITANCE
50
Patent #:
NONE
Issue Dt:
Application #:
10998394
Filing Dt:
11/29/2004
Publication #:
US20060115590
Pub Dt:
06/01/2006
Title:
Method and system for performing in-situ cleaning of a deposition system
51
Patent #:
7432550
Issue Dt:
10/07/2008
Application #:
10998840
Filing Dt:
11/30/2004
Publication #:
US20050095815
Pub Dt:
05/05/2005
Title:
SEMICONDUCTOR STRUCTURE INCLUDING MIXED RARE EARTH OXIDE FORMED ON SILICON
52
Patent #:
7008852
Issue Dt:
03/07/2006
Application #:
11001140
Filing Dt:
12/02/2004
Publication #:
US20050093053
Pub Dt:
05/05/2005
Title:
DISCONTINUOUS DIELECTRIC INTERFACE FOR BIPOLAR TRANSISTORS
53
Patent #:
NONE
Issue Dt:
Application #:
11001913
Filing Dt:
12/02/2004
Publication #:
US20050106788
Pub Dt:
05/19/2005
Title:
CMOS STRUCTURES INCLUDING AT LEAST ONE ALLOY SILICIDE METAL GATE
54
Patent #:
7367001
Issue Dt:
04/29/2008
Application #:
11002525
Filing Dt:
12/02/2004
Publication #:
US20060122817
Pub Dt:
06/08/2006
Title:
METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR VERIFICATION OF DIGITAL DESIGNS USING CASE-SPLITTING VIA CONSTRAINED INTERNAL SIGNALS
55
Patent #:
7656237
Issue Dt:
02/02/2010
Application #:
11002559
Filing Dt:
12/02/2004
Publication #:
US20060119445
Pub Dt:
06/08/2006
Title:
METHOD TO GATE OFF PLLS IN A DEEP POWER SAVING STATE WITHOUT SEPARATE CLOCK DISTRIBUTION FOR POWER MANAGEMENT LOGIC
56
Patent #:
7275222
Issue Dt:
09/25/2007
Application #:
11002686
Filing Dt:
12/02/2004
Publication #:
US20060123374
Pub Dt:
06/08/2006
Title:
METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR ENHANCING A POWER DISTRIBUTION SYSTEM IN A CERAMIC INTEGRATED CIRCUIT PACKAGE
57
Patent #:
NONE
Issue Dt:
Application #:
11002704
Filing Dt:
12/03/2004
Publication #:
US20050170095
Pub Dt:
08/04/2005
Title:
Method and apparatus for forming a chemical gradient on a substrate
58
Patent #:
7101745
Issue Dt:
09/05/2006
Application #:
11003717
Filing Dt:
12/03/2004
Publication #:
US20050106796
Pub Dt:
05/19/2005
Title:
METHOD OF FORMING LADDER-TYPE GATE STRUCTURE FOR FOUR-TERMINAL SOI SEMICONDUCTOR DEVICE
59
Patent #:
7132318
Issue Dt:
11/07/2006
Application #:
11003988
Filing Dt:
12/04/2004
Publication #:
US20050098799
Pub Dt:
05/12/2005
Title:
METHOD OF ASSESSING POTENTIAL FOR CHARGING DAMAGE IN SOI DESIGNS AND STRUCTURES FOR ELIMINATING POTENTIAL FOR DAMAGE
60
Patent #:
7236386
Issue Dt:
06/26/2007
Application #:
11004413
Filing Dt:
12/04/2004
Publication #:
US20060120132
Pub Dt:
06/08/2006
Title:
SYSTEM AND METHOD FOR TRANSFERRING DATA TO AND FROM A MAGNETIC SHIFT REGISTER WITH A SHIFTABLE DATA COLUMN
61
Patent #:
RE40339
Issue Dt:
05/27/2008
Application #:
11004791
Filing Dt:
12/03/2004
Title:
SILICON-ON-INSULATOR CHIP HAVING AN ISOLATION BARRIER FOR RELIABILITY
62
Patent #:
8242544
Issue Dt:
08/14/2012
Application #:
11004845
Filing Dt:
12/07/2004
Publication #:
US20050095841
Pub Dt:
05/05/2005
Title:
SEMICONDUCTOR STRUCTURE HAVING REDUCED AMINE-BASED CONTAMINANTS
63
Patent #:
7334320
Issue Dt:
02/26/2008
Application #:
11004846
Filing Dt:
12/07/2004
Publication #:
US20050121741
Pub Dt:
06/09/2005
Title:
METHOD OF MAKING AN ELECTRONIC FUSE WITH IMPROVED ESD TOLERANCE
64
Patent #:
NONE
Issue Dt:
Application #:
11004876
Filing Dt:
12/07/2004
Publication #:
US20050110288
Pub Dt:
05/26/2005
Title:
Dynamic release wafer grip and method of use
65
Patent #:
7282423
Issue Dt:
10/16/2007
Application #:
11005659
Filing Dt:
12/07/2004
Publication #:
US20050104139
Pub Dt:
05/19/2005
Title:
METHOD OF FORMING FET WITH T-SHAPED GATE
66
Patent #:
7487065
Issue Dt:
02/03/2009
Application #:
11008791
Filing Dt:
12/09/2004
Publication #:
US20060129996
Pub Dt:
06/15/2006
Title:
EXECUTING AN OVERALL QUANTITY OF DATA PROCESSING WITHIN AN OVERALL PROCESSING PERIOD
67
Patent #:
7229909
Issue Dt:
06/12/2007
Application #:
11008800
Filing Dt:
12/09/2004
Publication #:
US20060128137
Pub Dt:
06/15/2006
Title:
INTEGRATED CIRCUIT CHIP UTILIZING DIELECTRIC LAYER HAVING ORIENTED CYLINDRICAL VOIDS FORMED FROM CARBON NANOTUBES
68
Patent #:
7308661
Issue Dt:
12/11/2007
Application #:
11008812
Filing Dt:
12/09/2004
Publication #:
US20060129965
Pub Dt:
06/15/2006
Title:
METHOD AND APPARATUS FOR CHARACTERISTIC IMPEDANCE DISCONTINUITY REDUCTION IN HIGH-SPEED FLEXIBLE CIRCUIT APPLICATIONS
69
Patent #:
7322017
Issue Dt:
01/22/2008
Application #:
11011245
Filing Dt:
12/14/2004
Publication #:
US20060129958
Pub Dt:
06/15/2006
Title:
METHOD FOR VERIFICATION USING REACHABILITY OVERAPPROXIMATION
70
Patent #:
7370292
Issue Dt:
05/06/2008
Application #:
11011246
Filing Dt:
12/14/2004
Publication #:
US20060129952
Pub Dt:
06/15/2006
Title:
METHOD FOR INCREMENTAL DESIGN REDUCTION VIA ITERATIVE OVERAPPROXIMATION AND RE-ENCODING STRATEGIES
71
Patent #:
7484118
Issue Dt:
01/27/2009
Application #:
11013728
Filing Dt:
12/16/2004
Publication #:
US20050149802
Pub Dt:
07/07/2005
Title:
MULTI NODAL COMPUTER SYSTEM AND METHOD FOR HANDLING CHECK STOPS IN THE MULTI NODAL COMPUTER SYSTEM
72
Patent #:
7326523
Issue Dt:
02/05/2008
Application #:
11013971
Filing Dt:
12/16/2004
Publication #:
US20060134546
Pub Dt:
06/22/2006
Title:
LOW REFRACTIVE INDEX POLYMERS AS UNDERLAYERS FOR SILICON-CONTAINING PHOTORESISTS
73
Patent #:
7442583
Issue Dt:
10/28/2008
Application #:
11016219
Filing Dt:
12/17/2004
Publication #:
US20060136751
Pub Dt:
06/22/2006
Title:
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7268577
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Filing Dt:
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Publication #:
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Pub Dt:
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Title:
CHANGING CHIP FUNCTION BASED ON FUSE STATES
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Pub Dt:
06/29/2006
Title:
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07/14/2009
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Filing Dt:
12/28/2004
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Pub Dt:
07/13/2006
Title:
METHODS AND APPARATUS FOR TESTING A MEMORY
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01/03/2005
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Pub Dt:
07/06/2006
Title:
DIFFERENCE SIGNAL PATH TEST AND CHARACTERIZATION CIRCUIT
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11028425
Filing Dt:
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Publication #:
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Pub Dt:
07/21/2005
Title:
Metal-insulator-metal capacitor and method of fabrication
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Pub Dt:
07/06/2006
Title:
METHOD AND APPARATUS FOR DIRECT REFERENCING OF TOP SURFACE OF WORKPIECE DURING IMPRINT LITHOGRAPHY
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07/29/2008
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Pub Dt:
07/06/2006
Title:
STRESSED FIELD EFFECT TRANSISTORS ON HYBRID ORIENTATION SUBSTRATE
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03/10/2009
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Pub Dt:
07/06/2006
Title:
METHOD FOR GENERATING DESIGN RULES FOR A LITHOGRAPHIC MASK DESIGN THAT INCLUDES LONG RANGE FLARE EFFECTS
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01/06/2009
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Pub Dt:
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Title:
HIGH-QUALITY SGOI BY OXIDATION NEAR THE ALLOY MELTING TEMPERATURE
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07/10/2007
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Pub Dt:
06/09/2005
Title:
MANUFACTURING METHODS FOR PRINTED CIRCUIT BOARDS
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06/01/2010
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Pub Dt:
07/14/2005
Title:
A METHOD OF FORMING A MAGNETIC-FIELD SENSOR HAVING MAGNETIC NANOPARTICLES
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07/22/2008
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Pub Dt:
06/09/2005
Title:
FLEXIBLE ROW REDUNDANCY SYSTEM
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01/07/2005
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Pub Dt:
07/13/2006
Title:
METHOD FOR FABRICATING LOW-DEFECT-DENSITY CHANGED ORIENTATION SI
87
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03/20/2012
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01/07/2005
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Pub Dt:
07/13/2006
Title:
QUASI-HYDROPHOBIC SI-SI WAFER BONDING USING HYDROPHILIC SI SURFACES AND DISSOLUTION OF INTERFACIAL BONDING OXIDE
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Pub Dt:
07/13/2006
Title:
SELF-ALIGNED PROCESS FOR NANOTUBE/NANOWIRE FETS
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06/12/2007
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Filing Dt:
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Publication #:
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Pub Dt:
04/20/2006
Title:
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03/14/2006
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Title:
MEMBRANE PROBE WITH ANCHORED ELEMENTS
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11/20/2007
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01/11/2005
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Pub Dt:
07/13/2006
Title:
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7305641
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12/04/2007
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01/12/2005
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07/13/2006
Title:
METHOD AND SYSTEM TO REDISTRIBUTE WHITE SPACE FOR MINIMIZING WIRE LENGTH
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Title:
IMPACT CHECKING TECHNIQUE
94
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04/15/2008
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02/21/2008
Title:
ULTRALOW DIELECTRIC CONSTANT LAYER WITH CONTROLLED BIAXIAL STRESS
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05/13/2008
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01/13/2005
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Pub Dt:
07/13/2006
Title:
MULTILAYER HARDMASK SCHEME FOR DAMAGE-FREE DUAL DAMASCENE PROCESSING OF SICOH DIELECTRICS
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02/23/2010
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11034597
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Pub Dt:
07/27/2006
Title:
TIC AS A THERMALLY STABLE P-METAL CARBIDE ON HIGH K SIO2 GATE STACKS
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7105445
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07/20/2006
Title:
INTERCONNECT STRUCTURES WITH ENCASING CAP AND METHODS OF MAKING THEREOF
98
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NONE
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11035369
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01/13/2005
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US20060151846
Pub Dt:
07/13/2006
Title:
Method of forming HfSiN metal for n-FET applications
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01/12/2005
Publication #:
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Pub Dt:
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Title:
Filling high aspect ratio isolation structures with polysilazane based material
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7446974
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11/04/2008
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11036148
Filing Dt:
01/14/2005
Publication #:
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Pub Dt:
06/09/2005
Title:
ELECTRONIC COMPONENT AND TAPE HEAD HAVING A CLOSURE
Assignor
1
INTERNATIONAL BUSINESS MACHINES CORPORATION
Exec Dt:
06/29/2015
Assignee
1
GLOBALFOUNDRIES U.S. 2 LLC
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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