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Reel/Frame:	036550/0001			Pages:	983
		Recorded:	09/03/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14793
Page 51 of 148
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Patent #:	7562320	Issue Dt:	07/14/2009	Application #:	11532248	Filing Dt:	09/15/2006
Publication #:	US20080127012	Pub Dt:	05/29/2008
Title:	AN ASIC BASED CONVEYOR BELT STYLE PROGRAMMABLE CROSS-POINT SWITCH HARDWARE ACCELERATED SIMULATION ENGINE

Patent #:	NONE	Issue Dt:		Application #:	11532252	Filing Dt:	09/15/2006
Publication #:	US20080071489	Pub Dt:	03/20/2008
Title:	INTEGRATED CIRCUIT FOR MEASURING SET-UP AND HOLD TIMES FOR A LATCH ELEMENT

Patent #:	8241995	Issue Dt:	08/14/2012	Application #:	11532599	Filing Dt:	09/18/2006
Publication #:	US20100255262	Pub Dt:	10/07/2010
Title:	BONDING OF SUBSTRATES INCLUDING METAL-DIELECTRIC PATTERNS WITH METAL RAISED ABOVE DIELECTRIC

Patent #:	7337268	Issue Dt:	02/26/2008	Application #:	11533125	Filing Dt:	09/19/2006
Publication #:	US20070014138	Pub Dt:	01/18/2007
Title:	CONTENT ADDRESSABLE MEMORY STRUCTURE

Patent #:	7474144	Issue Dt:	01/06/2009	Application #:	11533408	Filing Dt:	09/20/2006
Publication #:	US20080068072	Pub Dt:	03/20/2008
Title:	RATIOED FEEDBACK BODY VOLTAGE BIAS GENERATOR

Patent #:	7844709	Issue Dt:	11/30/2010	Application #:	11533558	Filing Dt:	09/20/2006
Publication #:	US20080215846	Pub Dt:	09/04/2008
Title:	METHOD AND APPARATUS FOR MANAGING CENTRAL PROCESSING UNIT RESOURCES OF A LOGICALLY PARTITIONED COMPUTING ENVIRONMENT WITHOUT SHARED MEMORY ACCESS

Patent #:	NONE	Issue Dt:		Application #:	11533814	Filing Dt:	09/21/2006
Publication #:	US20080077889	Pub Dt:	03/27/2008
Title:	PARAMETERIZED SEMICONDUCTOR CHIP CELLS AND OPTIMIZATION OF THE SAME

Patent #:	7453973	Issue Dt:	11/18/2008	Application #:	11533907	Filing Dt:	09/21/2006
Publication #:	US20070033458	Pub Dt:	02/08/2007
Title:	DIAGNOSTIC METHOD AND APPARATUS FOR NON-DESTRUCTIVELY OBSERVING LATCH DATA

Patent #:	7494891	Issue Dt:	02/24/2009	Application #:	11533928	Filing Dt:	09/21/2006
Publication #:	US20080076230	Pub Dt:	03/27/2008
Title:	TRENCH CAPACITOR WITH VOID-FREE CONDUCTOR FILL

Patent #:	7440353	Issue Dt:	10/21/2008	Application #:	11534070	Filing Dt:	09/21/2006
Publication #:	US20080084774	Pub Dt:	04/10/2008
Title:	FLOATING BODY CONTROL IN SOI DRAM

Patent #:	7429752	Issue Dt:	09/30/2008	Application #:	11534526	Filing Dt:	09/22/2006
Publication #:	US20070020806	Pub Dt:	01/25/2007
Title:	METHOD AND STRUCTURE FOR FORMING STRAINED SI FOR CMOS DEVICES

Patent #:	7547582	Issue Dt:	06/16/2009	Application #:	11535091	Filing Dt:	09/26/2006
Publication #:	US20080073775	Pub Dt:	03/27/2008
Title:	METHOD OF FABRICATING A SURFACE ADAPTING CAP WITH INTEGRAL ADAPTING MATERIAL FOR SINGLE AND MULTI CHIP ASSEMBLIES

Patent #:	7467366	Issue Dt:	12/16/2008	Application #:	11535203	Filing Dt:	09/26/2006
Publication #:	US20080077895	Pub Dt:	03/27/2008
Title:	METHOD FOR GENERATING A TIMING PATH SOFTWARE MONITOR FOR IDENTIFYING A CRITICAL TIMING PATH IN HARDWARE DEVICES COUPLED BETWEEN COMPONENTS

Patent #:	7490310	Issue Dt:	02/10/2009	Application #:	11535511	Filing Dt:	09/27/2006
Publication #:	US20070089079	Pub Dt:	04/19/2007
Title:	METHOD FOR CREATING A LAYOUT FOR AN ELECTRONIC CIRCUIT

Patent #:	7687391	Issue Dt:	03/30/2010	Application #:	11535700	Filing Dt:	09/27/2006
Publication #:	US20080073796	Pub Dt:	03/27/2008
Title:	ELECTRICALLY OPTIMIZED AND STRUCTURALLY PROTECTED VIA STRUCTURE FOR HIGH SPEED SIGNALS

Patent #:	7434185	Issue Dt:	10/07/2008	Application #:	11535789	Filing Dt:	09/27/2006
Publication #:	US20080077891	Pub Dt:	03/27/2008
Title:	METHOD AND APPARATUS FOR PARALLEL DATA PREPARATION AND PROCESSING OF INTEGRATED CIRCUIT GRAPHICAL DESIGN DATA

Patent #:	7651892	Issue Dt:	01/26/2010	Application #:	11535833	Filing Dt:	09/27/2006
Publication #:	US20080132058	Pub Dt:	06/05/2008
Title:	ELECTRICAL PROGRAMMABLE METAL RESISTOR

Patent #:	7516356	Issue Dt:	04/07/2009	Application #:	11536557	Filing Dt:	09/28/2006
Publication #:	US20070022317	Pub Dt:	01/25/2007
Title:	METHOD FOR TRANSMITTING INPUT/OUTPUT REQUESTS FROM A FIRST CONTROLLER TO A SECOND CONTROLLER

Patent #:	7504705	Issue Dt:	03/17/2009	Application #:	11536896	Filing Dt:	09/29/2006
Publication #:	US20080079114	Pub Dt:	04/03/2008
Title:	STRIPED ON-CHIP INDUCTOR

Patent #:	7803708	Issue Dt:	09/28/2010	Application #:	11537378	Filing Dt:	09/29/2006
Publication #:	US20070026683	Pub Dt:	02/01/2007
Title:	METHOD FOR REDUCING AMINE BASED CONTAMINANTS

Patent #:	NONE	Issue Dt:		Application #:	11537718	Filing Dt:	10/02/2006
Publication #:	US20070034967	Pub Dt:	02/15/2007
Title:	METAL GATE MOSFET BY FULL SEMICONDUCTOR METAL ALLOY CONVERSION

Patent #:	7485510	Issue Dt:	02/03/2009	Application #:	11538174	Filing Dt:	10/03/2006
Publication #:	US20080079037	Pub Dt:	04/03/2008
Title:	FIELD EFFECT DEVICE INCLUDING INVERTED V SHAPED CHANNEL REGION AND METHOD FOR FABRICATION THEREOF

Patent #:	7488682	Issue Dt:	02/10/2009	Application #:	11538199	Filing Dt:	10/03/2006
Publication #:	US20080079167	Pub Dt:	04/03/2008
Title:	HIGH-DENSITY 3-DIMENSIONAL RESISTORS

Patent #:	NONE	Issue Dt:		Application #:	11538531	Filing Dt:	10/04/2006
Publication #:	US20070080436	Pub Dt:	04/12/2007
Title:	METHOD FOR NOISE REDUCTION IN MULTI-LAYER CERAMIC PACKAGES

Patent #:	7518225	Issue Dt:	04/14/2009	Application #:	11538567	Filing Dt:	10/04/2006
Publication #:	US20070290315	Pub Dt:	12/20/2007
Title:	CHIP SYSTEM ARCHITECTURE FOR PERFORMANCE ENHANCEMENT, POWER REDUCTION AND COST REDUCTION

Patent #:	7390720	Issue Dt:	06/24/2008	Application #:	11538848	Filing Dt:	10/05/2006
Publication #:	US20080083934	Pub Dt:	04/10/2008
Title:	LOCAL COLLECTOR IMPLANT STRUCTURE FOR HETEROJUNCTION BIPOLAR TRANSISTORS AND METHOD OF FORMING THE SAME

Patent #:	7404159	Issue Dt:	07/22/2008	Application #:	11538913	Filing Dt:	10/05/2006
Publication #:	US20070256040	Pub Dt:	11/01/2007
Title:	CRITICAL AREA COMPUTATION OF COMPOSITE FAULT MECHANISMS USING VORONOI DIAGRAMS

Patent #:	7737482	Issue Dt:	06/15/2010	Application #:	11538982	Filing Dt:	10/05/2006
Publication #:	US20080083941	Pub Dt:	04/10/2008
Title:	SELF-ALIGNED STRAP FOR EMBEDDED TRENCH MEMORY ON HYBRID ORIENTATION SUBSTRATE

Patent #:	7709300	Issue Dt:	05/04/2010	Application #:	11539204	Filing Dt:	10/06/2006
Publication #:	US20080086714	Pub Dt:	04/10/2008
Title:	STRUCTURE AND METHOD FOR PARTITIONED DUMMY FILL SHAPES FOR REDUCED MASK BIAS WITH ALTERNATING PHASE SHIFT MASKS

Patent #:	7528067	Issue Dt:	05/05/2009	Application #:	11539236	Filing Dt:	10/06/2006
Publication #:	US20070087536	Pub Dt:	04/19/2007
Title:	MOSFET STRUCTURE WITH MULTIPLE SELF-ALIGNED SILICIDE CONTACTS

Patent #:	NONE	Issue Dt:		Application #:	11539994	Filing Dt:	10/10/2006
Publication #:	US20080085471	Pub Dt:	04/10/2008
Title:	PHOTOLITHOGRAPHIC METHOD USING MULTIPLE PHOTOEXPOSURE APPARATUS

Patent #:	7940672	Issue Dt:	05/10/2011	Application #:	11540436	Filing Dt:	09/29/2006
Publication #:	US20070121674	Pub Dt:	05/31/2007
Title:	SYSTEMS AND METHODS FOR CORRELATION OF BURST EVENTS AMONG DATA STREAMS

Patent #:	7399992	Issue Dt:	07/15/2008	Application #:	11541997	Filing Dt:	10/02/2006
Publication #:	US20070030022	Pub Dt:	02/08/2007
Title:	DEVICE FOR DEFEATING REVERSE ENGINEERING OF INTEGRATED CIRCUITS BY OPTICAL MEANS

Patent #:	7449735	Issue Dt:	11/11/2008	Application #:	11548020	Filing Dt:	10/10/2006
Publication #:	US20080085575	Pub Dt:	04/10/2008
Title:	DUAL WORK-FUNCTION SINGLE GATE STACK

Patent #:	NONE	Issue Dt:		Application #:	11548310	Filing Dt:	10/11/2006
Publication #:	US20080087978	Pub Dt:	04/17/2008
Title:	METHOD OF MANUFACTURE FOR SEMICONDUCTOR STRUCTURE HAVING SUB-COLLECTOR REGION WITH TRENCH ISOLATION

Patent #:	8248466	Issue Dt:	08/21/2012	Application #:	11548328	Filing Dt:	10/11/2006
Publication #:	US20080089653	Pub Dt:	04/17/2008
Title:	IMAGE PROCESSING USING MULTIPLE IMAGE DEVICES

Patent #:	8445362	Issue Dt:	05/21/2013	Application #:	11548482	Filing Dt:	10/11/2006
Publication #:	US20080089159	Pub Dt:	04/17/2008
Title:	APPARATUS AND METHOD FOR PROGRAMMING AN ELECTRONICALLY PROGRAMMABLE SEMICONDUCTOR FUSE

Patent #:	8052799	Issue Dt:	11/08/2011	Application #:	11548717	Filing Dt:	10/12/2006
Publication #:	US20080093212	Pub Dt:	04/24/2008
Title:	BY-PRODUCT COLLECTING PROCESSES FOR CLEANING PROCESSES

Patent #:	7472477	Issue Dt:	01/06/2009	Application #:	11548797	Filing Dt:	10/12/2006
Publication #:	US20080090439	Pub Dt:	04/17/2008
Title:	METHOD FOR MANUFACTURING A SOCKET THAT COMPENSATES FOR DIFFERING COEFFICIENTS OF THERMAL EXPANSION

Patent #:	7742632	Issue Dt:	06/22/2010	Application #:	11549263	Filing Dt:	10/13/2006
Publication #:	US20080089575	Pub Dt:	04/17/2008
Title:	ALTERNATING PHASE SHIFT MASK INSPECTION USING BIASED INSPECTION DATA

Patent #:	7374980	Issue Dt:	05/20/2008	Application #:	11549311	Filing Dt:	10/13/2006
Publication #:	US20080090367	Pub Dt:	04/17/2008
Title:	FIELD EFFECT TRANSISTOR WITH THIN GATE ELECTRODE AND METHOD OF FABRICATING SAME

Patent #:	7517802	Issue Dt:	04/14/2009	Application #:	11550190	Filing Dt:	10/17/2006
Publication #:	US20070066067	Pub Dt:	03/22/2007
Title:	METHOD FOR REDUCING FOREIGN MATERIAL CONCENTRATIONS IN ETCH CHAMBERS

Patent #:	NONE	Issue Dt:		Application #:	11550318	Filing Dt:	10/17/2006
Publication #:	US20080090400	Pub Dt:	04/17/2008
Title:	SELF-ALIGNED IN-CONTACT PHASE CHANGE MEMORY DEVICE

Patent #:	8125019	Issue Dt:	02/28/2012	Application #:	11550450	Filing Dt:	10/18/2006
Publication #:	US20080093659	Pub Dt:	04/24/2008
Title:	ELECTRICALLY PROGRAMMABLE RESISTOR

Patent #:	7732949	Issue Dt:	06/08/2010	Application #:	11550573	Filing Dt:	10/18/2006
Publication #:	US20080189567	Pub Dt:	08/07/2008
Title:	SYSTEM FOR METHOD OF PREDICTING POWER EVENTS IN AN INTERMITTENT POWER ENVIRONMENT AND DISPATCHING COMPUTATIONAL OPERATIONS OF AN INTEGRATED CIRCUIT ACCORDINGLY

Patent #:	7759772	Issue Dt:	07/20/2010	Application #:	11550681	Filing Dt:	10/18/2006
Publication #:	US20080128866	Pub Dt:	06/05/2008
Title:	METHOD TO FORM SI-CONTAINING SOI AND UNDERLYING SUBSTRATE WITH DIFFERENT ORIENTATIONS

Patent #:	7504847	Issue Dt:	03/17/2009	Application #:	11550814	Filing Dt:	10/19/2006
Publication #:	US20080094092	Pub Dt:	04/24/2008
Title:	MECHANISM FOR DETECTION AND COMPENSATION OF NBTI INDUCED THRESHOLD DEGRADATION

Patent #:	7689946	Issue Dt:	03/30/2010	Application #:	11550818	Filing Dt:	10/19/2006
Publication #:	US20080109770	Pub Dt:	05/08/2008
Title:	HIGH-PERFORMANCE FET DEVICE LAYOUT

Patent #:	7572650	Issue Dt:	08/11/2009	Application #:	11550853	Filing Dt:	10/19/2006
Publication #:	US20070040277	Pub Dt:	02/22/2007
Title:	SUPPRESSION OF LOCALIZED METAL PRECIPITATE FORMATION AND CORRESPONDING METALLIZATION DEPLETION IN SEMICONDUCTOR PROCESSING

Patent #:	7551470	Issue Dt:	06/23/2009	Application #:	11550918	Filing Dt:	10/19/2006
Publication #:	US20080094896	Pub Dt:	04/24/2008
Title:	NON VOLATILE MEMORY RAD-HARD (NVM-RH) SYSTEM

Patent #:	7491585	Issue Dt:	02/17/2009	Application #:	11550943	Filing Dt:	10/19/2006
Publication #:	US20080093703	Pub Dt:	04/24/2008
Title:	ELECTRICAL FUSE AND METHOD OF MAKING

Patent #:	7754574	Issue Dt:	07/13/2010	Application #:	11551537	Filing Dt:	10/20/2006
Publication #:	US20080132026	Pub Dt:	06/05/2008
Title:	OPTIMUM PADSET FOR WIRE BONDING RF TECHNOLOGIES WITH HIGH-Q INDUCTORS

Patent #:	7517795	Issue Dt:	04/14/2009	Application #:	11551647	Filing Dt:	10/20/2006
Publication #:	US20070042586	Pub Dt:	02/22/2007
Title:	STABILIZATION OF NI MONOSILICIDE THIN FILMS IN CMOS DEVICES USING IMPLANTATION OF IONS BEFORE SILICIDATION

Patent #:	7806312	Issue Dt:	10/05/2010	Application #:	11551754	Filing Dt:	10/23/2006
Publication #:	US20070057024	Pub Dt:	03/15/2007
Title:	METHOD AND APPARATUS FOR REMOVING KNOWN GOOD DIE

Patent #:	7447606	Issue Dt:	11/04/2008	Application #:	11551814	Filing Dt:	10/23/2006
Publication #:	US20080097715	Pub Dt:	04/24/2008
Title:	METHOD OF SEPARATING THE PROCESS VARIATION IN THRESHOLD VOLTAGE AND EFFECTIVE CHANNEL LENGTH BY ELECTRICAL MEASUREMENTS

Patent #:	NONE	Issue Dt:		Application #:	11551888	Filing Dt:	10/23/2006
Publication #:	US20080093726	Pub Dt:	04/24/2008
Title:	Continuously Referencing Signals over Multiple Layers in Laminate Packages

Patent #:	7709365	Issue Dt:	05/04/2010	Application #:	11551959	Filing Dt:	10/23/2006
Publication #:	US20070045749	Pub Dt:	03/01/2007
Title:	CMOS WELL STRUCTURE AND METHOD OF FORMING THE SAME

Patent #:	8234594	Issue Dt:	07/31/2012	Application #:	11552225	Filing Dt:	10/24/2006
Publication #:	US20080097738	Pub Dt:	04/24/2008
Title:	REDUNDANT MICRO-LOOP STRUCTURE FOR USE IN AN INTEGRATED CIRCUIT PHYSICAL DESIGN PROCESS AND METHOD OF FORMING THE SAME

Patent #:	7823103	Issue Dt:	10/26/2010	Application #:	11552245	Filing Dt:	10/24/2006
Publication #:	US20080109772	Pub Dt:	05/08/2008
Title:	METHOD AND SYSTEM OF INTRODUCING HIERARCHY INTO DESIGN RULE CHECKING TEST CASES AND ROTATION OF TEST CASE DATA

Patent #:	7439081	Issue Dt:	10/21/2008	Application #:	11552771	Filing Dt:	10/25/2006
Publication #:	US20070048879	Pub Dt:	03/01/2007
Title:	METHOD FOR MAKING INTEGRATED CIRCUIT CHIP UTILIZING ORIENTED CARBON NANOTUBE CONDUCTIVE LAYERS

Patent #:	7354822	Issue Dt:	04/08/2008	Application #:	11553072	Filing Dt:	10/26/2006
Publication #:	US20070051996	Pub Dt:	03/08/2007
Title:	METHOD OF FORMING A MOSFET WITH DUAL WORK FUNCTION MATERIALS

Patent #:	7493586	Issue Dt:	02/17/2009	Application #:	11553076	Filing Dt:	10/26/2006
Publication #:	US20070050746	Pub Dt:	03/01/2007
Title:	METHOD AND SYSTEM PRODUCT FOR IMPLEMENTING UNCERTAINTY IN INTEGRATED CIRCUIT DESIGNS WITH PROGRAMMABLE LOGIC

Patent #:	7910408	Issue Dt:	03/22/2011	Application #:	11553176	Filing Dt:	10/26/2006
Publication #:	US20080099877	Pub Dt:	05/01/2008
Title:	DAMAGE PROPAGATION BARRIER AND METHOD OF FORMING

Patent #:	7482232	Issue Dt:	01/27/2009	Application #:	11553331	Filing Dt:	10/26/2006
Publication #:	US20070048908	Pub Dt:	03/01/2007
Title:	METHOD FOR FABRICATING A NANOTUBE FIELD EFFECT TRANSISTOR

Patent #:	NONE	Issue Dt:		Application #:	11553605	Filing Dt:	10/27/2006
Publication #:	US20080127006	Pub Dt:	05/29/2008
Title:	REAL-TIME DATA STREAM DECOMPRESSOR

Patent #:	7877659	Issue Dt:	01/25/2011	Application #:	11554053	Filing Dt:	10/30/2006
Publication #:	US20080115027	Pub Dt:	05/15/2008
Title:	MEMORY MODEL FOR FUNCTIONAL VERIFICATION OF MULTI-PROCESSOR SYSTEMS

Patent #:	8343578	Issue Dt:	01/01/2013	Application #:	11554079	Filing Dt:	10/30/2006
Publication #:	US20080103256	Pub Dt:	05/01/2008
Title:	SELF-ASSEMBLED LAMELLAR MICRODOMAINS AND METHOD OF ALIGNMENT

Patent #:	7467369	Issue Dt:	12/16/2008	Application #:	11554235	Filing Dt:	10/30/2006
Publication #:	US20080127017	Pub Dt:	05/29/2008
Title:	CONSTRAINED DETAILED PLACEMENT

Patent #:	7625815	Issue Dt:	12/01/2009	Application #:	11554612	Filing Dt:	10/31/2006
Publication #:	US20080102599	Pub Dt:	05/01/2008
Title:	REDUCED LEAKAGE INTERCONNECT STRUCTURE

Patent #:	7624366	Issue Dt:	11/24/2009	Application #:	11554637	Filing Dt:	10/31/2006
Publication #:	US20080127018	Pub Dt:	05/29/2008
Title:	CLOCK AWARE PLACEMENT

Patent #:	7518899	Issue Dt:	04/14/2009	Application #:	11555323	Filing Dt:	11/01/2006
Publication #:	US20080101145	Pub Dt:	05/01/2008
Title:	METHOD OF PROVIDING OPTIMAL FIELD PROGRAMMING OF ELECTRONIC FUSES

Patent #:	7678683	Issue Dt:	03/16/2010	Application #:	11555383	Filing Dt:	11/01/2006
Publication #:	US20070059920	Pub Dt:	03/15/2007
Title:	METHOD OF FABRICATING COPPER DAMASCENE AND DUAL DAMASCENE INTERCONNECT WIRING

Patent #:	NONE	Issue Dt:		Application #:	11555747	Filing Dt:	11/02/2006
Publication #:	US20080127019	Pub Dt:	05/29/2008
Title:	A METHOD AND SYSTEM FOR CUSTOMIZING A MEMORY REGISTER LAYOUT

Patent #:	7512927	Issue Dt:	03/31/2009	Application #:	11555854	Filing Dt:	11/02/2006
Publication #:	US20080127027	Pub Dt:	05/29/2008
Title:	PRINTABILITY VERIFICATION BY PROGRESSIVE MODELING ACCURACY

Patent #:	7956628	Issue Dt:	06/07/2011	Application #:	11556262	Filing Dt:	11/03/2006
Publication #:	US20080106277	Pub Dt:	05/08/2008
Title:	CHIP-BASED PROBER FOR HIGH FREQUENCY MEASUREMENTS AND METHODS OF MEASURING

Patent #:	NONE	Issue Dt:		Application #:	11556385	Filing Dt:	11/03/2006
Publication #:	US20080124833	Pub Dt:	05/29/2008
Title:	METHOD FOR FILLING HOLES WITH METAL CHALCOGENIDE MATERIAL

Patent #:	NONE	Issue Dt:		Application #:	11556560	Filing Dt:	11/03/2006
Publication #:	US20080124815	Pub Dt:	05/29/2008
Title:	METHOD FOR POST CAP ILD/IMD REPAIR WITH UV IRRADIATION

Patent #:	7510904	Issue Dt:	03/31/2009	Application #:	11556739	Filing Dt:	11/06/2006
Publication #:	US20080113467	Pub Dt:	05/15/2008
Title:	STRUCTURE FOR AND METHOD OF FABRICATING A HIGH-SPEED CMOS-COMPATIBLE GE-ON-INSULATOR PHOTODETECTOR

Patent #:	7915653	Issue Dt:	03/29/2011	Application #:	11556755	Filing Dt:	11/06/2006
Publication #:	US20080185618	Pub Dt:	08/07/2008
Title:	STRUCTURE FOR AND METHOD OF FABRICATING A HIGH-SPEED CMOS-COMPATIBLE GE-ON-INSULATOR PHOTODETECTOR

Patent #:	7649243	Issue Dt:	01/19/2010	Application #:	11556833	Filing Dt:	11/06/2006
Publication #:	US20080121949	Pub Dt:	05/29/2008
Title:	SEMICONDUCTOR STRUCTURES INCORPORATING MULTIPLE CRYSTALLOGRAPHIC PLANES AND METHODS FOR FABRICATION THEREOF

Patent #:	7544994	Issue Dt:	06/09/2009	Application #:	11556844	Filing Dt:	11/06/2006
Publication #:	US20080122013	Pub Dt:	05/29/2008
Title:	SEMICONDUCTOR STRUCTURE WITH MULTIPLE FINS HAVING DIFFERENT CHANNEL REGION HEIGHTS AND METHOD OF FORMING THE SEMICONDUCTOR STRUCTURE

Patent #:	7403057	Issue Dt:	07/22/2008	Application #:	11556882	Filing Dt:	11/06/2006
Publication #:	US20080129356	Pub Dt:	06/05/2008
Title:	CML DELAY CELL WITH LINEAR RAIL-TO-RAIL TUNING RANGE AND CONSTANT OUTPUT SWING

Patent #:	7682887	Issue Dt:	03/23/2010	Application #:	11557509	Filing Dt:	11/08/2006
Publication #:	US20070087540	Pub Dt:	04/19/2007
Title:	TRANSISTOR HAVING HIGH MOBILITY CHANNEL AND METHODS

Patent #:	7813815	Issue Dt:	10/12/2010	Application #:	11557745	Filing Dt:	11/08/2006
Publication #:	US20070101227	Pub Dt:	05/03/2007
Title:	DIGITAL MEASURING SYSTEM AND METHOD FOR INTEGRATED CIRCUIT CHIP OPERATING PARAMETERS

Patent #:	7528483	Issue Dt:	05/05/2009	Application #:	11558032	Filing Dt:	11/09/2006
Publication #:	US20070064395	Pub Dt:	03/22/2007
Title:	COOLING SYSTEM FOR A SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING SAME

Patent #:	NONE	Issue Dt:		Application #:	11558108	Filing Dt:	11/09/2006
Publication #:	US20080111597	Pub Dt:	05/15/2008
Title:	SYSTEMS AND ARRANGEMENTS FOR CONTROLLING A PHASE LOCKED LOOP

Patent #:	7705426	Issue Dt:	04/27/2010	Application #:	11558480	Filing Dt:	11/10/2006
Publication #:	US20080111154	Pub Dt:	05/15/2008
Title:	INTEGRATION OF A SIGE- OR SIGEC-BASED HBT WITH A SIGE- OR SIGEC-STRAPPED SEMICONDUCTOR DEVICE

Patent #:	8091614	Issue Dt:	01/10/2012	Application #:	11558842	Filing Dt:	11/10/2006
Publication #:	US20080110594	Pub Dt:	05/15/2008
Title:	AIR/FLUID COOLING SYSTEM

Patent #:	7288475	Issue Dt:	10/30/2007	Application #:	11558959	Filing Dt:	11/13/2006
Publication #:	US20070087551	Pub Dt:	04/19/2007
Title:	SACRIFICIAL INORGANIC POLYMER INTERMETAL DIELECTRIC DAMASCENE WIRE AND VIA LINER

Patent #:	7563670	Issue Dt:	07/21/2009	Application #:	11558974	Filing Dt:	11/13/2006
Publication #:	US20080111175	Pub Dt:	05/15/2008
Title:	METHOD FOR ETCHING SINGLE-CRYSTAL SEMICONDUCTOR SELECTIVE TO AMORPHOUS/POLYCRYSTALLINE SEMICONDUCTOR AND STRUCTURE FORMED BY SAME

Patent #:	NONE	Issue Dt:		Application #:	11558977	Filing Dt:	11/13/2006
Publication #:	US20080111185	Pub Dt:	05/15/2008
Title:	ASYMMETRIC MULTI-GATED TRANSISTOR AND METHOD FOR FORMING

Patent #:	7805274	Issue Dt:	09/28/2010	Application #:	11559120	Filing Dt:	11/13/2006
Publication #:	US20080112458	Pub Dt:	05/15/2008
Title:	STRUCTURE AND METHODOLOGY FOR CHARACTERIZING DEVICE SELF-HEATING

Patent #:	7573115	Issue Dt:	08/11/2009	Application #:	11559130	Filing Dt:	11/13/2006
Publication #:	US20080111250	Pub Dt:	05/15/2008
Title:	STRUCTURE AND METHOD FOR ENHANCING RESISTANCE TO FRACTURE OF BONDING PADS

Patent #:	7482209	Issue Dt:	01/27/2009	Application #:	11559151	Filing Dt:	11/13/2006
Publication #:	US20080111214	Pub Dt:	05/15/2008
Title:	METHOD FOR FABRICATING HYBRID ORIENTATION SUBSTRATE

Patent #:	7810000	Issue Dt:	10/05/2010	Application #:	11559436	Filing Dt:	11/14/2006
Publication #:	US20080115019	Pub Dt:	05/15/2008
Title:	CIRCUIT TIMING MONITOR HAVING A SELECTABLE-PATH RING OSCILLATOR

Patent #:	7470570	Issue Dt:	12/30/2008	Application #:	11559460	Filing Dt:	11/14/2006
Publication #:	US20080111184	Pub Dt:	05/15/2008
Title:	PROCESS FOR FABRICATION OF FINFETS

Patent #:	7808082	Issue Dt:	10/05/2010	Application #:	11559571	Filing Dt:	11/14/2006
Publication #:	US20080111162	Pub Dt:	05/15/2008
Title:	STRUCTURE AND METHOD FOR DUAL SURFACE ORIENTATIONS FOR CMOS TRANSISTORS

Patent #:	NONE	Issue Dt:		Application #:	11559983	Filing Dt:	11/15/2006
Publication #:	US20080113456	Pub Dt:	05/15/2008
Title:	PROCESS FOR PROTECTING IMAGE SENSOR WAFERS FROM FRONT SURFACE DAMAGE AND CONTAMINATION

Patent #:	7537951	Issue Dt:	05/26/2009	Application #:	11560019	Filing Dt:	11/15/2006
Publication #:	US20080111159	Pub Dt:	05/15/2008
Title:	IMAGE SENSOR INCLUDING SPATIALLY DIFFERENT ACTIVE AND DARK PIXEL INTERCONNECT PATTERNS

100

Patent #:	7569475	Issue Dt:	08/04/2009	Application #:	11560044	Filing Dt:	11/15/2006
Publication #:	US20080111239	Pub Dt:	05/15/2008
Title:	INTERCONNECT STRUCTURE HAVING ENHANCED ELECTROMIGRATION RELIABILTY AND A METHOD OF FABRICATING SAME

Assignor

INTERNATIONAL BUSINESS MACHINES CORPORATION

Exec Dt:

06/29/2015

Assignee

GLOBALFOUNDRIES U.S. 2 LLC

2070 ROUTE 52

HOPEWELL JUNCTION, NEW YORK 12533

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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