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Patent #:
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Issue Dt:
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10/26/2010
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Application #:
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11560126
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Filing Dt:
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11/15/2006
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Publication #:
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Pub Dt:
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05/15/2008
| | | | |
Title:
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TUNABLE CAPACITOR
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Patent #:
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Issue Dt:
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03/02/2010
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Application #:
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11560412
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Filing Dt:
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11/16/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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METHOD AND STRUCTURE FOR REDUCING FLOATING BODY EFFECTS IN MOSFET DEVICES
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Patent #:
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Issue Dt:
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07/15/2008
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Application #:
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11560428
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Filing Dt:
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11/16/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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DELAY MECHANISM FOR UNBALANCED READ/WRITE PATHS IN DOMINO SRAM ARRAYS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11560500
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Filing Dt:
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11/16/2006
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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ACCESS CHIP LINE VARIATION AND STATIC TIMING ADJUSTMENTS
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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11560882
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Filing Dt:
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11/17/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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CMOS IMAGER ARRAY WITH RECESSED DIELECTRIC
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Patent #:
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Issue Dt:
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11/04/2008
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Application #:
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11560893
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Filing Dt:
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11/17/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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MULTI-LAYER SPACER WITH INHIBITED RECESS/UNDERCUT AND METHOD FOR FABRICATION THEREOF
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Patent #:
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Issue Dt:
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01/13/2009
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Application #:
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11560925
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Filing Dt:
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11/17/2006
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Publication #:
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Pub Dt:
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05/31/2007
| | | | |
Title:
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METHOD AND STRUCTURE FOR ENHANCING BOTH NMOSFET AND PMOSFET PERFORMANCE WITH A STRESSED FILM
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Patent #:
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Issue Dt:
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02/05/2008
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Application #:
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11561047
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Filing Dt:
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11/17/2006
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Publication #:
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Pub Dt:
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05/31/2007
| | | | |
Title:
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METHOD AND STRUCTURE FOR ENHANCING BOTH NMOSFET AND PMOSFET PERFORMANCE WTH A STRESSED FILM
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Patent #:
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Issue Dt:
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01/19/2010
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Application #:
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11561273
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Filing Dt:
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11/17/2006
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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INTERPOSER WITH ELECTRICAL CONTACT BUTTON AND METHOD
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Patent #:
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Issue Dt:
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04/21/2009
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Application #:
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11561434
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Filing Dt:
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11/20/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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WIRE AND SOLDER BOND FORMING METHODS
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Patent #:
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Issue Dt:
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10/13/2009
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Application #:
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11561437
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Filing Dt:
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11/20/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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WIRE AND SOLDER BOND FORMING METHODS
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Patent #:
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Issue Dt:
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11/09/2010
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Application #:
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11561488
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Filing Dt:
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11/20/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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METHOD OF FABRICATING A STRESSED MOSFET BY BENDING SOI REGION
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Patent #:
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Issue Dt:
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01/04/2011
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11561496
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Filing Dt:
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11/20/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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METHOD OF ENHANCING HOLE MOBILITY
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Patent #:
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Issue Dt:
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08/11/2009
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Application #:
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11561982
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Filing Dt:
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11/21/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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METHOD TO FORM SELECTIVE STRAINED SI USING LATERAL EPITAXY
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Patent #:
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Issue Dt:
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03/09/2010
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Application #:
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11562093
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Filing Dt:
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11/21/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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CMOS STRUCTURE INCLUDING TOPOGRAPHIC ACTIVE REGION
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Patent #:
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Issue Dt:
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02/23/2010
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Application #:
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11562550
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Filing Dt:
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11/22/2006
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Publication #:
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Pub Dt:
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05/22/2008
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Title:
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INTERCONNECT STRUCTURES WITH IMPROVED ELECTROMIGRATION RESISTANCE AND METHODS FOR FORMING SUCH INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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05/11/2010
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Application #:
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11562735
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Filing Dt:
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11/22/2006
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Publication #:
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Pub Dt:
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05/29/2008
| | | | |
Title:
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INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR SI-GE BIPOLAR TECHNOLOGY
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Patent #:
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Issue Dt:
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08/02/2011
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11562830
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Filing Dt:
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11/22/2006
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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METHOD FOR DETECTING RACE CONDITIONS INVOLVING HEAP MEMORY ACCESS
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Patent #:
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Issue Dt:
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03/31/2009
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11563048
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Filing Dt:
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11/24/2006
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Publication #:
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Pub Dt:
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05/29/2008
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Title:
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RUN-TIME CHARACTERIZATION OF ON-DEMAND ANALYTICAL MODEL ACCURACY
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Patent #:
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Issue Dt:
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09/16/2008
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Application #:
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11563858
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Filing Dt:
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11/28/2006
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Publication #:
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Pub Dt:
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05/29/2008
| | | | |
Title:
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PROCESS OF ETCHING A TITANIUM/TUNGSTEN SURFACE AND ETCHANT USED THEREIN
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Patent #:
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NONE
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Application #:
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11564344
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Filing Dt:
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11/29/2006
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Publication #:
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Pub Dt:
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05/29/2008
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Title:
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STRUCTURE FOR CREATION OF A PROGRAMMABLE DEVICE
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Patent #:
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Issue Dt:
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01/06/2009
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Application #:
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11564353
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Filing Dt:
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11/29/2006
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Publication #:
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Pub Dt:
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05/29/2008
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Title:
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FOLDED-SHEET-METAL HEATSINKS FOR CLOSELY PACKAGED HEAT-PRODUCING DEVICES
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Patent #:
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Issue Dt:
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07/06/2010
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Application #:
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11564358
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Filing Dt:
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11/29/2006
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Publication #:
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Pub Dt:
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05/29/2008
| | | | |
Title:
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EMBEDDED NANO UV BLOCKING AND DIFFUSION BARRIER FOR IMPROVED RELIABILITY OF COPPER/ULTRA LOW K INTERLEVEL DIELECTRIC ELECTRONIC DEVICES
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Patent #:
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Issue Dt:
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12/16/2008
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Application #:
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11564875
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Filing Dt:
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11/30/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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CHIP SEAL RING FOR ENHANCING THE OPERATION OF AN ON-CHIP LOOP ANTENNA
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Patent #:
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Issue Dt:
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01/19/2010
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Application #:
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11564957
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Filing Dt:
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11/30/2006
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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LOCAL COLORING FOR HIERARCHICAL OPC
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Patent #:
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Issue Dt:
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02/02/2010
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Application #:
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11564961
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Filing Dt:
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11/30/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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TRIPLE GATE AND DOUBLE GATE FINFETS WITH DIFFERENT VERTICAL DIMENSION FINS
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Patent #:
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Issue Dt:
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04/13/2010
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Application #:
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11565793
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Filing Dt:
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12/01/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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LOW DEFECT SI:C LAYER WITH RETROGRADE CARBON PROFILE
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Patent #:
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Issue Dt:
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04/13/2010
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Application #:
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11565803
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Filing Dt:
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12/01/2006
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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SYSTEM AND METHOD FOR EFFICIENT ANALYSIS OF POINT-TO-POINT DELAY CONSTRAINTS IN STATIC TIMING
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Patent #:
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NONE
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Application #:
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11565952
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Filing Dt:
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12/01/2006
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Publication #:
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Pub Dt:
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06/05/2008
| | | | |
Title:
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METHOD AND SYSTEM FOR NANOSTRUCTURE PLACEMENT USING IMPRINT LITHOGRAPHY
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Patent #:
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Issue Dt:
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07/21/2009
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Application #:
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11566360
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Filing Dt:
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12/04/2006
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Publication #:
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Pub Dt:
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10/11/2007
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Title:
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SELF-ALIGNED, SILICIDED, TRENCH-BASED DRAM/EDRAM PROCESSES WITH IMPROVED RETENTION
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Patent #:
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Issue Dt:
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08/31/2010
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Application #:
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11566579
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12/04/2006
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Publication #:
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Pub Dt:
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05/08/2008
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Title:
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PLANAR SUBSTRATE WITH SELECTED SEMICONDUCTOR CRYSTAL ORIENTATIONS FORMED BY LOCALIZED AMORPHIZATION AND RECRYSTALLIZATION OF STACKED TEMPLATE LAYERS
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Patent #:
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Issue Dt:
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10/04/2011
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11566845
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Filing Dt:
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12/05/2006
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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AUTOMATIC VENTING OF REFILLABLE BULK LIQUID CANISTERS
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Patent #:
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Issue Dt:
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01/27/2009
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11566848
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Filing Dt:
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12/05/2006
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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FULLY AND UNIFORMLY SILICIDED GATE STRUCTURE AND METHOD FOR FORMING SAME
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Patent #:
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06/16/2009
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11566922
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12/05/2006
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Publication #:
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Pub Dt:
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06/05/2008
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Title:
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DESIGN METHODOLOGY OF GUARD RING DESIGN RESISTANCE OPTIMIZATION FOR LATCHUP PREVENTION
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Patent #:
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11/24/2009
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11567517
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12/06/2006
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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METHOD FOR IMPROVED FORMATION OF NICKEL SILICIDE CONTACTS IN SEMICONDUCTOR DEVICES
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Patent #:
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02/03/2009
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11567804
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12/07/2006
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Publication #:
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06/28/2007
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Title:
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SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR
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05/04/2010
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11568156
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10/20/2006
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Pub Dt:
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09/20/2007
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Title:
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TUNEABLE SEMICONDUCTOR DEVICE WITH DISCONTINUOUS PORTIONS IN THE SUB-COLLECTOR
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Patent #:
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NONE
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05/04/2010
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Application #:
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11568156
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Filing Dt:
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10/20/2006
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Publication #:
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Pub Dt:
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09/20/2007
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PCT #:
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US2004012321
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Title:
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TUNEABLE SEMICONDUCTOR DEVICE WITH DISCONTINUOUS PORTIONS IN THE SUB-COLLECTOR
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Patent #:
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NONE
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Application #:
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11570014
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Filing Dt:
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11/21/2007
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Publication #:
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Pub Dt:
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07/10/2008
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Title:
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FABRICATION OF INTERCONNECT STRUCTURES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11570014
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Filing Dt:
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11/21/2007
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Publication #:
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Pub Dt:
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07/10/2008
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PCT #:
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US2005018196
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Title:
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FABRICATION OF INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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04/29/2014
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Application #:
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11571811
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Filing Dt:
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01/22/2009
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Publication #:
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Pub Dt:
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08/27/2009
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Title:
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METHOD AND SYSTEM FOR IMPROVING ALIGNMENT PRECISION OF PARTS IN MEMS
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Patent #:
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NONE
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Issue Dt:
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04/29/2014
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Application #:
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11571811
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Filing Dt:
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01/22/2009
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Publication #:
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Pub Dt:
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08/27/2009
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PCT #:
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EP2005052248
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Title:
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METHOD AND SYSTEM FOR IMPROVING ALIGNMENT PRECISION OF PARTS IN MEMS
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Patent #:
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02/17/2009
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11580033
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10/13/2006
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Pub Dt:
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02/08/2007
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Title:
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METHOD AND STRUCTURE FOR VARIABLE PITCH MICROWAVE PROBE ASSEMBLY
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Patent #:
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Issue Dt:
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08/03/2010
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11581498
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Filing Dt:
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10/16/2006
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Pub Dt:
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02/08/2007
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Title:
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METHOD FOR SEM MEASUREMENT OF FEATURES USING MAGNETICALLY FILTERED LOW LOSS ELECTRON MICROSCOPY
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Patent #:
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NONE
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11581771
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Filing Dt:
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10/16/2006
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Pub Dt:
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03/01/2007
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Title:
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Wafer integrated rigid support ring
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Patent #:
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12/04/2007
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11582246
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08/23/2006
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Publication #:
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Pub Dt:
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03/22/2007
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Title:
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METHOD, APPARATUS AND PROGRAM STORAGE DEVICE FOR PROVIDING DATA PATH OPTIMIZATION
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Patent #:
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04/20/2010
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11585361
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10/23/2006
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Publication #:
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Pub Dt:
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02/15/2007
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Title:
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RAISED SOURCE DRAIN MOSFET WITH AMORPHOUS NOTCHED GATE CAP LAYER WITH NOTCH SIDEWALLS PASSIVATED AND FILLED WITH DIELECTRIC PLUG
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Patent #:
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Issue Dt:
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09/14/2010
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11595243
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Filing Dt:
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11/09/2006
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Pub Dt:
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08/23/2007
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Title:
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CREATING AN ERROR CORRECTION CODING SCHEME AND REDUCING DATA LOSS
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02/17/2009
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11598507
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11/13/2006
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06/07/2007
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Title:
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METHOD AND STRUCTURE FOR BURIED CIRCUITS AND DEVICES
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07/12/2011
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11599272
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11/15/2006
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Pub Dt:
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05/15/2008
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Title:
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METHOD AND INFRASTRUCTURE FOR DETECTING AND/OR SERVICING A FAILING/FAILED OPERATING SYSTEM INSTANCE
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08/17/2010
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11600140
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11/16/2006
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Pub Dt:
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05/22/2008
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Title:
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METHOD AND SYSTEM FOR TONE INVERTING OF RESIDUAL LAYER TOLERANT IMPRINT LITHOGRAPHY
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Patent #:
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03/03/2009
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11602861
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11/21/2006
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05/22/2008
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Title:
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HEATPLATES FOR HEATSINK ATTACHMENT FOR SEMICONDUCTOR CHIPS
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11/03/2009
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11604152
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11/22/2006
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05/22/2008
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Title:
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STRUCTURES TO ENHANCE COOLING OF COMPUTER MEMORY MODULES
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Issue Dt:
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07/26/2011
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11608268
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12/08/2006
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Pub Dt:
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06/12/2008
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Title:
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SYSTEM, METHOD, AND SERVICE FOR TRACING TRAITORS FROM CONTENT PROTECTION CIRCUMVENTION DEVICES
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06/28/2011
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11608863
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12/11/2006
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Pub Dt:
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06/12/2008
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Title:
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METHOD AND APPARATUS FOR FILTER CONDITIONING
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Patent #:
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NONE
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Application #:
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11608885
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Filing Dt:
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12/11/2006
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Publication #:
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06/28/2007
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Title:
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VERIFICATION OPERATION SUPPORTING SYSTEM AND METHOD OF THE SAME
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Issue Dt:
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07/19/2011
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Application #:
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11608948
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Filing Dt:
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12/11/2006
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Publication #:
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Pub Dt:
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06/12/2008
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Title:
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SYSTEMS AND ARRANGEMENTS FOR CLOCK AND DATA RECOVERY IN COMMUNICATIONS
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Patent #:
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Issue Dt:
|
03/29/2011
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Application #:
|
11608962
|
Filing Dt:
|
12/11/2006
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Publication #:
|
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Pub Dt:
|
06/12/2008
| | | | |
Title:
|
SYSTEMS AND ARRANGEMENTS FOR CLOCK AND DATA RECOVERY IN COMMUNICATIONS
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|
Patent #:
|
|
Issue Dt:
|
07/14/2009
|
Application #:
|
11609033
|
Filing Dt:
|
12/11/2006
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Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
OPC VERIFICATION USING AUTO-WINDOWED REGIONS
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|
|
Patent #:
|
|
Issue Dt:
|
11/23/2010
|
Application #:
|
11609040
|
Filing Dt:
|
12/11/2006
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Publication #:
|
|
Pub Dt:
|
09/27/2007
| | | | |
Title:
|
METHOD OF REPAIRING PROCESS INDUCED DIELECTRIC DAMAGE BY THE USE OF GCIB SURFACE TREATMENT USING GAS CLUSTERS OF ORGANIC MOLECULAR SPECIES
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|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
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Application #:
|
11609403
|
Filing Dt:
|
12/12/2006
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Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
PROGRAMMABLE LOCAL CLOCK BUFFER CAPABLE OF VARYING INITIAL SETTINGS
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|
|
Patent #:
|
|
Issue Dt:
|
05/17/2011
|
Application #:
|
11609496
|
Filing Dt:
|
12/12/2006
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Publication #:
|
|
Pub Dt:
|
06/12/2008
| | | | |
Title:
|
GATE CONDUCTOR STRUCTURE
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|
|
Patent #:
|
|
Issue Dt:
|
12/16/2008
|
Application #:
|
11610082
|
Filing Dt:
|
12/13/2006
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Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
CERAMIC SUBSTRATE GRID STRUCTURE FOR THE CREATION OF VIRTUAL COAX ARRANGEMENT
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11610470
|
Filing Dt:
|
12/13/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
SELECTIVE SURFACE ROUGHNESS FOR HIGH SPEED SIGNALING
|
|
|
Patent #:
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|
Issue Dt:
|
08/10/2010
|
Application #:
|
11610533
|
Filing Dt:
|
12/14/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
COMBINATION PLANAR FET AND FINFET DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
11610567
|
Filing Dt:
|
12/14/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
LATCH PLACEMENT FOR HIGH PERFORMANCE AND LOW POWER CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2009
|
Application #:
|
11610848
|
Filing Dt:
|
12/14/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
CLOCK DISTRIBUTION NETWORK, STRUCTURE, AND METHOD FOR PROVIDING BALANCED LOADING IN INTEGRATED CIRCUIT CLOCK TREES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/28/2008
|
Application #:
|
11610900
|
Filing Dt:
|
12/14/2006
|
Publication #:
|
|
Pub Dt:
|
06/21/2007
| | | | |
Title:
|
DIGITAL PHASE AND FREQUENCY DETECTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
01/01/2008
|
Application #:
|
11612309
|
Filing Dt:
|
12/18/2006
|
Publication #:
|
|
Pub Dt:
|
05/03/2007
| | | | |
Title:
|
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN 110 SI UNDER BIAXIAL COMPRESSIVE STRAIN
|
|
|
Patent #:
|
|
Issue Dt:
|
11/16/2010
|
Application #:
|
11612501
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
PROGRAMMABLE-RESISTANCE MEMORY CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2009
|
Application #:
|
11612628
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
REDUNDANCY PROGRAMMING FOR A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2010
|
Application #:
|
11612631
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
PROGRAMMABLE VIA STRUCTURE AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2008
|
Application #:
|
11612809
|
Filing Dt:
|
12/19/2006
|
Publication #:
|
|
Pub Dt:
|
06/19/2008
| | | | |
Title:
|
HIGH PERFORMANCE SINGLE EVENT UPSET HARDENED SRAM CELL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/22/2008
|
Application #:
|
11613516
|
Filing Dt:
|
12/20/2006
|
Title:
|
FLEXIBLE MULTIMODE LOGIC ELEMENT FOR USE IN A CONFIGURABLE MIXED-LOGIC SIGNAL DISTRIBUTION PATH
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11613754
|
Filing Dt:
|
12/20/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
SYSTEMS AND METHODS FOR REDUCING WIRING VIAS DURING SYNTHESIS OF ELECTRONIC DESIGNS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11614260
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
AUTOMATED OPTIMIZATION OF VLSI LAYOUTS FOR REGULARITY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
11614799
|
Filing Dt:
|
12/21/2006
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
ANTIREFLECTIVE HARDMASK AND USES THEREOF
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2009
|
Application #:
|
11615153
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
SCALABLE STRAINED FET DEVICE AND METHOD OF FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2010
|
Application #:
|
11615236
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
SEMICONDUCTOR CHIP SHAPE ALTERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/10/2009
|
Application #:
|
11615272
|
Filing Dt:
|
12/22/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METHOD OF FORMATION OF A DAMASCENE STRUCTURE UTILIZING A PROTECTIVE FILM
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11616183
|
Filing Dt:
|
12/26/2006
|
Publication #:
|
|
Pub Dt:
|
06/26/2008
| | | | |
Title:
|
METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH AN ASYMMETRIC SILICIDE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11616532
|
Filing Dt:
|
12/27/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
METHOD FOR FABRICATING A MICROELECTRONIC CONDUCTOR STRUCTURE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11616730
|
Filing Dt:
|
12/27/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
STRESS LINER SURROUNDED FACETLESS EMBEDDED STRESSOR MOSFET
|
|
|
Patent #:
|
|
Issue Dt:
|
05/25/2010
|
Application #:
|
11616965
|
Filing Dt:
|
12/28/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
TRANSISTOR BASED ANTIFUSE WITH INTEGRATED HEATING ELEMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2008
|
Application #:
|
11617610
|
Filing Dt:
|
12/28/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
METHOD FOR CREATING AN IN-MEMORY PHYSICAL DICTIONARY FOR DATA COMPRESSION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2009
|
Application #:
|
11618346
|
Filing Dt:
|
12/29/2006
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
SOFT ERROR REDUCTION OF CMOS CIRCUITS ON SUBSTRATES WITH HYBRID CRYSTAL ORIENTATION USING BURIED RECOMBINATION CENTERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/29/2008
|
Application #:
|
11618770
|
Filing Dt:
|
12/30/2006
|
Publication #:
|
|
Pub Dt:
|
05/31/2007
| | | | |
Title:
|
EPITAXIAL AND POLYCRYSTALLINE GROWTH OF SI1-X-YGEXCY AND SI1-YCY ALLOY LAYERS ON SI BY UHV-CVD
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
11618940
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
HIGH DENSITY DATA STORAGE MEDIUM, METHOD AND DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11618945
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
HIGH DENSITY DATA STORAGE MEDIUM, METHOD AND DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/30/2008
|
Application #:
|
11618952
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
REAL-TIME FREQUENCY BAND SELECTION CIRCUIT FOR USE WITH A VOLTAGE CONTROLLED OSCILLATOR
|
|
|
Patent #:
|
|
Issue Dt:
|
06/23/2009
|
Application #:
|
11618957
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
TRENCH STRUCTURE AND METHOD FOR CO-ALIGNMENT OF MIXED OPTICAL AND ELECTRON BEAM LITHOGRAPHIC FABRICATION LEVELS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2010
|
Application #:
|
11618974
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
METHOD FOR CO-ALIGNMENT OF MIXED OPTICAL AND ELECTRON BEAM LITHOGRAPHIC FABRICATION LEVELS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2008
|
Application #:
|
11618993
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
METHOD OF DETERMINING STOPPING POWERS OF DESIGN STRUCTURES WITH RESPECT TO A TRAVELING PARTICLE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2008
|
Application #:
|
11619019
|
Filing Dt:
|
01/02/2007
|
Title:
|
PHASE SHIFTING AND COMBINING ARCHITECTURE FOR PHASED ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/17/2009
|
Application #:
|
11619024
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
05/17/2007
| | | | |
Title:
|
IMAGE SENSOR CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2009
|
Application #:
|
11619040
|
Filing Dt:
|
01/02/2007
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
SEMICONDUCTOR HETEROSTRUCTURE INCLUDING A SUBSTANTIALLY RELAXED, LOW DEFECT DENISTY SIGE LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/07/2009
|
Application #:
|
11619264
|
Filing Dt:
|
01/03/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
REVERSIBLE ELECTRIC FUSE AND ANTIFUSE STRUCTURES FOR SEMICONDUCTOR DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2010
|
Application #:
|
11619307
|
Filing Dt:
|
01/03/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
ADDRESSABLE HIERARCHICAL METAL WIRE TEST METHODOLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/29/2010
|
Application #:
|
11619323
|
Filing Dt:
|
01/03/2007
|
Publication #:
|
|
Pub Dt:
|
05/10/2007
| | | | |
Title:
|
STRUCTURE AND METHODOLOGY FOR FABRICATION AND INSPECTION OF PHOTOMASKS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/21/2009
|
Application #:
|
11619357
|
Filing Dt:
|
01/03/2007
|
Publication #:
|
|
Pub Dt:
|
07/03/2008
| | | | |
Title:
|
DUAL STRESS STI
|
|