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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/26/2010
Application #:
11560126
Filing Dt:
11/15/2006
Publication #:
Pub Dt:
05/15/2008
Title:
TUNABLE CAPACITOR
2
Patent #:
Issue Dt:
03/02/2010
Application #:
11560412
Filing Dt:
11/16/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHOD AND STRUCTURE FOR REDUCING FLOATING BODY EFFECTS IN MOSFET DEVICES
3
Patent #:
Issue Dt:
07/15/2008
Application #:
11560428
Filing Dt:
11/16/2006
Publication #:
Pub Dt:
05/22/2008
Title:
DELAY MECHANISM FOR UNBALANCED READ/WRITE PATHS IN DOMINO SRAM ARRAYS
4
Patent #:
NONE
Issue Dt:
Application #:
11560500
Filing Dt:
11/16/2006
Publication #:
Pub Dt:
04/19/2007
Title:
ACCESS CHIP LINE VARIATION AND STATIC TIMING ADJUSTMENTS
5
Patent #:
Issue Dt:
08/24/2010
Application #:
11560882
Filing Dt:
11/17/2006
Publication #:
Pub Dt:
05/22/2008
Title:
CMOS IMAGER ARRAY WITH RECESSED DIELECTRIC
6
Patent #:
Issue Dt:
11/04/2008
Application #:
11560893
Filing Dt:
11/17/2006
Publication #:
Pub Dt:
05/22/2008
Title:
MULTI-LAYER SPACER WITH INHIBITED RECESS/UNDERCUT AND METHOD FOR FABRICATION THEREOF
7
Patent #:
Issue Dt:
01/13/2009
Application #:
11560925
Filing Dt:
11/17/2006
Publication #:
Pub Dt:
05/31/2007
Title:
METHOD AND STRUCTURE FOR ENHANCING BOTH NMOSFET AND PMOSFET PERFORMANCE WITH A STRESSED FILM
8
Patent #:
Issue Dt:
02/05/2008
Application #:
11561047
Filing Dt:
11/17/2006
Publication #:
Pub Dt:
05/31/2007
Title:
METHOD AND STRUCTURE FOR ENHANCING BOTH NMOSFET AND PMOSFET PERFORMANCE WTH A STRESSED FILM
9
Patent #:
Issue Dt:
01/19/2010
Application #:
11561273
Filing Dt:
11/17/2006
Publication #:
Pub Dt:
04/19/2007
Title:
INTERPOSER WITH ELECTRICAL CONTACT BUTTON AND METHOD
10
Patent #:
Issue Dt:
04/21/2009
Application #:
11561434
Filing Dt:
11/20/2006
Publication #:
Pub Dt:
05/22/2008
Title:
WIRE AND SOLDER BOND FORMING METHODS
11
Patent #:
Issue Dt:
10/13/2009
Application #:
11561437
Filing Dt:
11/20/2006
Publication #:
Pub Dt:
05/22/2008
Title:
WIRE AND SOLDER BOND FORMING METHODS
12
Patent #:
Issue Dt:
11/09/2010
Application #:
11561488
Filing Dt:
11/20/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHOD OF FABRICATING A STRESSED MOSFET BY BENDING SOI REGION
13
Patent #:
Issue Dt:
01/04/2011
Application #:
11561496
Filing Dt:
11/20/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHOD OF ENHANCING HOLE MOBILITY
14
Patent #:
Issue Dt:
08/11/2009
Application #:
11561982
Filing Dt:
11/21/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHOD TO FORM SELECTIVE STRAINED SI USING LATERAL EPITAXY
15
Patent #:
Issue Dt:
03/09/2010
Application #:
11562093
Filing Dt:
11/21/2006
Publication #:
Pub Dt:
05/22/2008
Title:
CMOS STRUCTURE INCLUDING TOPOGRAPHIC ACTIVE REGION
16
Patent #:
Issue Dt:
02/23/2010
Application #:
11562550
Filing Dt:
11/22/2006
Publication #:
Pub Dt:
05/22/2008
Title:
INTERCONNECT STRUCTURES WITH IMPROVED ELECTROMIGRATION RESISTANCE AND METHODS FOR FORMING SUCH INTERCONNECT STRUCTURES
17
Patent #:
Issue Dt:
05/11/2010
Application #:
11562735
Filing Dt:
11/22/2006
Publication #:
Pub Dt:
05/29/2008
Title:
INCORPORATION OF CARBON IN SILICON/SILICON GERMANIUM EPITAXIAL LAYER TO ENHANCE YIELD FOR SI-GE BIPOLAR TECHNOLOGY
18
Patent #:
Issue Dt:
08/02/2011
Application #:
11562830
Filing Dt:
11/22/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHOD FOR DETECTING RACE CONDITIONS INVOLVING HEAP MEMORY ACCESS
19
Patent #:
Issue Dt:
03/31/2009
Application #:
11563048
Filing Dt:
11/24/2006
Publication #:
Pub Dt:
05/29/2008
Title:
RUN-TIME CHARACTERIZATION OF ON-DEMAND ANALYTICAL MODEL ACCURACY
20
Patent #:
Issue Dt:
09/16/2008
Application #:
11563858
Filing Dt:
11/28/2006
Publication #:
Pub Dt:
05/29/2008
Title:
PROCESS OF ETCHING A TITANIUM/TUNGSTEN SURFACE AND ETCHANT USED THEREIN
21
Patent #:
NONE
Issue Dt:
Application #:
11564344
Filing Dt:
11/29/2006
Publication #:
Pub Dt:
05/29/2008
Title:
STRUCTURE FOR CREATION OF A PROGRAMMABLE DEVICE
22
Patent #:
Issue Dt:
01/06/2009
Application #:
11564353
Filing Dt:
11/29/2006
Publication #:
Pub Dt:
05/29/2008
Title:
FOLDED-SHEET-METAL HEATSINKS FOR CLOSELY PACKAGED HEAT-PRODUCING DEVICES
23
Patent #:
Issue Dt:
07/06/2010
Application #:
11564358
Filing Dt:
11/29/2006
Publication #:
Pub Dt:
05/29/2008
Title:
EMBEDDED NANO UV BLOCKING AND DIFFUSION BARRIER FOR IMPROVED RELIABILITY OF COPPER/ULTRA LOW K INTERLEVEL DIELECTRIC ELECTRONIC DEVICES
24
Patent #:
Issue Dt:
12/16/2008
Application #:
11564875
Filing Dt:
11/30/2006
Publication #:
Pub Dt:
06/05/2008
Title:
CHIP SEAL RING FOR ENHANCING THE OPERATION OF AN ON-CHIP LOOP ANTENNA
25
Patent #:
Issue Dt:
01/19/2010
Application #:
11564957
Filing Dt:
11/30/2006
Publication #:
Pub Dt:
06/05/2008
Title:
LOCAL COLORING FOR HIERARCHICAL OPC
26
Patent #:
Issue Dt:
02/02/2010
Application #:
11564961
Filing Dt:
11/30/2006
Publication #:
Pub Dt:
06/05/2008
Title:
TRIPLE GATE AND DOUBLE GATE FINFETS WITH DIFFERENT VERTICAL DIMENSION FINS
27
Patent #:
Issue Dt:
04/13/2010
Application #:
11565793
Filing Dt:
12/01/2006
Publication #:
Pub Dt:
06/05/2008
Title:
LOW DEFECT SI:C LAYER WITH RETROGRADE CARBON PROFILE
28
Patent #:
Issue Dt:
04/13/2010
Application #:
11565803
Filing Dt:
12/01/2006
Publication #:
Pub Dt:
06/05/2008
Title:
SYSTEM AND METHOD FOR EFFICIENT ANALYSIS OF POINT-TO-POINT DELAY CONSTRAINTS IN STATIC TIMING
29
Patent #:
NONE
Issue Dt:
Application #:
11565952
Filing Dt:
12/01/2006
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD AND SYSTEM FOR NANOSTRUCTURE PLACEMENT USING IMPRINT LITHOGRAPHY
30
Patent #:
Issue Dt:
07/21/2009
Application #:
11566360
Filing Dt:
12/04/2006
Publication #:
Pub Dt:
10/11/2007
Title:
SELF-ALIGNED, SILICIDED, TRENCH-BASED DRAM/EDRAM PROCESSES WITH IMPROVED RETENTION
31
Patent #:
Issue Dt:
08/31/2010
Application #:
11566579
Filing Dt:
12/04/2006
Publication #:
Pub Dt:
05/08/2008
Title:
PLANAR SUBSTRATE WITH SELECTED SEMICONDUCTOR CRYSTAL ORIENTATIONS FORMED BY LOCALIZED AMORPHIZATION AND RECRYSTALLIZATION OF STACKED TEMPLATE LAYERS
32
Patent #:
Issue Dt:
10/04/2011
Application #:
11566845
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
AUTOMATIC VENTING OF REFILLABLE BULK LIQUID CANISTERS
33
Patent #:
Issue Dt:
01/27/2009
Application #:
11566848
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
FULLY AND UNIFORMLY SILICIDED GATE STRUCTURE AND METHOD FOR FORMING SAME
34
Patent #:
Issue Dt:
06/16/2009
Application #:
11566922
Filing Dt:
12/05/2006
Publication #:
Pub Dt:
06/05/2008
Title:
DESIGN METHODOLOGY OF GUARD RING DESIGN RESISTANCE OPTIMIZATION FOR LATCHUP PREVENTION
35
Patent #:
Issue Dt:
11/24/2009
Application #:
11567517
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
06/12/2008
Title:
METHOD FOR IMPROVED FORMATION OF NICKEL SILICIDE CONTACTS IN SEMICONDUCTOR DEVICES
36
Patent #:
Issue Dt:
02/03/2009
Application #:
11567804
Filing Dt:
12/07/2006
Publication #:
Pub Dt:
06/28/2007
Title:
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR
37
Patent #:
Issue Dt:
05/04/2010
Application #:
11568156
Filing Dt:
10/20/2006
Publication #:
Pub Dt:
09/20/2007
Title:
TUNEABLE SEMICONDUCTOR DEVICE WITH DISCONTINUOUS PORTIONS IN THE SUB-COLLECTOR
38
Patent #:
NONE
Issue Dt:
05/04/2010
Application #:
11568156
Filing Dt:
10/20/2006
Publication #:
Pub Dt:
09/20/2007
PCT #:
US2004012321
Title:
TUNEABLE SEMICONDUCTOR DEVICE WITH DISCONTINUOUS PORTIONS IN THE SUB-COLLECTOR
39
Patent #:
NONE
Issue Dt:
Application #:
11570014
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
07/10/2008
Title:
FABRICATION OF INTERCONNECT STRUCTURES
40
Patent #:
NONE
Issue Dt:
Application #:
11570014
Filing Dt:
11/21/2007
Publication #:
Pub Dt:
07/10/2008
PCT #:
US2005018196
Title:
FABRICATION OF INTERCONNECT STRUCTURES
41
Patent #:
Issue Dt:
04/29/2014
Application #:
11571811
Filing Dt:
01/22/2009
Publication #:
Pub Dt:
08/27/2009
Title:
METHOD AND SYSTEM FOR IMPROVING ALIGNMENT PRECISION OF PARTS IN MEMS
42
Patent #:
NONE
Issue Dt:
04/29/2014
Application #:
11571811
Filing Dt:
01/22/2009
Publication #:
Pub Dt:
08/27/2009
PCT #:
EP2005052248
Title:
METHOD AND SYSTEM FOR IMPROVING ALIGNMENT PRECISION OF PARTS IN MEMS
43
Patent #:
Issue Dt:
02/17/2009
Application #:
11580033
Filing Dt:
10/13/2006
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD AND STRUCTURE FOR VARIABLE PITCH MICROWAVE PROBE ASSEMBLY
44
Patent #:
Issue Dt:
08/03/2010
Application #:
11581498
Filing Dt:
10/16/2006
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD FOR SEM MEASUREMENT OF FEATURES USING MAGNETICALLY FILTERED LOW LOSS ELECTRON MICROSCOPY
45
Patent #:
NONE
Issue Dt:
Application #:
11581771
Filing Dt:
10/16/2006
Publication #:
Pub Dt:
03/01/2007
Title:
Wafer integrated rigid support ring
46
Patent #:
Issue Dt:
12/04/2007
Application #:
11582246
Filing Dt:
08/23/2006
Publication #:
Pub Dt:
03/22/2007
Title:
METHOD, APPARATUS AND PROGRAM STORAGE DEVICE FOR PROVIDING DATA PATH OPTIMIZATION
47
Patent #:
Issue Dt:
04/20/2010
Application #:
11585361
Filing Dt:
10/23/2006
Publication #:
Pub Dt:
02/15/2007
Title:
RAISED SOURCE DRAIN MOSFET WITH AMORPHOUS NOTCHED GATE CAP LAYER WITH NOTCH SIDEWALLS PASSIVATED AND FILLED WITH DIELECTRIC PLUG
48
Patent #:
Issue Dt:
09/14/2010
Application #:
11595243
Filing Dt:
11/09/2006
Publication #:
Pub Dt:
08/23/2007
Title:
CREATING AN ERROR CORRECTION CODING SCHEME AND REDUCING DATA LOSS
49
Patent #:
Issue Dt:
02/17/2009
Application #:
11598507
Filing Dt:
11/13/2006
Publication #:
Pub Dt:
06/07/2007
Title:
METHOD AND STRUCTURE FOR BURIED CIRCUITS AND DEVICES
50
Patent #:
Issue Dt:
07/12/2011
Application #:
11599272
Filing Dt:
11/15/2006
Publication #:
Pub Dt:
05/15/2008
Title:
METHOD AND INFRASTRUCTURE FOR DETECTING AND/OR SERVICING A FAILING/FAILED OPERATING SYSTEM INSTANCE
51
Patent #:
Issue Dt:
08/17/2010
Application #:
11600140
Filing Dt:
11/16/2006
Publication #:
Pub Dt:
05/22/2008
Title:
METHOD AND SYSTEM FOR TONE INVERTING OF RESIDUAL LAYER TOLERANT IMPRINT LITHOGRAPHY
52
Patent #:
Issue Dt:
03/03/2009
Application #:
11602861
Filing Dt:
11/21/2006
Publication #:
Pub Dt:
05/22/2008
Title:
HEATPLATES FOR HEATSINK ATTACHMENT FOR SEMICONDUCTOR CHIPS
53
Patent #:
Issue Dt:
11/03/2009
Application #:
11604152
Filing Dt:
11/22/2006
Publication #:
Pub Dt:
05/22/2008
Title:
STRUCTURES TO ENHANCE COOLING OF COMPUTER MEMORY MODULES
54
Patent #:
Issue Dt:
07/26/2011
Application #:
11608268
Filing Dt:
12/08/2006
Publication #:
Pub Dt:
06/12/2008
Title:
SYSTEM, METHOD, AND SERVICE FOR TRACING TRAITORS FROM CONTENT PROTECTION CIRCUMVENTION DEVICES
55
Patent #:
Issue Dt:
06/28/2011
Application #:
11608863
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
06/12/2008
Title:
METHOD AND APPARATUS FOR FILTER CONDITIONING
56
Patent #:
NONE
Issue Dt:
Application #:
11608885
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
06/28/2007
Title:
VERIFICATION OPERATION SUPPORTING SYSTEM AND METHOD OF THE SAME
57
Patent #:
Issue Dt:
07/19/2011
Application #:
11608948
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
06/12/2008
Title:
SYSTEMS AND ARRANGEMENTS FOR CLOCK AND DATA RECOVERY IN COMMUNICATIONS
58
Patent #:
Issue Dt:
03/29/2011
Application #:
11608962
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
06/12/2008
Title:
SYSTEMS AND ARRANGEMENTS FOR CLOCK AND DATA RECOVERY IN COMMUNICATIONS
59
Patent #:
Issue Dt:
07/14/2009
Application #:
11609033
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
06/12/2008
Title:
OPC VERIFICATION USING AUTO-WINDOWED REGIONS
60
Patent #:
Issue Dt:
11/23/2010
Application #:
11609040
Filing Dt:
12/11/2006
Publication #:
Pub Dt:
09/27/2007
Title:
METHOD OF REPAIRING PROCESS INDUCED DIELECTRIC DAMAGE BY THE USE OF GCIB SURFACE TREATMENT USING GAS CLUSTERS OF ORGANIC MOLECULAR SPECIES
61
Patent #:
Issue Dt:
11/03/2009
Application #:
11609403
Filing Dt:
12/12/2006
Publication #:
Pub Dt:
06/12/2008
Title:
PROGRAMMABLE LOCAL CLOCK BUFFER CAPABLE OF VARYING INITIAL SETTINGS
62
Patent #:
Issue Dt:
05/17/2011
Application #:
11609496
Filing Dt:
12/12/2006
Publication #:
Pub Dt:
06/12/2008
Title:
GATE CONDUCTOR STRUCTURE
63
Patent #:
Issue Dt:
12/16/2008
Application #:
11610082
Filing Dt:
12/13/2006
Publication #:
Pub Dt:
06/19/2008
Title:
CERAMIC SUBSTRATE GRID STRUCTURE FOR THE CREATION OF VIRTUAL COAX ARRANGEMENT
64
Patent #:
NONE
Issue Dt:
Application #:
11610470
Filing Dt:
12/13/2006
Publication #:
Pub Dt:
06/19/2008
Title:
SELECTIVE SURFACE ROUGHNESS FOR HIGH SPEED SIGNALING
65
Patent #:
Issue Dt:
08/10/2010
Application #:
11610533
Filing Dt:
12/14/2006
Publication #:
Pub Dt:
06/19/2008
Title:
COMBINATION PLANAR FET AND FINFET DEVICE
66
Patent #:
Issue Dt:
06/16/2009
Application #:
11610567
Filing Dt:
12/14/2006
Publication #:
Pub Dt:
06/19/2008
Title:
LATCH PLACEMENT FOR HIGH PERFORMANCE AND LOW POWER CIRCUITS
67
Patent #:
Issue Dt:
01/20/2009
Application #:
11610848
Filing Dt:
12/14/2006
Publication #:
Pub Dt:
06/19/2008
Title:
CLOCK DISTRIBUTION NETWORK, STRUCTURE, AND METHOD FOR PROVIDING BALANCED LOADING IN INTEGRATED CIRCUIT CLOCK TREES
68
Patent #:
Issue Dt:
10/28/2008
Application #:
11610900
Filing Dt:
12/14/2006
Publication #:
Pub Dt:
06/21/2007
Title:
DIGITAL PHASE AND FREQUENCY DETECTOR
69
Patent #:
Issue Dt:
01/01/2008
Application #:
11612309
Filing Dt:
12/18/2006
Publication #:
Pub Dt:
05/03/2007
Title:
ENHANCEMENT OF ELECTRON AND HOLE MOBILITIES IN 110 SI UNDER BIAXIAL COMPRESSIVE STRAIN
70
Patent #:
Issue Dt:
11/16/2010
Application #:
11612501
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
PROGRAMMABLE-RESISTANCE MEMORY CELL
71
Patent #:
Issue Dt:
06/16/2009
Application #:
11612628
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
REDUNDANCY PROGRAMMING FOR A MEMORY DEVICE
72
Patent #:
Issue Dt:
01/26/2010
Application #:
11612631
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
PROGRAMMABLE VIA STRUCTURE AND METHOD OF FABRICATING SAME
73
Patent #:
Issue Dt:
07/08/2008
Application #:
11612809
Filing Dt:
12/19/2006
Publication #:
Pub Dt:
06/19/2008
Title:
HIGH PERFORMANCE SINGLE EVENT UPSET HARDENED SRAM CELL
74
Patent #:
Issue Dt:
04/22/2008
Application #:
11613516
Filing Dt:
12/20/2006
Title:
FLEXIBLE MULTIMODE LOGIC ELEMENT FOR USE IN A CONFIGURABLE MIXED-LOGIC SIGNAL DISTRIBUTION PATH
75
Patent #:
NONE
Issue Dt:
Application #:
11613754
Filing Dt:
12/20/2006
Publication #:
Pub Dt:
06/26/2008
Title:
SYSTEMS AND METHODS FOR REDUCING WIRING VIAS DURING SYNTHESIS OF ELECTRONIC DESIGNS
76
Patent #:
NONE
Issue Dt:
Application #:
11614260
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
06/26/2008
Title:
AUTOMATED OPTIMIZATION OF VLSI LAYOUTS FOR REGULARITY
77
Patent #:
Issue Dt:
01/19/2010
Application #:
11614799
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
05/10/2007
Title:
ANTIREFLECTIVE HARDMASK AND USES THEREOF
78
Patent #:
Issue Dt:
05/26/2009
Application #:
11615153
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
SCALABLE STRAINED FET DEVICE AND METHOD OF FABRICATING THE SAME
79
Patent #:
Issue Dt:
01/19/2010
Application #:
11615236
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
SEMICONDUCTOR CHIP SHAPE ALTERATION
80
Patent #:
Issue Dt:
03/10/2009
Application #:
11615272
Filing Dt:
12/22/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METHOD OF FORMATION OF A DAMASCENE STRUCTURE UTILIZING A PROTECTIVE FILM
81
Patent #:
NONE
Issue Dt:
Application #:
11616183
Filing Dt:
12/26/2006
Publication #:
Pub Dt:
06/26/2008
Title:
METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR WITH AN ASYMMETRIC SILICIDE
82
Patent #:
NONE
Issue Dt:
Application #:
11616532
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
METHOD FOR FABRICATING A MICROELECTRONIC CONDUCTOR STRUCTURE
83
Patent #:
NONE
Issue Dt:
Application #:
11616730
Filing Dt:
12/27/2006
Publication #:
Pub Dt:
07/03/2008
Title:
STRESS LINER SURROUNDED FACETLESS EMBEDDED STRESSOR MOSFET
84
Patent #:
Issue Dt:
05/25/2010
Application #:
11616965
Filing Dt:
12/28/2006
Publication #:
Pub Dt:
07/03/2008
Title:
TRANSISTOR BASED ANTIFUSE WITH INTEGRATED HEATING ELEMENT
85
Patent #:
Issue Dt:
12/02/2008
Application #:
11617610
Filing Dt:
12/28/2006
Publication #:
Pub Dt:
07/03/2008
Title:
METHOD FOR CREATING AN IN-MEMORY PHYSICAL DICTIONARY FOR DATA COMPRESSION
86
Patent #:
Issue Dt:
04/21/2009
Application #:
11618346
Filing Dt:
12/29/2006
Publication #:
Pub Dt:
07/03/2008
Title:
SOFT ERROR REDUCTION OF CMOS CIRCUITS ON SUBSTRATES WITH HYBRID CRYSTAL ORIENTATION USING BURIED RECOMBINATION CENTERS
87
Patent #:
Issue Dt:
07/29/2008
Application #:
11618770
Filing Dt:
12/30/2006
Publication #:
Pub Dt:
05/31/2007
Title:
EPITAXIAL AND POLYCRYSTALLINE GROWTH OF SI1-X-YGEXCY AND SI1-YCY ALLOY LAYERS ON SI BY UHV-CVD
88
Patent #:
NONE
Issue Dt:
Application #:
11618940
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
07/03/2008
Title:
HIGH DENSITY DATA STORAGE MEDIUM, METHOD AND DEVICE
89
Patent #:
Issue Dt:
07/07/2009
Application #:
11618945
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
07/03/2008
Title:
HIGH DENSITY DATA STORAGE MEDIUM, METHOD AND DEVICE
90
Patent #:
Issue Dt:
12/30/2008
Application #:
11618952
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
07/03/2008
Title:
REAL-TIME FREQUENCY BAND SELECTION CIRCUIT FOR USE WITH A VOLTAGE CONTROLLED OSCILLATOR
91
Patent #:
Issue Dt:
06/23/2009
Application #:
11618957
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
07/03/2008
Title:
TRENCH STRUCTURE AND METHOD FOR CO-ALIGNMENT OF MIXED OPTICAL AND ELECTRON BEAM LITHOGRAPHIC FABRICATION LEVELS
92
Patent #:
Issue Dt:
04/13/2010
Application #:
11618974
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
07/03/2008
Title:
METHOD FOR CO-ALIGNMENT OF MIXED OPTICAL AND ELECTRON BEAM LITHOGRAPHIC FABRICATION LEVELS
93
Patent #:
Issue Dt:
06/10/2008
Application #:
11618993
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
07/03/2008
Title:
METHOD OF DETERMINING STOPPING POWERS OF DESIGN STRUCTURES WITH RESPECT TO A TRAVELING PARTICLE
94
Patent #:
Issue Dt:
04/01/2008
Application #:
11619019
Filing Dt:
01/02/2007
Title:
PHASE SHIFTING AND COMBINING ARCHITECTURE FOR PHASED ARRAYS
95
Patent #:
Issue Dt:
02/17/2009
Application #:
11619024
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
05/17/2007
Title:
IMAGE SENSOR CELLS
96
Patent #:
Issue Dt:
03/24/2009
Application #:
11619040
Filing Dt:
01/02/2007
Publication #:
Pub Dt:
05/10/2007
Title:
SEMICONDUCTOR HETEROSTRUCTURE INCLUDING A SUBSTANTIALLY RELAXED, LOW DEFECT DENISTY SIGE LAYER
97
Patent #:
Issue Dt:
07/07/2009
Application #:
11619264
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
07/03/2008
Title:
REVERSIBLE ELECTRIC FUSE AND ANTIFUSE STRUCTURES FOR SEMICONDUCTOR DEVICES
98
Patent #:
Issue Dt:
07/06/2010
Application #:
11619307
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
07/03/2008
Title:
ADDRESSABLE HIERARCHICAL METAL WIRE TEST METHODOLOGY
99
Patent #:
Issue Dt:
06/29/2010
Application #:
11619323
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
05/10/2007
Title:
STRUCTURE AND METHODOLOGY FOR FABRICATION AND INSPECTION OF PHOTOMASKS
100
Patent #:
Issue Dt:
04/21/2009
Application #:
11619357
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
07/03/2008
Title:
DUAL STRESS STI
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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