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Patent #:
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Issue Dt:
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06/08/2010
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Application #:
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11683071
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Filing Dt:
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03/07/2007
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Publication #:
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Pub Dt:
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09/11/2008
| | | | |
Title:
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ELECTRICAL FUSE STRUCTURE FOR HIGHER POST-PROGRAMMING RESISTANCE
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Patent #:
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Issue Dt:
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05/10/2011
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Application #:
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11683285
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Filing Dt:
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03/07/2007
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Publication #:
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Pub Dt:
|
09/11/2008
| | | | |
Title:
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METHOD AND SYSTEM FOR PROVIDING AN IMPROVED STORE-IN CACHE
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Patent #:
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Issue Dt:
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02/09/2010
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Application #:
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11683470
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
|
09/11/2008
| | | | |
Title:
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METHOD OF FORMING A TRANSISTOR HAVING GATE AND BODY IN DIRECT SELF-ALIGNED CONTACT
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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11683539
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
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09/11/2008
| | | | |
Title:
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SYSTEM AND METHOD FOR CIRCUIT DESIGN SCALING
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Patent #:
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Issue Dt:
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06/02/2009
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Application #:
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11683590
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
|
09/11/2008
| | | | |
Title:
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METHODS OF FORMING INTEGRATED CIRCUIT STRUCTURES USING INSULATOR DEPOSITION AND INSULATOR GAP FILLING TECHNIQUES
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11683596
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
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09/11/2008
| | | | |
Title:
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CARBON TUBE FOR ELECTRON BEAM APPLICATION
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Patent #:
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Issue Dt:
|
06/02/2009
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Application #:
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11683648
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
|
09/11/2008
| | | | |
Title:
|
METHODS OF FORMING MASK PATTERNS ON SEMICONDUCTOR WAFERS THAT COMPENSATE FOR NONUNIFORM CENTER-TO-EDGE ETCH RATES DURING PHOTOLITHOGRAPHIC PROCESSING
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Patent #:
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Issue Dt:
|
07/19/2011
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Application #:
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11683825
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Filing Dt:
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03/08/2007
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Publication #:
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Pub Dt:
|
09/11/2008
| | | | |
Title:
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REVERSIBLE THERMAL THICKENING GREASE
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Patent #:
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Issue Dt:
|
11/02/2010
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Application #:
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11684225
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Filing Dt:
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03/09/2007
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Publication #:
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Pub Dt:
|
09/11/2008
| | | | |
Title:
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DEVICE THRESHOLD CALIBRATION THROUGH STATE DEPENDENT BURN-IN
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Patent #:
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Issue Dt:
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06/08/2010
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Application #:
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11684306
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Filing Dt:
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03/09/2007
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Publication #:
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Pub Dt:
|
06/28/2007
| | | | |
Title:
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EPITAXIAL IMPRINTING
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Patent #:
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Issue Dt:
|
11/04/2008
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Application #:
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11684506
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Filing Dt:
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03/09/2007
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Publication #:
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Pub Dt:
|
06/28/2007
| | | | |
Title:
|
PROCESS FOR PREPARING A FILM HAVING ALTERNATING MONOLAYERS OF A METAL-METAL BONDED COMPLEX MONOLAYER AND AN ORGANIC MONOLAYER BY LAYER-BY LAYER GROWTH
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
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11684619
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Filing Dt:
|
03/11/2007
|
Publication #:
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Pub Dt:
|
09/11/2008
| | | | |
Title:
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Mobility Enhanced FET Devices
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Patent #:
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Issue Dt:
|
04/06/2010
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Application #:
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11684655
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Filing Dt:
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03/12/2007
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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APPARATUS AND METHOD FOR INTEGRATING NONVOLATILE MEMORY CAPABILITY WITHIN SRAM DEVICES
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Patent #:
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|
Issue Dt:
|
01/31/2012
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Application #:
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11684775
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Filing Dt:
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03/12/2007
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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METHOD AND SYSTEM FOR SOFT ERROR RECOVERY DURING PROCESSOR EXECUTION
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|
Patent #:
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|
Issue Dt:
|
02/03/2009
|
Application #:
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11684855
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Filing Dt:
|
03/12/2007
|
Publication #:
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|
Pub Dt:
|
07/05/2007
| | | | |
Title:
|
STRAINED SI MOSFET ON TENSILE-STRAINED SIGE-ON-INSULATOR (SGOI)
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|
Patent #:
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|
Issue Dt:
|
02/15/2011
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Application #:
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11684899
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Filing Dt:
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03/12/2007
|
Publication #:
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|
Pub Dt:
|
09/27/2007
| | | | |
Title:
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METHOD AND SYSTEM FOR VERIFYING THE EQUIVALENCE OF DIGITAL CIRCUITS
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Patent #:
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Issue Dt:
|
07/01/2008
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Application #:
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11685457
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Filing Dt:
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03/13/2007
|
Title:
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SEMICONDUCTOR STRUCTURE INCLUDING LAMINATED ISOLATION REGION
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|
Patent #:
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|
Issue Dt:
|
01/25/2011
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Application #:
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11685458
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Filing Dt:
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03/13/2007
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Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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CMOS STRUCTURE INCLUDING DIFFERENTIAL CHANNEL STRESSING LAYER COMPOSITIONS
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|
Patent #:
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Issue Dt:
|
10/26/2010
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Application #:
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11685558
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Filing Dt:
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03/13/2007
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
ADVANCED HIGH-K GATE STACK PATTERNING AND STRUCTURE CONTAINING A PATTERNED HIGH-K GATE STACK
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|
Patent #:
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Issue Dt:
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07/14/2009
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Application #:
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11685904
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Filing Dt:
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03/14/2007
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Publication #:
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Pub Dt:
|
07/19/2007
| | | | |
Title:
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INTERNALLY ASYMMETRIC METHOD FOR EVALUATING STATIC MEMORY CELL DYNAMIC STABILITY
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|
Patent #:
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Issue Dt:
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04/07/2009
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Application #:
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11685905
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Filing Dt:
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03/14/2007
|
Publication #:
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Pub Dt:
|
07/05/2007
| | | | |
Title:
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METHOD FOR EVALUATING LEAKAGE EFFECTS ON STATIC MEMORY CELL ACCESS TIME
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|
Patent #:
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|
Issue Dt:
|
11/18/2008
|
Application #:
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11686013
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Filing Dt:
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03/14/2007
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
|
PROCESS FOR MAKING FINFET DEVICE WITH BODY CONTACT AND BURIED OXIDE JUNCTION ISOLATION
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|
Patent #:
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|
Issue Dt:
|
11/04/2008
|
Application #:
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11686415
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Filing Dt:
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03/15/2007
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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METHOD AND STRUCTURE FOR INCREASING EFFECTIVE TRANSISTOR WIDTH IN MEMORY ARRAYS WITH DUAL BITLINES
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Patent #:
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|
Issue Dt:
|
02/23/2010
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Application #:
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11686972
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Filing Dt:
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03/16/2007
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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PUMP STRUCTURES INTEGRAL TO A FLUID FILLED HEAT TRANSFER APPARATUS
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|
Patent #:
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Issue Dt:
|
07/22/2008
|
Application #:
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11687000
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Filing Dt:
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03/16/2007
|
Publication #:
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Pub Dt:
|
07/19/2007
| | | | |
Title:
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FLIP FERAM CELL AND METHOD TO FORM SAME
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|
|
Patent #:
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Issue Dt:
|
02/22/2011
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Application #:
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11687003
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Filing Dt:
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03/16/2007
|
Publication #:
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Pub Dt:
|
07/19/2007
| | | | |
Title:
|
SCAN CHAIN DIAGNOSTICS USING LOGIC PATHS
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|
Patent #:
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Issue Dt:
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02/01/2011
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Application #:
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11687017
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Filing Dt:
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03/16/2007
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Publication #:
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Pub Dt:
|
07/05/2007
| | | | |
Title:
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METAL SEED LAYER DEPOSITION
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|
Patent #:
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Issue Dt:
|
05/04/2010
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Application #:
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11687037
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Filing Dt:
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03/16/2007
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
|
THERMAL PILLOW
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|
Patent #:
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Issue Dt:
|
12/28/2010
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Application #:
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11687230
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Filing Dt:
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03/16/2007
|
Publication #:
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|
Pub Dt:
|
09/18/2008
| | | | |
Title:
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STRUCTURE AND METHOD FOR SUB-RESOLUTION DUMMY CLEAR SHAPES FOR IMPROVED GATE DIMENSIONAL CONTROL
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Patent #:
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Issue Dt:
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05/18/2010
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Application #:
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11687245
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Filing Dt:
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03/16/2007
|
Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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HIGH DYNAMIC RANGE IMAGING CELL WITH ELECTRONIC SHUTTER EXTENSIONS
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Patent #:
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Issue Dt:
|
09/18/2012
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Application #:
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11687427
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Filing Dt:
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03/16/2007
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Publication #:
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Pub Dt:
|
09/18/2008
| | | | |
Title:
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SYMBOLIC DEPTH-FIRST SEARCHES USING CONTROL FLOW INFORMATION FOR IMPROVED REACHABILITY ANALYSIS
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Patent #:
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Issue Dt:
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01/29/2008
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Application #:
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11687731
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Filing Dt:
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03/19/2007
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Publication #:
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Pub Dt:
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07/12/2007
| | | | |
Title:
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METHOD OF ADDING FABRICATION MONITORS TO INTEGRATED CIRCUIT CHIPS
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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11688455
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Filing Dt:
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03/20/2007
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Publication #:
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Pub Dt:
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09/25/2008
| | | | |
Title:
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RETENTION-TIME CONTROL AND ERROR MANAGEMENT IN A CACHE SYSTEM COMPRISING DYNAMIC STORAGE
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Patent #:
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Issue Dt:
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05/05/2009
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Application #:
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11688562
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Filing Dt:
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03/20/2007
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Publication #:
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Pub Dt:
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09/25/2008
| | | | |
Title:
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VERTICAL TRENCH MEMORY CELL WITH INSULATING RING
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Patent #:
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Issue Dt:
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03/03/2009
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Application #:
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11689096
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Filing Dt:
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03/21/2007
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Publication #:
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Pub Dt:
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11/06/2008
| | | | |
Title:
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PROGRAMMABLE HEAVY-ION SENSING DEVICE FOR ACCELERATED DRAM SOFT ERROR DETECTION
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Patent #:
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Issue Dt:
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03/03/2009
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Application #:
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11689549
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Filing Dt:
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03/22/2007
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Publication #:
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Pub Dt:
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08/09/2007
| | | | |
Title:
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CHEVRON CMOS TRIGATE STRUCTURE
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
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11689884
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Filing Dt:
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03/22/2007
|
Publication #:
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Pub Dt:
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09/25/2008
| | | | |
Title:
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METHOD FOR REMOVING MATERIAL FROM A SEMICONDUCTOR
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Patent #:
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Issue Dt:
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06/22/2010
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Application #:
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11690181
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Filing Dt:
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03/23/2007
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Publication #:
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Pub Dt:
|
11/06/2008
| | | | |
Title:
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THROUGH-WAFER VIAS
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|
Patent #:
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Issue Dt:
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02/22/2011
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Application #:
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11690258
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Filing Dt:
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03/23/2007
|
Publication #:
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|
Pub Dt:
|
09/25/2008
| | | | |
Title:
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METHOD OF FORMING ASYMMETRIC SPACERS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICE USING ASYMMETRIC SPACERS
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Patent #:
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Issue Dt:
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08/16/2011
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Application #:
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11690295
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Filing Dt:
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03/23/2007
|
Publication #:
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Pub Dt:
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09/25/2008
| | | | |
Title:
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ORIENTING, POSITIONING, AND FORMING NANOSCALE STRUCTURES
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|
Patent #:
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Issue Dt:
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01/25/2011
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Application #:
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11690619
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Filing Dt:
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03/23/2007
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Publication #:
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Pub Dt:
|
09/25/2008
| | | | |
Title:
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REVERSE CONCATENATION FOR PRODUCT CODES
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Patent #:
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|
Issue Dt:
|
01/18/2011
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Application #:
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11690635
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Filing Dt:
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03/23/2007
|
Publication #:
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Pub Dt:
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09/25/2008
| | | | |
Title:
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REVERSE CONCATENATION FOR PRODUCT CODES
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Patent #:
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Issue Dt:
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12/25/2012
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Application #:
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11690682
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Filing Dt:
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05/08/2007
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Publication #:
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Pub Dt:
|
11/13/2008
| | | | |
Title:
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PACKAGE INTEGRATED SOFT MAGNETIC FILM FOR IMPROVEMENT IN ON-CHIP INDUCTOR PERFORMANCE
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|
Patent #:
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Issue Dt:
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11/19/2013
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Application #:
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11690975
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Filing Dt:
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03/26/2007
|
Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
Title:
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SILICON ON INSULATOR (SOI) FIELD EFFECT TRANSISTORS (FETS) WITH ADJACENT BODY CONTACTS
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Patent #:
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Issue Dt:
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01/27/2009
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Application #:
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11691001
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Filing Dt:
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03/26/2007
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Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
Title:
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USE OF DILUTE HYDROCHLORIC ACID IN ADVANCED INTERCONNECT CONTACT CLEAN IN NICKEL SEMICONDUCTOR TECHNOLOGIES
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Patent #:
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Issue Dt:
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05/25/2010
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Application #:
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11691755
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Filing Dt:
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03/27/2007
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Publication #:
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Pub Dt:
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10/02/2008
| | | | |
Title:
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ELECTRICALLY TUNABLE RESISTOR AND RELATED METHODS
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Patent #:
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Issue Dt:
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07/13/2010
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Application #:
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11691856
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Filing Dt:
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03/27/2007
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Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
Title:
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METHOD AND APPARATUS FOR ON-THE-FLY MINIMUM POWER STATE TRANSITION
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Patent #:
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Issue Dt:
|
09/06/2011
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Application #:
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11692336
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Filing Dt:
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03/28/2007
|
Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
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INTEGRATED CIRCUIT HAVING RESISTOR BETWEEN BEOL INTERCONNECT AND FEOL STRUCTURE AND RELATED METHOD
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Patent #:
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Issue Dt:
|
05/05/2009
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Application #:
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11692402
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Filing Dt:
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03/28/2007
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Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
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CMOS GATE CONDUCTOR HAVING CROSS-DIFFUSION BARRIER
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Patent #:
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Issue Dt:
|
04/08/2008
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Application #:
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11692453
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Filing Dt:
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03/28/2007
|
Publication #:
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|
Pub Dt:
|
07/26/2007
| | | | |
Title:
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STRUCTURE FOR REDUCING OVERLAP CAPACITANCE IN FIELD EFFECT TRANSISTORS
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Patent #:
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|
Issue Dt:
|
11/10/2009
|
Application #:
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11692473
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Filing Dt:
|
03/28/2007
|
Publication #:
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Pub Dt:
|
07/12/2007
| | | | |
Title:
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BURIED PLATE STRUCTURE FOR VERTICAL DRAM DEVICES
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|
Patent #:
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|
Issue Dt:
|
09/07/2010
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Application #:
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11693035
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Filing Dt:
|
03/29/2007
|
Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
Title:
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METAL SILICIDE ALLOY LOCAL INTERCONNECT
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|
Patent #:
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|
Issue Dt:
|
08/17/2010
|
Application #:
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11693041
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Filing Dt:
|
03/29/2007
|
Publication #:
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Pub Dt:
|
10/02/2008
| | | | |
Title:
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NON-PLANAR FUSE STRUCTURE INCLUDING ANGULAR BEND
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|
Patent #:
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|
Issue Dt:
|
06/15/2010
|
Application #:
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11693153
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Filing Dt:
|
03/29/2007
|
Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
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STRUCTURE AND METHOD FOR LOW RESISTANCE INTERCONNECTIONS
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
11693271
|
Filing Dt:
|
03/29/2007
|
Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
METHODS FOR FORMING DENSE DIELECTRIC LAYER OVER POROUS DIELECTRICS
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|
|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
11693377
|
Filing Dt:
|
03/29/2007
|
Publication #:
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|
Pub Dt:
|
07/26/2007
| | | | |
Title:
|
STRUCTURE AND METHOD FOR MANUFACTURING PLANAR STRAINED Si/SiGe SUBSTRATE WITH MULTIPLE ORIENTATIONS AND DIFFERENT STRESS LEVELS
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|
Patent #:
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|
Issue Dt:
|
07/14/2009
|
Application #:
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11693409
|
Filing Dt:
|
03/29/2007
|
Publication #:
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|
Pub Dt:
|
12/13/2007
| | | | |
Title:
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DUV LASER ANNEALING AND STABILIZATION OF SICOH FILMS
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|
Patent #:
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|
Issue Dt:
|
11/08/2011
|
Application #:
|
11694025
|
Filing Dt:
|
03/30/2007
|
Publication #:
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|
Pub Dt:
|
10/02/2008
| | | | |
Title:
|
MULTI-BIT MEMORY ERROR DETECTION AND CORRECTION SYSTEM AND METHOD
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|
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Patent #:
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Issue Dt:
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10/14/2008
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Application #:
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11694104
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Filing Dt:
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03/30/2007
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Publication #:
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Pub Dt:
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10/02/2008
| | | | |
Title:
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INTEGRATION SCHEMES FOR FABRICATING POLYSILICON GATE MOSFET AND HIGH-K DIELECTRIC METAL GATE MOSFET
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Patent #:
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Issue Dt:
|
07/06/2010
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Application #:
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11694117
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Filing Dt:
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03/30/2007
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Publication #:
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Pub Dt:
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10/02/2008
| | | | |
Title:
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RELEASE LAYER FOR IMPRINTED PHOTOCATIONIC CURABLE RESINS
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Patent #:
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Issue Dt:
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01/04/2011
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Application #:
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11694940
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Filing Dt:
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03/30/2007
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Publication #:
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Pub Dt:
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10/02/2008
| | | | |
Title:
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INSTRUCTION ENCODING IN A HARDWARE SIMULATION ACCELERATOR
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11695461
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Filing Dt:
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04/02/2007
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Publication #:
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Pub Dt:
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10/02/2008
| | | | |
Title:
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METHOD FOR READING INFORMATION FROM A HIERARCHICAL DESIGN
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Patent #:
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Issue Dt:
|
02/24/2009
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Application #:
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11695700
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Filing Dt:
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04/03/2007
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
Title:
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INTELLIGENT, SELF-PROPELLED AUTOMATIC GRID CRAWLER HIGH IMPEDANCE FAULT DETECTOR AND HIGH IMPEDANCE FAULT DETECTING SYSTEM
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Patent #:
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Issue Dt:
|
05/26/2009
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Application #:
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11696268
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Filing Dt:
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04/04/2007
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
Title:
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MULTIPLE REFERENCE FREQUENCY FRACTIONAL-N PLL (PHASE-LOCKED LOOP)
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Patent #:
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Issue Dt:
|
04/13/2010
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Application #:
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11696331
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Filing Dt:
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04/04/2007
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Publication #:
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Pub Dt:
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08/30/2007
| | | | |
Title:
|
FINFET BODY CONTACT STRUCTURE
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Patent #:
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Issue Dt:
|
08/10/2010
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Application #:
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11696507
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Filing Dt:
|
04/04/2007
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Publication #:
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Pub Dt:
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10/09/2008
| | | | |
Title:
|
METHOD FOR COMPOSITION CONTROL OF A METAL COMPOUND FILM
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|
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Patent #:
|
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Issue Dt:
|
09/06/2011
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Application #:
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11696753
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Filing Dt:
|
04/05/2007
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Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
Title:
|
COMPLIANT MOLD FILL HEAD WITH INTEGRATED CAVITY VENTING AND SOLDER COOLING
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Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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11696846
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Filing Dt:
|
04/05/2007
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Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
Title:
|
METHOD OF FABRICATING SOI nMOSFET AND THE STRUCTURE THEREOF
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|
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Patent #:
|
|
Issue Dt:
|
02/26/2008
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Application #:
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11697036
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Filing Dt:
|
04/05/2007
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Publication #:
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|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
ENHANCED SENSING IN A HIERARCHICAL MEMORY ARCHITECTURE
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11697102
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Filing Dt:
|
04/05/2007
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Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
Title:
|
SHALLOW TRENCH ISOLATION SELF-ALIGNED TO TEMPLATED RECRYSTALLIZATION BOUNDARY
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|
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Patent #:
|
|
Issue Dt:
|
09/28/2010
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Application #:
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11697782
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Filing Dt:
|
04/09/2007
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Publication #:
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Pub Dt:
|
10/09/2008
| | | | |
Title:
|
CONSTRAINT PROGRAMMING FOR REDUCTION OF SYSTEM TEST-CONFIGURATION-MATRIX COMPLEXITY
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|
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Patent #:
|
|
Issue Dt:
|
10/27/2009
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Application #:
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11697798
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Filing Dt:
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04/09/2007
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Publication #:
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|
Pub Dt:
|
08/23/2007
| | | | |
Title:
|
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RESTRICTIONS
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|
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Patent #:
|
|
Issue Dt:
|
01/25/2011
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Application #:
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11698182
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Filing Dt:
|
01/25/2007
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Publication #:
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|
Pub Dt:
|
07/31/2008
| | | | |
Title:
|
BLEACHABLE MATERIALS FOR LITHOGRAPHY
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|
|
Patent #:
|
|
Issue Dt:
|
10/13/2009
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Application #:
|
11701377
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Filing Dt:
|
02/02/2007
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Publication #:
|
|
Pub Dt:
|
06/14/2007
| | | | |
Title:
|
METHOD AND STRUCTURE FOR STRAINED FINFET DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
01/29/2008
|
Application #:
|
11707060
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Filing Dt:
|
02/16/2007
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Publication #:
|
|
Pub Dt:
|
09/06/2007
| | | | |
Title:
|
INTRALEVEL DECOUPLING CAPACITOR, METHOD OF MANUFACTURE AND TESTING CIRCUIT OF THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
02/10/2009
|
Application #:
|
11715751
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Filing Dt:
|
03/08/2007
|
Publication #:
|
|
Pub Dt:
|
07/19/2007
| | | | |
Title:
|
PROCESS FOR FORMING A BURIED PLATE
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|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11718279
|
Filing Dt:
|
04/30/2007
|
Publication #:
|
|
Pub Dt:
|
12/27/2007
| | | | |
Title:
|
METALIZED ELASTOMERIC ELECTRICAL CONTACTS
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11718279
|
Filing Dt:
|
04/30/2007
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Publication #:
|
|
Pub Dt:
|
12/27/2007
| | |
PCT #:
|
US2005035324
|
Title:
|
METALIZED ELASTOMERIC ELECTRICAL CONTACTS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/08/2011
|
Application #:
|
11718283
|
Filing Dt:
|
04/30/2007
|
Publication #:
|
|
Pub Dt:
|
04/24/2008
| | | | |
Title:
|
METALIZED ELASTOMERIC PROBE STRUCTURE
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
11/08/2011
|
Application #:
|
11718283
|
Filing Dt:
|
04/30/2007
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Publication #:
|
|
Pub Dt:
|
04/24/2008
| | |
PCT #:
|
US2005035322
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Title:
|
METALIZED ELASTOMERIC PROBE STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/12/2010
|
Application #:
|
11733058
|
Filing Dt:
|
04/09/2007
|
Publication #:
|
|
Pub Dt:
|
10/09/2008
| | | | |
Title:
|
REPRESENTING AND PROPAGATING A VARIATIONAL VOLTAGE WAVEFORM IN STATISTICAL STATIC TIMING ANALYSIS OF DIGITAL CIRCUITS
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|
|
Patent #:
|
|
Issue Dt:
|
09/02/2008
|
Application #:
|
11733406
|
Filing Dt:
|
04/10/2007
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Title:
|
COUPLING ELEMENT ALIGNMENT USING WAVEGUIDE FIDUCIALS
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|
|
Patent #:
|
|
Issue Dt:
|
08/25/2009
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Application #:
|
11733523
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Filing Dt:
|
04/10/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
FOUR-TERMINAL PROGRAMMABLE VIA-CONTAINING STRUCTURE AND METHOD OF FABRICATING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2009
|
Application #:
|
11734059
|
Filing Dt:
|
04/11/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
MAINTAIN OWNING APPLICATION INFORMATION OF DATA FOR A DATA STORAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/2009
|
Application #:
|
11734097
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Filing Dt:
|
04/11/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
MAINTAIN OWNING APPLICATION INFORMATION OF DATA FOR A DATA STORAGE SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
03/29/2016
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Application #:
|
11734634
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Filing Dt:
|
04/12/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
DEVICE SELECT SYSTEM FOR MULTI-DEVICE ELECTRONIC SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
02/05/2013
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Application #:
|
11734786
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Filing Dt:
|
04/12/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
ERROR CHECKING ADDRESSABLE BLOCKS IN STORAGE
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11734838
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Filing Dt:
|
04/13/2007
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Publication #:
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|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
Method and Apparatus for Reducing Jitter in Multi-Gigahertz Systems
|
|
|
Patent #:
|
|
Issue Dt:
|
05/18/2010
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Application #:
|
11734888
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Filing Dt:
|
04/13/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
FORMING SILICIDED GATE AND CONTACTS FROM POLYSILICON GERMANIUM AND STRUCTURE FORMED
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/2010
|
Application #:
|
11734958
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Filing Dt:
|
04/13/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
METAL CAP FOR INTERCONNECT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2008
|
Application #:
|
11735075
|
Filing Dt:
|
04/13/2007
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
METHODS FOR FORMING A WRAP-AROUND GATE FIELD EFFECT TRANSISTOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/23/2012
|
Application #:
|
11735152
|
Filing Dt:
|
04/13/2007
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Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
SOFTWARE FACTORY READINESS REVIEW
|
|
|
Patent #:
|
|
Issue Dt:
|
02/15/2011
|
Application #:
|
11735155
|
Filing Dt:
|
04/13/2007
|
Publication #:
|
|
Pub Dt:
|
09/13/2007
| | | | |
Title:
|
ELECTRONIC MODULE COMPRISING MEMORY AND INTEGRATED CIRCUIT PROCESSOR CHIPS FORMED ON A MICROCHANNEL COOLING DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
10/02/2012
|
Application #:
|
11735510
|
Filing Dt:
|
04/16/2007
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
AUTOMATIC GENERATION OF TEST SUITE FOR PROCESSOR ARCHITECTURE COMPLIANCE
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11735652
|
Filing Dt:
|
04/16/2007
|
Publication #:
|
|
Pub Dt:
|
10/16/2008
| | | | |
Title:
|
E FUSE CIRCUIT WITH TRANSISTOR THRESHOLD VOLTAGE SHIFTING UNDER FATIGUING CONDITIONS AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
11/18/2008
|
Application #:
|
11735711
|
Filing Dt:
|
04/16/2007
|
Publication #:
|
|
Pub Dt:
|
10/18/2007
| | | | |
Title:
|
ULTRA SCALABLE HIGH SPEED HETEROJUNCTION VERTICAL N-CHANNEL MISFETS AND METHODS THEREOF
|
|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
11735988
|
Filing Dt:
|
04/16/2007
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
Integrated Circuit Chip Utilizing Dielectric Layer Having Oriented Cylindrical Voids Formed from Carbon Nanotubes
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2015
|
Application #:
|
11736188
|
Filing Dt:
|
04/17/2007
|
Publication #:
|
|
Pub Dt:
|
10/23/2008
| | | | |
Title:
|
OHT ACCESSIBLE HIGH DENSITY STOCKER AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
02/19/2013
|
Application #:
|
11736599
|
Filing Dt:
|
04/18/2007
|
Publication #:
|
|
Pub Dt:
|
08/09/2007
| | | | |
Title:
|
SCHOTTKY BARRIER DIODE AND METHOD OF FORMING A SCHOTTKY BARRIER DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/09/2008
|
Application #:
|
11736600
|
Filing Dt:
|
04/18/2007
|
Publication #:
|
|
Pub Dt:
|
12/13/2007
| | | | |
Title:
|
INCREASE PRODUCTIVITY AT WAFER TEST USING PROBE RETEST DATA ANALYSIS
|
|