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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036550/0001   Pages: 983
Recorded: 09/03/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
05/28/2013
Application #:
12719058
Filing Dt:
03/08/2010
Publication #:
Pub Dt:
09/08/2011
Title:
GRAPHENE BASED THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE
2
Patent #:
Issue Dt:
04/16/2013
Application #:
12719059
Filing Dt:
03/08/2010
Publication #:
Pub Dt:
06/24/2010
Title:
Structure and Methodology for Fabrication and Inspection of Photomasks By A Single Design System
3
Patent #:
Issue Dt:
07/09/2013
Application #:
12719289
Filing Dt:
03/08/2010
Publication #:
Pub Dt:
09/08/2011
Title:
POLYSILICON RESISTOR AND E-FUSE FOR INTEGRATION WITH METAL GATE AND HIGH-K DIELECTRIC
4
Patent #:
NONE
Issue Dt:
Application #:
12719312
Filing Dt:
03/08/2010
Publication #:
Pub Dt:
09/08/2011
Title:
PRE-GATE, SOURCE/DRAIN STRAIN LAYER FORMATION
5
Patent #:
Issue Dt:
05/28/2013
Application #:
12719934
Filing Dt:
03/09/2010
Publication #:
Pub Dt:
09/15/2011
Title:
MOSFETS WITH REDUCED CONTACT RESISTANCE
6
Patent #:
Issue Dt:
12/20/2011
Application #:
12719962
Filing Dt:
03/09/2010
Publication #:
Pub Dt:
09/15/2011
Title:
FET RADIATION MONITOR
7
Patent #:
Issue Dt:
07/03/2012
Application #:
12720354
Filing Dt:
03/09/2010
Publication #:
Pub Dt:
07/01/2010
Title:
TECHNIQUES FOR ENABLING MULTIPLE VT DEVICES USING HIGH-K METAL GATE STACKS
8
Patent #:
Issue Dt:
02/04/2014
Application #:
12721032
Filing Dt:
03/10/2010
Publication #:
Pub Dt:
09/15/2011
Title:
METHODS FOR FABRICATION OF AN AIR GAP-CONTAINING INTERCONNECT STRUCTURE
9
Patent #:
Issue Dt:
02/18/2014
Application #:
12721227
Filing Dt:
03/10/2010
Publication #:
Pub Dt:
09/15/2011
Title:
Modeling Loading Effects of a Transistor Network
10
Patent #:
Issue Dt:
11/27/2012
Application #:
12721608
Filing Dt:
03/11/2010
Publication #:
Pub Dt:
09/15/2011
Title:
HIGH-K DIELECTRIC GATE STRUCTURES RESISTANT TO OXIDE GROWTH AT THE DIELECTRIC/SILICON SUBSTRATE INTERFACE AND METHODS OF MANUFACTURE THEREOF
11
Patent #:
Issue Dt:
07/09/2013
Application #:
12721727
Filing Dt:
03/11/2010
Publication #:
Pub Dt:
09/15/2011
Title:
DOPING OF SEMICONDUCTOR SUBSTRATE THROUGH CARBONLESS PHOSPHOROUS-CONTAINING LAYER
12
Patent #:
Issue Dt:
01/08/2013
Application #:
12723130
Filing Dt:
03/12/2010
Publication #:
Pub Dt:
09/15/2011
Title:
INTEGRATED FRAMEWORK FOR FINITE-ELEMENT METHODS FOR PACKAGE, DEVICE AND CIRCUIT CO-DESIGN
13
Patent #:
Issue Dt:
07/12/2011
Application #:
12723189
Filing Dt:
03/12/2010
Title:
SOFT ERROR DETECTION FOR LATCHES
14
Patent #:
Issue Dt:
03/12/2013
Application #:
12723743
Filing Dt:
03/15/2010
Publication #:
Pub Dt:
09/15/2011
Title:
MANAGING MEMORY REFRESHES
15
Patent #:
Issue Dt:
12/10/2013
Application #:
12723842
Filing Dt:
03/15/2010
Publication #:
Pub Dt:
09/15/2011
Title:
NANOPORE BASED DEVICE FOR CUTTING LONG DNA MOLECULES INTO FRAGMENTS
16
Patent #:
Issue Dt:
05/28/2013
Application #:
12725287
Filing Dt:
03/16/2010
Publication #:
Pub Dt:
09/22/2011
Title:
WAVEFRONT ENGINEERING OF MASK DATA FOR SEMICONDUCTOR DEVICE DESIGN
17
Patent #:
Issue Dt:
10/11/2011
Application #:
12725792
Filing Dt:
03/17/2010
Publication #:
Pub Dt:
07/08/2010
Title:
SEMICONDUCTOR DEVICES
18
Patent #:
Issue Dt:
10/16/2012
Application #:
12725822
Filing Dt:
03/17/2010
Publication #:
Pub Dt:
09/22/2011
Title:
VOLTAGE REGULATOR BYPASS IN MEMORY DEVICE
19
Patent #:
Issue Dt:
06/11/2013
Application #:
12726413
Filing Dt:
03/18/2010
Publication #:
Pub Dt:
07/22/2010
Title:
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RESTRICTIONS
20
Patent #:
Issue Dt:
05/01/2012
Application #:
12726736
Filing Dt:
03/18/2010
Publication #:
Pub Dt:
09/22/2011
Title:
METHOD FOR FORMING AN SOI SCHOTTKY SOURCE/DRAIN DEVICE TO CONTROL ENCROACHMENT AND DELAMINATION OF SILICIDE
21
Patent #:
Issue Dt:
08/23/2011
Application #:
12727024
Filing Dt:
03/18/2010
Title:
SMALL-AREA DIGITAL TO ANALOG CONVERTER BASED ON MASTER-SLAVE CONFIGURATION
22
Patent #:
Issue Dt:
03/03/2015
Application #:
12727312
Filing Dt:
03/19/2010
Publication #:
Pub Dt:
09/23/2010
Title:
High Threshold Voltage NMOS Transistors For Low Power IC Technology
23
Patent #:
Issue Dt:
02/11/2014
Application #:
12727710
Filing Dt:
03/19/2010
Publication #:
Pub Dt:
09/22/2011
Title:
GLASSY CARBON NANOSTRUCTURES
24
Patent #:
Issue Dt:
11/07/2017
Application #:
12727746
Filing Dt:
03/19/2010
Publication #:
Pub Dt:
09/22/2011
Title:
BACKEND OF LINE (BEOL) COMPATIBLE HIGH CURRENT DENSITY ACCESS DEVICE FOR HIGH DENSITY ARRAYS OF ELECTRONIC COMPONENTS
25
Patent #:
Issue Dt:
06/07/2011
Application #:
12727753
Filing Dt:
03/19/2010
Publication #:
Pub Dt:
07/08/2010
Title:
METHOD AND APPARATUS FOR FABRICATING A CARBON NANOTUBE TRANSISTOR
26
Patent #:
Issue Dt:
01/29/2013
Application #:
12729856
Filing Dt:
03/23/2010
Publication #:
Pub Dt:
09/29/2011
Title:
HIGH DENSITY MEMORY DEVICE
27
Patent #:
Issue Dt:
11/19/2013
Application #:
12730403
Filing Dt:
03/24/2010
Publication #:
Pub Dt:
09/29/2011
Title:
BACKSIDE DUMMY PLUGS FOR 3D INTEGRATION
28
Patent #:
Issue Dt:
03/19/2013
Application #:
12731241
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
P-FET WITH A STRAINED NANOWIRE CHANNEL AND EMBEDDED SIGE SOURCE AND DRAIN STRESSORS
29
Patent #:
Issue Dt:
05/21/2013
Application #:
12731369
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
07/15/2010
Title:
New Flux Composition and Process For Use Thereof
30
Patent #:
Issue Dt:
01/22/2013
Application #:
12731469
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
TEST PAD STRUCTURE FOR REUSE OF INTERCONNECT LEVEL MASKS
31
Patent #:
Issue Dt:
10/30/2012
Application #:
12731481
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
SEMICONDUCTOR DEVICES WITH VERTICAL EXTENSIONS FOR LATERAL SCALING
32
Patent #:
Issue Dt:
02/14/2012
Application #:
12731487
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
METHOD OF FORMING A MULTI-CHIP STACKED STRUCTURE INCLUDING A THIN INTERPOSER CHIP HAVING A FACE-TO-BACK BONDING WITH ANOTHER CHIP
33
Patent #:
Issue Dt:
11/08/2011
Application #:
12731802
Filing Dt:
03/25/2010
Publication #:
Pub Dt:
09/29/2011
Title:
DIE LEVEL INTEGRATED INTERCONNECT DECAL MANUFACTURING METHOD AND APPARATUS
34
Patent #:
Issue Dt:
10/18/2011
Application #:
12732560
Filing Dt:
03/26/2010
Publication #:
Pub Dt:
07/15/2010
Title:
METHOD OF FABRICATING HETERO-JUNCTION BIPOLAR TRANSISTOR (HBT)
35
Patent #:
Issue Dt:
09/18/2012
Application #:
12748513
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
09/29/2011
Title:
EMF CORRECTION MODEL CALIBRATION USING ASYMMETRY FACTOR DATA OBTAINED FROM AERIAL IMAGES OR A PATTERNED LAYER
36
Patent #:
NONE
Issue Dt:
Application #:
12748542
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
09/29/2011
Title:
SEMICONDUCTOR STRUCTURE HAVING AT LEAST ONE INTERFACIAL DIELECTRIC LAYER HAVING A SHORT-RANGE CRYSTALLOGRAPHIC BONDING STRUCTURE FORMED ON UPPER SURFACE OF A CARBON-BASED MATERIAL.
37
Patent #:
NONE
Issue Dt:
Application #:
12748761
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
09/29/2011
Title:
Design Structure For Dense Layout of Semiconductor Devices
38
Patent #:
NONE
Issue Dt:
Application #:
12748847
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
07/15/2010
Title:
CONFINEMENT OF FLUIDS ON SURFACES
39
Patent #:
NONE
Issue Dt:
Application #:
12749213
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
01/06/2011
Title:
RECOVERY OF HYDROPHOBICITY OF LOW-K AND ULTRA LOW-K ORGANOSILICATE FILMS USED AS INTER METAL DIELECTRICS
40
Patent #:
Issue Dt:
03/27/2012
Application #:
12749264
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
09/29/2011
Title:
METHODS AND SYSTEMS FOR TROUBLESHOOTING REMOTE SYSTEMS THROUGH RECREATION OF REMOTE SYSTEM SCENARIOS
41
Patent #:
Issue Dt:
10/11/2011
Application #:
12749303
Filing Dt:
03/29/2010
Publication #:
Pub Dt:
07/22/2010
Title:
METHOD AND APPROACH TO HOSTING VERSIONED WEB SERVICES
42
Patent #:
Issue Dt:
05/06/2014
Application #:
12750342
Filing Dt:
03/30/2010
Publication #:
Pub Dt:
10/06/2011
Title:
STRUCTURE FOR SELF-ALIGNED SILICIDE CONTACTS TO AN UPSIDE-DOWN FET BY EPITAXIAL SOURCE AND DRAIN
43
Patent #:
Issue Dt:
06/11/2013
Application #:
12751197
Filing Dt:
03/31/2010
Publication #:
Pub Dt:
10/06/2011
Title:
CONSTRAINED CODING TO REDUCE FLOATING GATE COUPLING IN NON-VOLATILE MEMORIES
44
Patent #:
Issue Dt:
07/24/2012
Application #:
12751302
Filing Dt:
03/31/2010
Publication #:
Pub Dt:
07/29/2010
Title:
LOW COST FABRICATION OF DOUBLE BOX BACK GATE SILICON-ON-INSULATOR WAFERS WITH BUILT-IN SHALLOW TRENCH ISOLATION IN BACK GATE LAYER
45
Patent #:
Issue Dt:
06/19/2012
Application #:
12752369
Filing Dt:
04/01/2010
Publication #:
Pub Dt:
10/06/2011
Title:
AIR GAPS IN A MULTILAYER INTEGRATED CIRCUIT AND METHOD OF MAKING SAME
46
Patent #:
Issue Dt:
07/01/2014
Application #:
12752554
Filing Dt:
04/01/2010
Publication #:
Pub Dt:
10/06/2011
Title:
COPLANAR WAVEGUIDE STRUCTURES WITH ALTERNATING WIDE AND NARROW PORTIONS, METHOD OF MANUFACTURE AND DESIGN STRUCTURE
47
Patent #:
NONE
Issue Dt:
Application #:
12752628
Filing Dt:
04/01/2010
Publication #:
Pub Dt:
07/29/2010
Title:
SELECTIVE NITRIDATION OF GATE OXIDES
48
Patent #:
Issue Dt:
03/05/2013
Application #:
12753270
Filing Dt:
04/02/2010
Publication #:
Pub Dt:
10/06/2011
Title:
CONTROLLING FERROELECTRICITY IN DIELECTRIC FILMS BY PROCESS INDUCED UNIAXIAL STRAIN
49
Patent #:
NONE
Issue Dt:
Application #:
12753983
Filing Dt:
04/05/2010
Publication #:
Pub Dt:
10/06/2011
Title:
ULTRA LOW DIELECTRIC CONSTANT MATERIAL WITH ENHANCED MECHANICAL PROPERTIES
50
Patent #:
NONE
Issue Dt:
Application #:
12754079
Filing Dt:
04/05/2010
Publication #:
Pub Dt:
10/06/2011
Title:
Schottky Junction Source/Drain FET Fabrication Using Sulfur or Flourine Co-Implantation
51
Patent #:
NONE
Issue Dt:
Application #:
12754108
Filing Dt:
04/05/2010
Publication #:
Pub Dt:
10/06/2011
Title:
SIGNAL SHIELDING THROUGH-SUBSTRATE VIAS FOR 3D INTEGRATION
52
Patent #:
Issue Dt:
10/30/2012
Application #:
12754250
Filing Dt:
04/05/2010
Publication #:
Pub Dt:
07/29/2010
Title:
HIGH PERFORMANCE MOSFET
53
Patent #:
NONE
Issue Dt:
Application #:
12754881
Filing Dt:
04/06/2010
Publication #:
Pub Dt:
10/06/2011
Title:
FET with FUSI Gate and Reduced Source/Drain Contact Resistance
54
Patent #:
Issue Dt:
05/07/2013
Application #:
12754917
Filing Dt:
04/06/2010
Publication #:
Pub Dt:
10/06/2011
Title:
FIELD EFFECT TRANSISTOR DEVICE AND FABRICATION
55
Patent #:
NONE
Issue Dt:
Application #:
12754939
Filing Dt:
04/06/2010
Publication #:
Pub Dt:
07/29/2010
Title:
METHOD TO INCREASE STRAIN ENHANCEMENT WITH SPACERLESS FET AND DUAL LINER PROCESS
56
Patent #:
NONE
Issue Dt:
Application #:
12755720
Filing Dt:
04/07/2010
Publication #:
Pub Dt:
10/13/2011
Title:
Schottky FET With All Metal Gate
57
Patent #:
Issue Dt:
05/21/2013
Application #:
12755752
Filing Dt:
04/07/2010
Publication #:
Pub Dt:
10/13/2011
Title:
SELF-ALIGNED CONTACTS
58
Patent #:
Issue Dt:
04/09/2013
Application #:
12756284
Filing Dt:
04/08/2010
Publication #:
Pub Dt:
10/13/2011
Title:
CHIP IDENTIFICATION FOR ORGANIC LAMINATE PACKAGING AND METHODS OF MANUFACTURE
59
Patent #:
Issue Dt:
01/17/2012
Application #:
12756733
Filing Dt:
04/08/2010
Publication #:
Pub Dt:
10/14/2010
Title:
METHOD AND SYSTEM FOR REAL-TIME ESTIMATION AND PREDICTION OF THE THERMAL STATE OF A MICROPROCESSOR UNIT
60
Patent #:
Issue Dt:
08/07/2012
Application #:
12756781
Filing Dt:
04/08/2010
Publication #:
Pub Dt:
10/28/2010
Title:
METHOD AND SYSTEM FOR REAL-TIME ESTIMATION AND PREDICTION OF THE THERMAL STATE OF A MICROPROCESSOR UNIT
61
Patent #:
Issue Dt:
02/05/2013
Application #:
12757201
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
10/13/2011
Title:
SELF-ALIGNED CONTACTS FOR FIELD EFFECT TRANSISTOR DEVICES
62
Patent #:
Issue Dt:
01/08/2013
Application #:
12757323
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
10/13/2011
Title:
METHOD AND STRUCTURE FOR WORK FUNCTION ENGINEERING IN TRANSISTORS INCLUDING A HIGH DIELECTRIC CONSTANT GATE INSULATOR AND METAL GATE (HKMG)
63
Patent #:
Issue Dt:
10/15/2013
Application #:
12757433
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
10/13/2011
Title:
NANOPORE CAPTURE SYSTEM
64
Patent #:
Issue Dt:
08/09/2011
Application #:
12757567
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
08/05/2010
Title:
MULTIPLE CRYSTALLOGRAPHIC ORIENTATION SEMICONDUCTOR STRUCTURES
65
Patent #:
Issue Dt:
08/02/2011
Application #:
12757648
Filing Dt:
04/09/2010
Publication #:
Pub Dt:
08/05/2010
Title:
METHOD OF OPERATING A MEMORY CIRCUIT USING MEMORY CELLS WITH INDEPENDENT-GATE CONTROLLED ACCESS DEVICES
66
Patent #:
NONE
Issue Dt:
Application #:
12758431
Filing Dt:
04/12/2010
Publication #:
Pub Dt:
08/05/2010
Title:
STRUCTURES AND METHODS FOR LOW-K OR ULTRA LOW-K INTERLAYER DIELECTRIC PATTERN TRANSFER
67
Patent #:
Issue Dt:
12/04/2012
Application #:
12758939
Filing Dt:
04/13/2010
Publication #:
Pub Dt:
10/13/2011
Title:
NANOWIRE CIRCUITS IN MATCHED DEVICES
68
Patent #:
Issue Dt:
01/04/2011
Application #:
12759015
Filing Dt:
04/13/2010
Publication #:
Pub Dt:
08/05/2010
Title:
CIRCUIT AND DESIGN STRUCTURE FOR SYNCHRONIZING MULTIPLE DIGITAL SIGNALS
69
Patent #:
Issue Dt:
07/12/2011
Application #:
12759479
Filing Dt:
04/13/2010
Publication #:
Pub Dt:
08/05/2010
Title:
PHASE CHANGE MEMORY WITH DUAL WORD LINES AND SOURCE LINES AND METHOD OF OPERATING SAME
70
Patent #:
NONE
Issue Dt:
Application #:
12760101
Filing Dt:
04/14/2010
Publication #:
Pub Dt:
10/20/2011
Title:
ANALYTICS FOR SETTING UP STRATEGIC INVENTORY SYSTEMS TO HANDLE SMALL LOT ORDERS IN THE STEEL INDUSTRY
71
Patent #:
Issue Dt:
12/25/2012
Application #:
12760250
Filing Dt:
04/14/2010
Publication #:
Pub Dt:
10/20/2011
Title:
RAISED SOURCE/DRAIN STRUCTURE FOR ENHANCED STRAIN COUPLING FROM STRESS LINER
72
Patent #:
Issue Dt:
11/27/2012
Application #:
12760287
Filing Dt:
04/14/2010
Publication #:
Pub Dt:
10/20/2011
Title:
TUNNEL FIELD EFFECT TRANSISTOR
73
Patent #:
Issue Dt:
08/21/2012
Application #:
12760368
Filing Dt:
04/14/2010
Publication #:
Pub Dt:
12/16/2010
Title:
OPTICAL WAVELENGTH SWITCH
74
Patent #:
NONE
Issue Dt:
Application #:
12760620
Filing Dt:
04/15/2010
Publication #:
Pub Dt:
10/20/2011
Title:
LOW-TEMPERATURE ABSORBER FILM AND METHOD OF FABRICATION
75
Patent #:
Issue Dt:
05/03/2016
Application #:
12760688
Filing Dt:
04/15/2010
Publication #:
Pub Dt:
10/20/2011
Title:
METHOD FOR IMPROVING DEVICE PERFORMANCE USING EPITAXIALLY GROWN SILICON CARBON (SiC) OR SILICON-GERMANIUM (SiGe)
76
Patent #:
Issue Dt:
09/03/2013
Application #:
12761394
Filing Dt:
04/16/2010
Publication #:
Pub Dt:
10/20/2011
Title:
HEAD COMPRISING A CRYSTALLINE ALUMINA LAYER
77
Patent #:
Issue Dt:
06/25/2013
Application #:
12761780
Filing Dt:
04/16/2010
Publication #:
Pub Dt:
10/20/2011
Title:
PROGRAMMABLE ANTI-FUSE STRUCTURES WITH CONDUCTIVE MATERIAL ISLANDS
78
Patent #:
NONE
Issue Dt:
Application #:
12761872
Filing Dt:
04/16/2010
Publication #:
Pub Dt:
08/12/2010
Title:
MULTI-LEVEL POWER SUPPLY SYSTEM FOR A COMPLEMENTARY METAL OXIDE SEMICONDUCTOR
79
Patent #:
Issue Dt:
01/18/2011
Application #:
12762404
Filing Dt:
04/19/2010
Publication #:
Pub Dt:
08/12/2010
Title:
SEMICONDUCTOR CHIPS WITH REDUCED STRESS FROM UNDERFILL AT EDGE OF CHIP
80
Patent #:
Issue Dt:
06/21/2011
Application #:
12762427
Filing Dt:
04/19/2010
Publication #:
Pub Dt:
08/12/2010
Title:
FINFET TRANSISTOR AND CIRCUIT
81
Patent #:
Issue Dt:
08/14/2012
Application #:
12762832
Filing Dt:
04/19/2010
Publication #:
Pub Dt:
10/20/2011
Title:
SOURCE/DRAIN TECHNOLOGY FOR THE CARBON NANO-TUBE/GRAPHENE CMOS WITH A SINGLE SELF-ALIGNED METAL SILICIDE PROCESS
82
Patent #:
Issue Dt:
10/16/2012
Application #:
12763284
Filing Dt:
04/20/2010
Publication #:
Pub Dt:
10/20/2011
Title:
INTEGRATED CIRCUIT WITH REPLACEMENT METAL GATES AND DUAL DIELECTRICS
83
Patent #:
Issue Dt:
01/10/2012
Application #:
12763596
Filing Dt:
04/20/2010
Publication #:
Pub Dt:
08/12/2010
Title:
LOCK AND KEY THROUGH-VIA METHOD FOR WAFER LEVEL 3D INTEGRATION AND STRUCTURES PRODUCED
84
Patent #:
Issue Dt:
10/30/2012
Application #:
12764244
Filing Dt:
04/21/2010
Publication #:
Pub Dt:
10/27/2011
Title:
SHIELDING FOR HIGH-VOLTAGE SEMICONDUCTOR-ON-INSULATOR DEVICES
85
Patent #:
Issue Dt:
08/07/2012
Application #:
12764329
Filing Dt:
04/21/2010
Publication #:
Pub Dt:
10/27/2011
Title:
MONOLAYER DOPANT EMBEDDED STRESSOR FOR ADVANCED CMOS
86
Patent #:
Issue Dt:
02/18/2014
Application #:
12764762
Filing Dt:
04/21/2010
Publication #:
Pub Dt:
10/27/2011
Title:
HIGH PERFORMANCE NON-PLANAR SEMICONDUCTOR DEVICES WITH METAL FILLED INTER-FIN GAPS
87
Patent #:
Issue Dt:
08/20/2013
Application #:
12765275
Filing Dt:
04/22/2010
Publication #:
Pub Dt:
11/11/2010
Title:
ELECTRICAL FUSES AND RESISTORS HAVING SUBLITHOGRAPHIC DIMENSIONS
88
Patent #:
Issue Dt:
05/15/2012
Application #:
12765950
Filing Dt:
04/23/2010
Publication #:
Pub Dt:
08/12/2010
Title:
SEMICONDUCTOR DIODE STRUCTURE OPERATION METHOD
89
Patent #:
Issue Dt:
05/10/2011
Application #:
12765979
Filing Dt:
04/23/2010
Publication #:
Pub Dt:
08/12/2010
Title:
GAP CAPACITORS FOR MONITORING STRESS IN SOLDER BALLS IN FLIP CHIP TECHNOLOGY
90
Patent #:
Issue Dt:
03/20/2012
Application #:
12766342
Filing Dt:
04/23/2010
Publication #:
Pub Dt:
08/12/2010
Title:
ON-CHIP HEATER AND METHODS FOR FABRICATION THEREOF AND USE THEREOF
91
Patent #:
Issue Dt:
04/09/2013
Application #:
12766468
Filing Dt:
04/23/2010
Publication #:
Pub Dt:
10/27/2011
Title:
USE OF EPITAXIAL NI SILICIDE
92
Patent #:
Issue Dt:
09/11/2012
Application #:
12766859
Filing Dt:
04/24/2010
Publication #:
Pub Dt:
10/27/2011
Title:
THIN BODY SEMICONDUCTOR DEVICES
93
Patent #:
Issue Dt:
10/30/2012
Application #:
12767068
Filing Dt:
04/26/2010
Publication #:
Pub Dt:
11/04/2010
Title:
METHOD AND APPARATUS FOR DETECTING CONTRADICTORY TIMING CONSTRAINT CONFLICTS
94
Patent #:
Issue Dt:
06/14/2011
Application #:
12767261
Filing Dt:
04/26/2010
Publication #:
Pub Dt:
08/12/2010
Title:
AMORPHIZATION/TEMPLATED RECRYSTALLIZATION METHOD FOR HYBRID ORIENTATION SUBSTRATES
95
Patent #:
Issue Dt:
10/23/2012
Application #:
12767375
Filing Dt:
04/26/2010
Publication #:
Pub Dt:
10/27/2011
Title:
HANDLING TWO-DIMENSIONAL CONSTRAINTS IN INTEGRATED CIRCUIT LAYOUT
96
Patent #:
Issue Dt:
05/21/2013
Application #:
12768031
Filing Dt:
04/27/2010
Publication #:
Pub Dt:
10/27/2011
Title:
EFFICIENTLY APPLYING A SINGLE TIMING ASSERTION TO MULTIPLE TIMING POINTS IN A CIRCUIT USING CREATING A DEFFINITION
97
Patent #:
Issue Dt:
11/25/2014
Application #:
12768267
Filing Dt:
04/27/2010
Publication #:
Pub Dt:
10/27/2011
Title:
STRUCTURES AND METHODS FOR AIR GAP INTEGRATION
98
Patent #:
Issue Dt:
10/16/2012
Application #:
12770254
Filing Dt:
04/29/2010
Publication #:
Pub Dt:
11/03/2011
Title:
MICROELECTRONIC STRUCTURE INCLUDING AIR GAP
99
Patent #:
Issue Dt:
08/21/2012
Application #:
12770420
Filing Dt:
04/29/2010
Publication #:
Pub Dt:
11/03/2011
Title:
CLOCK ALIAS FOR TIMING ANALYSIS OF AN INTEGRATED CIRCUIT DESIGN
100
Patent #:
Issue Dt:
03/05/2013
Application #:
12770791
Filing Dt:
04/30/2010
Publication #:
Pub Dt:
11/03/2011
Title:
DECOMPOSITION WITH MULTIPLE EXPOSURES IN A PROCESS WINDOW BASED OPC FLOW USING TOLERANCE BANDS
Assignor
1
Exec Dt:
06/29/2015
Assignee
1
2070 ROUTE 52
HOPEWELL JUNCTION, NEW YORK 12533
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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