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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09439544
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Filing Dt:
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11/12/1999
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Title:
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UNIVERSAL RESOURCE ACCESS CONTROLLER
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09481769
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Filing Dt:
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01/11/2000
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Title:
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UNIFORM RECESS DEPTH OF RECESSED RESIST LAYERS IN TRENCH STRUCTURE
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09481770
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Filing Dt:
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01/11/2000
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Title:
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METHOD FOR DETECTING AND CLASSIFYING SCRATCHES OCCURING DURING WAFER SEMICONDUCTOR PROCESSING
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09491408
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Filing Dt:
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01/26/2000
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Title:
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TECHNIQUES FOR IMPROVING MEMORY ACCESS IN A VIRTUAL MEMORY SYSTEM
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Patent #:
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Issue Dt:
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09/11/2001
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Application #:
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09504409
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Filing Dt:
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02/15/2000
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Title:
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Method for probing semiconductor devices for active measuring of electrical characteristics
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Patent #:
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Issue Dt:
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02/06/2001
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Application #:
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09506892
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Filing Dt:
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02/18/2000
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Title:
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Dry process for cleaning residues/polymers after metal etch
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Patent #:
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Issue Dt:
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10/29/2002
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Application #:
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09520549
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Filing Dt:
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03/08/2000
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Title:
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ADDRESS DECODING SYSTEM AND METHOD FOR FAILURE TOLERATION IN A MEMORY BANK
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Patent #:
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Issue Dt:
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07/31/2001
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Application #:
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09533526
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Filing Dt:
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03/23/2000
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Title:
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Method and apparatus for a flexible controller including an improved output arrangement for a dram generator system
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09534102
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Filing Dt:
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03/23/2000
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Title:
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METHOD AND APPARATUS FOR AN ESSAY IDENTIFICATION OF A STATE OF A DRAM GENERATOR CONTROLLER
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Patent #:
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Issue Dt:
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10/31/2000
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Application #:
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09534103
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Filing Dt:
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03/23/2000
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Title:
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Method and apparatus for an improved reset and power-on arrangement for a dram generator controller
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Patent #:
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Issue Dt:
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01/30/2001
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Application #:
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09534104
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Filing Dt:
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03/23/2000
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Title:
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Method and apparatus for a flexible controller for a dram generator system
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Patent #:
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Issue Dt:
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04/08/2003
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Application #:
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09552635
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Filing Dt:
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04/19/2000
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Title:
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DYNAMIC RANDOM ACCESS MEMORY
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09553708
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Filing Dt:
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04/20/2000
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Title:
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CONTROL OF OXIDE THICKNESS IN VERTICAL TRANSISTOR STRUCTURES
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Patent #:
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Issue Dt:
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05/27/2003
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Application #:
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09562700
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Filing Dt:
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04/28/2000
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Title:
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SEMICONDUCTOR DEVICE FABRICATION USING A PHOTOMASK DESIGNED USING MODELING AND EMPIRICAL TESTING
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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09569220
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Filing Dt:
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05/11/2000
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Title:
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METAL CHEMICAL POLISHING PROCESS FOR MINIMIZING DISHING DURING SEMICONDUCTOR WAFER FABRICATION
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09576465
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Filing Dt:
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05/23/2000
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Title:
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METHOD OF FORMING A VERTICALLY ORIENTED DEVICE IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09595696
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Filing Dt:
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06/16/2000
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Title:
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Generator scheme and circuit for overcoming resistive voltage drop on power supply circuits on chips
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Patent #:
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Issue Dt:
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11/09/2004
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Application #:
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09596129
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Filing Dt:
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06/16/2000
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Title:
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SEMICONDUCTOR ARRANGEMENT
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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09596130
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Filing Dt:
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06/16/2000
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Title:
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SEMICONDUCTOR PACKAGE AND METHOD
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Patent #:
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Issue Dt:
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04/27/2004
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Application #:
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09597123
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Filing Dt:
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06/20/2000
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Title:
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ENHANCED OVERLAY MEASUREMENT MARKS FOR OVERLAY ALIGNMENT AND EXPOSURE TOOL CONDITION CONTROL
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Patent #:
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Issue Dt:
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01/01/2002
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Application #:
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09597389
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Filing Dt:
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06/19/2000
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Title:
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Integrated circuit vertical trench device and method of forming thereof
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09597441
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Filing Dt:
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06/20/2000
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Title:
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ELIMINATION/REDUCTION OF BLACK SILICON IN DT ETCH
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09598349
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Filing Dt:
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06/21/2000
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Title:
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Symmetric clock receiver for differential input signals
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09598350
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Filing Dt:
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06/21/2000
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Title:
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DLL lock scheme with multiple phase detection
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09602717
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Filing Dt:
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06/26/2000
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Title:
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Photomask and method for increasing image aspect ratio while relaxing mask fabrication requirements
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Patent #:
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Issue Dt:
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08/13/2002
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Application #:
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09603592
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Filing Dt:
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06/26/2000
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Title:
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METHOD AND SYSTEM FOR SEMICONDUCTOR TESTING USING YIELD CORRELATION BETWEEN GLOBAL AND CLASS PARAMETERS
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Patent #:
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Issue Dt:
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04/06/2004
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Application #:
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09604220
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Filing Dt:
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06/27/2000
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Title:
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METHOD FOR HIGH SPEED TESTING WITH LOW SPEED SEMICONDUCTOR TEST EQUIPMENT
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Patent #:
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Issue Dt:
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05/07/2002
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Application #:
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09605571
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Filing Dt:
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06/28/2000
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Title:
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STRONGLY WATER-SOLUBLE PHOTOACID GENERATOR RESIST COMPOSITIONS
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Patent #:
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Issue Dt:
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06/04/2002
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Application #:
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09619075
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Filing Dt:
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07/17/2000
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Title:
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Automated bad socket masking in real-time for test handlers
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09636522
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Filing Dt:
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08/10/2000
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Title:
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METHOD FOR FABRICATING A MICROTECHNICAL STRUCTURE
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Patent #:
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Issue Dt:
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03/12/2002
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Application #:
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09638722
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Filing Dt:
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08/10/2000
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Title:
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Wiring through terminal via fuse
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09648939
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Filing Dt:
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08/28/2000
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Title:
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METHOD FOR GENERATING A SEQUENCE OF RANDOM NUMBER OF A 1/F- NOSE
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Patent #:
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Issue Dt:
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02/08/2005
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Application #:
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09659872
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Filing Dt:
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09/13/2000
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Title:
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LEVEL-SHIFTING CIRCUITRY HAVING "HIGH" OUTPUT IMPEDANCE DURING DISABLE MODE
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Patent #:
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Issue Dt:
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04/30/2002
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Application #:
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09659946
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Filing Dt:
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09/13/2000
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Title:
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Combined tracking of wll and vpp with low threshold voltage in dram array
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Patent #:
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Issue Dt:
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11/08/2005
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Application #:
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09660703
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Filing Dt:
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09/13/2000
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Title:
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METHOD AND APPARATUS FOR FAST AUTOMATED FAILURE CLASSIFICATION FOR SEMICONDUCTOR WAFERS
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Patent #:
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Issue Dt:
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04/16/2002
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Application #:
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09662691
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Filing Dt:
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09/14/2000
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Title:
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SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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09664825
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Filing Dt:
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09/19/2000
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Title:
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CONTROL OF SEPARATION BETWEEN TRANSFER GATE AND STORAGE NODE IN VERTICAL DRAM
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Patent #:
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Issue Dt:
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12/31/2002
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Application #:
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09664826
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Filing Dt:
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09/19/2000
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Title:
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LEVEL-SHIFTING CIRCUITRY HAVING "LOW" OUTPUT DURING DISABLE MODE
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09667053
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Filing Dt:
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09/21/2000
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Title:
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DUAL THICKNESS GATE OXIDE FABRICATION METHOD USING PLASMA SURFACE TREATMENT
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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09669585
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Filing Dt:
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09/26/2000
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Title:
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TRENCH CAPACITOR MEMORY CELL
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Patent #:
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Issue Dt:
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10/01/2002
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Application #:
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09671915
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Filing Dt:
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09/28/2000
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Title:
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LEVEL-SHIFTING CIRCUITRY HAVING "HIGH" OUTPUT DURING DISABLE MODE
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Patent #:
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Issue Dt:
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03/25/2003
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Application #:
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09675432
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Filing Dt:
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09/29/2000
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Title:
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INTEGRATED CIRCUIT COMPRISING A SELF ALIGNED TRENCH, AND METHOD OF FORMING THEREOF
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Patent #:
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Issue Dt:
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07/30/2002
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Application #:
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09691953
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Filing Dt:
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10/19/2000
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Title:
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AREA EFFICIENT METHOD FOR PROGRAMMING ELECTRICAL FUSES
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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09714356
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Filing Dt:
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11/16/2000
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Title:
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NITROGEN IMPLANTATION USING A SHADOW EFFECT TO CONTROL GATE OXIDE THICKNESS IN DRAM SEMICONDUCTOR
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Patent #:
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Issue Dt:
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09/25/2001
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Application #:
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09718211
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Filing Dt:
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11/21/2000
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Title:
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Method for forming and filling isolation trenches
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Patent #:
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Issue Dt:
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07/15/2003
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Application #:
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09723802
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Filing Dt:
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11/28/2000
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Title:
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TWO STEP CHEMICAL MECHANICAL POLISHING PROCESS
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Patent #:
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Issue Dt:
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12/03/2002
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Application #:
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09726889
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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09/26/2002
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Title:
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CIRCUIT FOR RECEIVING AND DRIVING A CLOCK-SIGNAL
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Patent #:
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Issue Dt:
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12/10/2002
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Application #:
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09726984
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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05/30/2002
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Title:
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RECEIVER IMMUNE TO SLOPE-REVERSAL NOISE
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Patent #:
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Issue Dt:
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09/16/2003
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Application #:
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09731343
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Filing Dt:
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12/06/2000
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Publication #:
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Pub Dt:
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06/06/2002
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Title:
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DRAM WITH VERTICAL TRANSISTOR AND TRENCH CAPACITOR MEMORY CELLS AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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09740113
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Filing Dt:
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12/19/2000
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Publication #:
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Pub Dt:
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02/19/2004
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Title:
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METHOD FOR FABRICATING TRANSISTORS HAVING DAMASCENE FORMED GATE CONTACTS AND SELF-ALIGNED BORDERLESS BIT LINE CONTACTS
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09740125
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Filing Dt:
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12/19/2000
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Publication #:
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Pub Dt:
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06/20/2002
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Title:
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SYSTEM AND METHOD FOR IMPROVED THROUGHPUT OF SEMICONDUCTOR WAFER PROCESSING
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Patent #:
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Issue Dt:
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08/08/2006
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Application #:
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09751474
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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11/04/2004
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Title:
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AREA EFFICIENT STACKING OF ANTIFUSES IN SEMICONDUCTOR DEVICE
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Patent #:
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Issue Dt:
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10/22/2002
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Application #:
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09751492
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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CONDUCTIVE LINES WITH REDUCED PITCH
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09751551
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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07/04/2002
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Title:
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MULTI-LAYER PT ELECTRODE FOR DRAM AND FRAM WITH HIGH K DIELECTRIC MATERIALS
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Patent #:
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Issue Dt:
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04/01/2003
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Application #:
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09801213
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Filing Dt:
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03/07/2001
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Publication #:
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Pub Dt:
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01/24/2002
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Title:
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METHOD FOR MANUFACTURING A CONDUCTOR STRUCTURE FOR AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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03/11/2003
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Application #:
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09803762
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Filing Dt:
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03/12/2001
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Publication #:
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Pub Dt:
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01/24/2002
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Title:
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BIS-O-AMINOPHENOLS AND O-AMINOPHENOLCARBOXYLIC ACIDS AND PROCESS FOR PREPARING THE SAME
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Patent #:
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Issue Dt:
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06/18/2002
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Application #:
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09805297
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Filing Dt:
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03/13/2001
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Publication #:
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Pub Dt:
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02/14/2002
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Title:
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METHOD FOR READING NONVOLATILE SEMICONDUCTOR MEMORY CONFIGURATIONS
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Patent #:
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Issue Dt:
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04/02/2002
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Application #:
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09811798
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Filing Dt:
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03/19/2001
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Publication #:
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Pub Dt:
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10/04/2001
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Title:
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Method for fabricating a contact layer
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Patent #:
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Issue Dt:
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09/17/2002
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Application #:
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09811799
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Filing Dt:
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03/19/2001
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Publication #:
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Pub Dt:
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09/20/2001
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Title:
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METHOD FOR SETTING THE THRESHOLD VOLTAGE OF A MOS TRANSISTOR
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Patent #:
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Issue Dt:
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11/19/2002
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Application #:
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09811867
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Filing Dt:
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03/19/2001
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Publication #:
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Pub Dt:
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02/07/2002
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Title:
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METHOD FOR FABRICATING AND CHECKING STRUCTURES OF ELECTRONIC CIRCUITS IN A SEMICONDUCTOR SUBSTRATE
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Patent #:
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Issue Dt:
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10/08/2002
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Application #:
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09832106
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Filing Dt:
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04/11/2001
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Publication #:
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Pub Dt:
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11/01/2001
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Title:
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AN MRAM MEMORY WITH DRIVE LOGIC ARRANGEMENT
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Patent #:
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Issue Dt:
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06/17/2003
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Application #:
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09833352
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Filing Dt:
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04/12/2001
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Publication #:
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Pub Dt:
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11/22/2001
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Title:
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TRENCH CAPACITOR AND METHOD FOR FABRICATING A TRENCH CAPACITOR
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Patent #:
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Issue Dt:
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02/17/2004
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Application #:
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09839764
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Filing Dt:
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04/20/2001
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Publication #:
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Pub Dt:
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01/17/2002
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Title:
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MASK FOR OPTICAL PROJECTION SYSTEMS, AND A PROCESS FOR ITS PRODUCTION
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Patent #:
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Issue Dt:
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09/24/2002
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Application #:
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09839765
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Filing Dt:
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04/20/2001
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Publication #:
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Pub Dt:
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02/21/2002
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Title:
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METHOD FOR FABRICATING A WIRING PLANE ON A SEMICONDUCTOR CHIP WITH AN ANTIFUSE
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Patent #:
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Issue Dt:
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11/30/2004
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Application #:
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09845405
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Filing Dt:
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04/30/2001
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Publication #:
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Pub Dt:
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02/14/2002
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Title:
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METHOD FOR REMOVING STRUCTURES
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Patent #:
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Issue Dt:
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03/18/2003
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Application #:
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09852969
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Filing Dt:
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05/10/2001
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Publication #:
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Pub Dt:
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12/06/2001
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Title:
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COMPONENT HOLDER FOR TESTING DEVICES AND COMPONENT HOLDER SYSTEM MICROLITHOGRAPHY
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Patent #:
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Issue Dt:
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10/15/2002
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Application #:
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09854658
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Filing Dt:
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05/14/2001
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Publication #:
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Pub Dt:
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11/22/2001
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Title:
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AMPLIFIER CIRCUIT
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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09871013
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Filing Dt:
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05/31/2001
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Publication #:
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Pub Dt:
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12/27/2001
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Title:
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METHOD FOR MAKING ELECTRICAL CONTACT WITH A REAR SIDE OF A SEMICONDUCTOR SUBSTRATE DURING ITS PROCESSING
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Patent #:
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Issue Dt:
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05/20/2003
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Application #:
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09875803
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Filing Dt:
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06/06/2001
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Publication #:
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Pub Dt:
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02/14/2002
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Title:
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DRAM MEMORY CELL FOR DRAM MEMORY DEVICE AND METHOD FOR MANUFACTURING IT
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Patent #:
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Issue Dt:
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03/04/2003
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Application #:
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09881432
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Filing Dt:
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06/14/2001
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Publication #:
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Pub Dt:
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12/27/2001
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Title:
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METHOD FOR MONITORING NITROGEN PROCESSES
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Patent #:
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Issue Dt:
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05/04/2004
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Application #:
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09882289
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Filing Dt:
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06/15/2001
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Publication #:
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Pub Dt:
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05/09/2002
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Title:
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METHOD FOR FABRICATING A BARRIER LAYER
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Patent #:
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Issue Dt:
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03/16/2004
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Application #:
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09882882
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Filing Dt:
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06/15/2001
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Publication #:
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Pub Dt:
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10/24/2002
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Title:
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ELECTRONIC DEVICE AND METHOD FOR FABRICATING AN ELECTRONIC DEVICE
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Patent #:
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Issue Dt:
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04/13/2004
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Application #:
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09883822
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Filing Dt:
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06/18/2001
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Publication #:
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Pub Dt:
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01/24/2002
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Title:
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INTEGRATED CIRCUIT WITH TEST MODE, AND TEST CONFIGURATION FOR TESTING AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09885554
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Filing Dt:
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06/20/2001
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Publication #:
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Pub Dt:
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01/10/2002
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Title:
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INTEGRATED MEMORY HAVING MEMORY CELLS WITH MAGNETORESISTIVE MEMORY EFFECT
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Patent #:
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Issue Dt:
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05/14/2002
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Application #:
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09888021
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Filing Dt:
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06/22/2001
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Publication #:
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Pub Dt:
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12/27/2001
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Title:
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METHOD OF FABRICATING A DIELECTRIC ANTIFUSE STRUCTURE
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Patent #:
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Issue Dt:
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08/06/2002
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Application #:
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09888034
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Filing Dt:
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06/22/2001
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Publication #:
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Pub Dt:
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01/17/2002
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Title:
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CONNECTION ELEMENT
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Patent #:
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Issue Dt:
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09/23/2003
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Application #:
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09893352
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Filing Dt:
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06/27/2001
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Publication #:
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Pub Dt:
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03/14/2002
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Title:
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SEMICONDUCTOR COMPONENT AND CORRESPONDING FABRICATION PROCESS
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09897280
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Filing Dt:
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07/02/2001
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Publication #:
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Pub Dt:
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01/17/2002
| | | | |
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Title:
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CIRCUIT CONFIGURATION FOR EQUALIZING DIFFERENT VOLTAGES ON LINE RUNS IN INTEGRATED SEMICONDUCTOR CIRCUITS
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Patent #:
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Issue Dt:
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09/30/2003
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Application #:
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09897281
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Filing Dt:
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07/02/2001
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Publication #:
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Pub Dt:
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03/07/2002
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Title:
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INTEGRATED CIRCUIT HAVING A TIMING CIRCUIT, AND METHOD FOR ADJUSTMENT OF AN OUTPUT SIGNAL FROM THE TIMING CIRCUIT
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Patent #:
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Issue Dt:
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11/19/2002
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09898221
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Filing Dt:
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07/03/2001
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Publication #:
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Pub Dt:
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02/28/2002
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Title:
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CURRENT DRIVER CONFIGURATION FOR MRAM
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Patent #:
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Issue Dt:
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09/24/2002
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09898233
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Filing Dt:
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07/03/2001
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Publication #:
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Pub Dt:
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05/09/2002
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Title:
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CIRCUIT CONFIGURATION FOR SWITCHING OVER A RECEIVER CIRCUIT IN PARTICULAR IN DRAM MEMORIES AND DRAM MEMORY HAVING THE CIRCUIT CONFIGURATION
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Patent #:
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Issue Dt:
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11/26/2002
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09898257
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Filing Dt:
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07/03/2001
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Publication #:
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Pub Dt:
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01/03/2002
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Title:
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MRAM CONFIGURATION
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Patent #:
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Issue Dt:
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12/17/2002
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09898261
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Filing Dt:
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07/03/2001
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Publication #:
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Pub Dt:
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02/21/2002
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Title:
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CHIP ID REGISTER CONFIGURATION
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Patent #:
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Issue Dt:
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12/03/2002
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09898262
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Filing Dt:
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07/03/2001
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Publication #:
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Pub Dt:
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01/17/2002
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Title:
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METHOD AND CONFIGURATION FOR COMPENSATING FOR PARASITIC CURRENT LOSSES
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Issue Dt:
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02/18/2003
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09898791
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Filing Dt:
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07/03/2001
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Publication #:
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Pub Dt:
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01/03/2002
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Title:
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METHOD FOR PREVENTING ELECTROMIGRATION IN AN MRAM
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06/21/2005
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09898909
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07/03/2001
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Pub Dt:
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03/14/2002
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Title:
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METALLIZATION ARRANGEMENT FOR SEMICONDUCTOR STRUCTURE AND CORRESPONDING FABRICATION METHOD
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08/12/2003
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09901524
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07/09/2001
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Publication #:
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Pub Dt:
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01/17/2002
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Title:
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SUPPORT MATRIX FOR INTEGRATED SEMICONDUCTORS, AND METHOD FOR PRODUCING IT
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Issue Dt:
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12/27/2005
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09901550
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07/09/2001
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Pub Dt:
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01/10/2002
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Title:
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SUPPORT MATRIX WITH BONDING CHANNEL FOR INTEGRATED SEMICONDUCTORS, AND METHOD FOR PRODUCING IT
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07/18/2006
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09904360
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07/12/2001
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Pub Dt:
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02/07/2002
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Title:
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PROCESS FOR PRODUCING A DOPED SEMICONDUCTOR SUBSTRATE
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11/30/2004
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09905853
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07/13/2001
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Pub Dt:
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01/31/2002
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Title:
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RANDOM ACCESS SEMICONDUCTOR MEMORY WITH REDUCED SIGNAL OVERCOUPLING
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11/18/2003
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09905858
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07/13/2001
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Pub Dt:
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01/24/2002
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Title:
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INTEGRATED SEMICONDUCTOR MEMORY HAVING MEMORY CELLS IN A PLURALITY OF MEMORY CELL ARRAYS AND METHOD FOR REPAIRING SUCH A MEMORY
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08/17/2004
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09906270
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07/16/2001
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Pub Dt:
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09/05/2002
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Title:
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METHOD OF INFERRING THE EXISTENCE OF LIGHT BY MEANS OF A MEASUREMENT OF THE ELECTRICAL CHARACTERISTICS OF A NANOTUBE BOUND WITH A DYE, AND DETECTION ARRANGEMENT
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03/22/2005
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09907692
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07/18/2001
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Pub Dt:
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10/31/2002
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METHOD AND DEVICE FOR READING AND FOR CHECKING THE TIME POSITION OF DATA RESPONSE SIGNALS READ OUT FROM A MEMORY MODULE TO BE TESTED
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04/13/2004
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09907693
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07/18/2001
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01/24/2002
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SYSTEM FOR TESTING FAST INTEGRATED DIGITAL CIRCUITS, IN PARTICULAR SEMICONDUCTOR MEMORY MODULES
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05/17/2005
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09907694
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07/18/2001
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01/22/2004
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Title:
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METHOD FOR TESTING A DEVICE AND A TEST CONFIGURATION INCLUDING A DEVICE WITH A TEST MEMORY
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03/01/2005
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09907776
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07/18/2001
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01/31/2002
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ADDRESS COUNTER FOR ADDRESSING SYNCHRONOUS HIGH-FREQUENCY DIGITAL CIRCUITS, IN PARTICULAR MEMORY DEVICES
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10/03/2006
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09907777
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07/18/2001
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01/24/2002
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METHOD AND DEVICE FOR GENERATING DIGITAL SIGNAL PATTERNS
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10/01/2002
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09907783
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07/18/2001
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01/31/2002
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CONFIGURATION FOR IMPLEMENTING REDUNDANCY FOR A MEMORY CHIP
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01/04/2005
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09907784
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07/18/2001
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01/24/2002
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CIRCUIT CONFIGURATION FOR GENERATING CONTROL SIGNALS FOR TESTING HIGH-FREQUENCY SYNCHRONOUS DIGITAL CIRCUITS
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06/13/2006
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09907786
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07/18/2001
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06/13/2002
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Title:
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SYSTEM FOR TESTING FAST SYNCHRONOUS DIGITAL CIRCUITS, PARTICULARLY SEMICONDUCTOR MEMORY CHIPS
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