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01/12/2016
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14146421
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01/02/2014
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07/02/2015
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FIN CONTACTED ELECTROSTATIC DISCHARGE (ESD) DEVICES WITH IMPROVED HEAT DISTRIBUTION
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07/28/2015
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14146788
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01/03/2014
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07/09/2015
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Title:
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SEMICONDUCTOR CHIP WITH A DUAL DAMASCENE WIRE AND THROUGH-SUBSTRATE VIA (TSV) STRUCTURE
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03/08/2016
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14146793
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01/03/2014
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07/09/2015
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Title:
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SINGLE-ENDED SENSING CIRCUITS FOR SIGNAL LINES
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08/19/2014
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14146869
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01/03/2014
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05/01/2014
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Title:
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PARTIALLY DEPLETED (PD) SEMICONDUCTOR-ON-INSULATOR (SOI) FIELD EFFECT TRANSISTOR (FET) STRUCTURE WITH A GATE-TO-BODY TUNNEL CURRENT REGION FOR THRESHOLD VOLTAGE (VT) LOWERING AND METHOD OF FORMING THE STRUCTURE
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07/07/2015
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14147225
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01/03/2014
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07/09/2015
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Title:
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INTEGRATED CIRCUIT STRUCTURES HAVING OFF-AXIS IN-HOLE CAPACITOR AND METHODS OF FORMING
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05/03/2016
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14147939
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01/06/2014
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07/10/2014
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Title:
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HETEROJUNCTION III-V SOLAR CELL PERFORMANCE
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05/15/2018
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14147996
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01/06/2014
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07/09/2015
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Title:
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CRYSTAL OSCILLATOR AND THE USE THEREOF IN SEMICONDUCTOR FABRICATION
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NONE
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14148174
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01/06/2014
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07/09/2015
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Title:
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METHOD OF MODELING CONCENTRATION OF REDUCIBLE MOBILE IONIC DOPANT IN SEMICONDUCTOR DEVICE SIMULATOR
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05/02/2017
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14148234
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01/06/2014
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05/01/2014
| | | | |
Title:
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COMPACT MODEL FOR DEVICE/CIRCUIT/CHIP LEAKAGE CURRENT (IDDQ) CALCULATION INCLUDING PROCESS INDUCED UPLIFT FACTORS
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04/19/2016
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14148532
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01/06/2014
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05/01/2014
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Title:
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BEOL STRUCTURES INCORPORATING ACTIVE DEVICES AND MECHANICAL STRENGTH
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03/01/2016
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14148573
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01/06/2014
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05/01/2014
| | | | |
Title:
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BEOL STRUCTURES INCORPORATING ACTIVE DEVICES AND MECHANICAL STRENGTH
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01/19/2016
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14149280
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01/07/2014
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05/08/2014
| | | | |
Title:
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ARRAY AND MOAT ISOLATION STRUCTURES AND METHOD OF MANUFACTURE
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03/03/2015
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14149295
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01/07/2014
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05/01/2014
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Title:
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FIN-LAST REPLACEMENT METAL GATE FINFET
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07/28/2015
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14149898
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01/08/2014
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07/09/2015
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Title:
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METALLIC MASK PATTERNING PROCESS FOR MINIMIZING COLLATERAL ETCH OF AN UNDERLAYER
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03/24/2015
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14150954
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01/09/2014
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05/08/2014
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Title:
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CARBON NANOTUBE TRANSISTOR EMPLOYING EMBEDDED ELECTRODES
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01/29/2019
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14151138
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01/09/2014
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07/09/2015
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Title:
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SHIELDING STRUCTURES BETWEEN OPTICAL WAVEGUIDES
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Patent #:
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02/17/2015
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14151200
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01/09/2014
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Pub Dt:
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05/08/2014
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Title:
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SILICON CONTROLLED RECTIFIER STRUCTURE WITH IMPROVED JUNCTION BREAKDOWN AND LEAKAGE CONTROL
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08/18/2015
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14151225
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01/09/2014
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Pub Dt:
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07/09/2015
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Title:
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SELF-ALIGNED EMITTER-BASE-COLLECTOR BIPOLAR JUNCTION TRANSISTORS WITH A SINGLE CRYSTAL RAISED EXTRINSIC BASE
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06/16/2015
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14151331
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01/09/2014
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04/23/2015
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Title:
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DESIGN STRUCTURE FOR LOGIC CIRCUIT AND SERIALIZER-DESERIALIZER STACK
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03/29/2016
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14151550
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01/09/2014
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07/10/2014
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Title:
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SEMICONDUCTOR-ON-OXIDE STRUCTURE AND METHOD OF FORMING
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02/24/2015
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14151582
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01/09/2014
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Pub Dt:
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05/08/2014
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Title:
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HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE AND METHOD OF FORMING
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05/09/2017
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14151866
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01/10/2014
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Pub Dt:
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09/11/2014
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Title:
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METHOD FOR CONVERSION OF COMMERCIAL MICROPROCESSOR TO RADIATION-HARDENED PROCESSOR AND RESULTING PROCESSOR
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06/10/2014
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14151884
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01/10/2014
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Publication #:
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Pub Dt:
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05/01/2014
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Title:
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SEMICONDUCTOR STRUCTURES WITH THINNED JUNCTIONS AND METHODS OF MANUFACTURE
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Patent #:
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01/27/2015
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14151998
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01/10/2014
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05/08/2014
| | | | |
Title:
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EDGE SELECTION TECHNIQUES FOR CORRECTING CLOCK DUTY CYCLE
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03/15/2016
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14152345
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01/10/2014
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Pub Dt:
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07/16/2015
| | | | |
Title:
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CONVERTING AN XY TCAM TO A VALUE TCAM
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Patent #:
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Issue Dt:
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08/04/2015
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14152847
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01/10/2014
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Pub Dt:
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07/16/2015
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Title:
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BOUNDARY LATCH AND LOGIC PLACEMENT TO SATISFY TIMING CONSTRAINTS
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Patent #:
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Issue Dt:
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12/01/2015
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14152907
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01/10/2014
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Pub Dt:
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05/08/2014
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Title:
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ELECTROSTATIC DISCHARGE (ESD) PROTECTION USING LOW VISCOSITY ESD DISSIPATING ADHESIVE SUBSTANTIALLY FREE OF AGGLOMERATES
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03/03/2015
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14153145
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01/13/2014
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Pub Dt:
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05/08/2014
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Title:
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METHOD AND STRUCTURE OF FORMING BACKSIDE THROUGH SILICON VIA CONNECTIONS
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NONE
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14153464
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01/13/2014
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Pub Dt:
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05/08/2014
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Title:
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Heat Treatment Process and Photovoltaic Device Based on Said Process
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10/04/2016
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14153728
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01/13/2014
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05/08/2014
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Title:
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UNIFORMLY DISTRIBUTED SELF-ASSEMBLED CONE-SHAPED PILLARS FOR HIGH EFFICIENCY SOLAR CELLS
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03/03/2015
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14154202
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01/14/2014
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Pub Dt:
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05/08/2014
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Title:
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METHOD AND STRUCTURE FOR FORMING ON-CHIP HIGH QUALITY CAPACITORS WITH ETSOI TRANSISTORS
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11/17/2015
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14154247
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01/14/2014
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03/26/2015
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Title:
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SPEED OF LIGHT BASED OSCILLATOR FREQUENCY
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06/23/2015
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14154305
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01/14/2014
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05/08/2014
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Title:
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INTERCONNECT WITH TITANIUM-OXIDE DIFFUSION BARRIER
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05/10/2016
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14154438
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01/14/2014
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05/08/2014
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Title:
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STRUCTURE AND METHOD TO IMPROVE ETSOI MOSFETS WITH BACK GATE
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09/27/2016
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14154505
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01/14/2014
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07/16/2015
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Title:
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NON-PLANAR FIELD EFFECT TRANSISTOR TEST STRUCTURE AND LATERAL DIELECTRIC BREAKDOWN TESTING METHOD
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08/11/2015
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14154538
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01/14/2014
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03/12/2015
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Title:
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SEMICONDUCTOR-ON-INSULATOR DEVICE INCLUDING STAND-ALONE WELL IMPLANT TO PROVIDE JUNCTION BUTTING
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NONE
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14155540
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01/15/2014
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Pub Dt:
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03/19/2015
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Title:
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ANALYTICS-DRIVEN AUTOMATED RECONCILIATION OF FINANCIAL TRANSACTIONS
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07/01/2014
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14155972
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01/15/2014
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Pub Dt:
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05/08/2014
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Title:
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SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME
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09/16/2014
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14156006
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01/15/2014
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Pub Dt:
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05/08/2014
| | | | |
Title:
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SEMICONDUCTOR NANOSTRUCTURES, SEMICONDUCTOR DEVICES, AND METHODS OF MAKING SAME
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Patent #:
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Issue Dt:
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05/10/2016
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14156487
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01/16/2014
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Pub Dt:
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07/16/2015
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Title:
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ON-CHIP TEST FOR INTEGRATED AC COUPLING CAPACITORS
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Issue Dt:
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08/30/2016
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14156489
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01/16/2014
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Pub Dt:
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07/16/2015
| | | | |
Title:
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LOCAL THINNING OF SEMICONDUCTOR FINS
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NONE
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14156798
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01/16/2014
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Pub Dt:
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03/19/2015
| | | | |
Title:
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ANALYTICS DRIVEN ASSESSMENT OF TRANSACTIONAL RISK DAILY LIMIT EXCEPTIONS
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NONE
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14156821
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01/16/2014
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Pub Dt:
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03/19/2015
| | | | |
Title:
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TRANSACTIONAL RISK DAILY LIMIT UPDATE ALARM
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02/10/2015
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14157098
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01/16/2014
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Pub Dt:
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05/15/2014
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Title:
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METHODS FOR FABRICATION OF AN AIR GAP-CONTAINING INTERCONNECT STRUCTURE
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11/29/2016
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14157755
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01/17/2014
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06/05/2014
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Title:
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ELECTRONIC COMPONENTS ON TRENCHED SUBSTRATES AND METHOD OF FORMING SAME
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Issue Dt:
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05/10/2016
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14157851
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01/17/2014
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Pub Dt:
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05/15/2014
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Title:
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FINFET SPACER FORMATION BY ORIENTED IMPLANTATION
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Patent #:
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Issue Dt:
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07/19/2016
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14157962
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01/17/2014
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Pub Dt:
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07/23/2015
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Title:
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INTEGRATED MICRO-INVERTER AND THIN FILM SOLAR MODULE AND MANUFACTURING PROCESS
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03/08/2016
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14158539
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01/17/2014
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Pub Dt:
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05/15/2014
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Title:
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SEMICONDUCTOR DEVICE INCLUDING AN ASYMMETRIC FEATURE
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Issue Dt:
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02/23/2016
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14158904
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01/20/2014
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Pub Dt:
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05/15/2014
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Title:
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METHODS FOR SELECTIVE REVERSE MASK PLANARIZATION AND INTERCONNECT STRUCTURES FORMED THEREBY
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Issue Dt:
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10/20/2015
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14158917
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01/20/2014
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Publication #:
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Pub Dt:
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07/23/2015
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Title:
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SEMICONDUCTOR DEVICE INCLUDING ENHANCED VARIABILITY
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02/14/2017
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14159027
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01/20/2014
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Pub Dt:
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05/15/2014
| | | | |
Title:
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Structure and Method to Form Passive Devices in ETSOI Process Flow
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05/17/2016
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14160630
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01/22/2014
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Publication #:
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Pub Dt:
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07/23/2015
| | | | |
Title:
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FIELD EFFECT TRANSISTOR (FET) WITH SELF-ALIGNED DOUBLE GATES ON BULK SILICON SUBSTRATE, METHODS OF FORMING, AND RELATED DESIGN STRUCTURES
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03/01/2016
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14160846
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01/22/2014
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Pub Dt:
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04/30/2015
| | | | |
Title:
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APPARATUS AND METHOD TO RECOVER A DATA SIGNAL
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08/11/2015
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14160909
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Filing Dt:
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01/22/2014
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Publication #:
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Pub Dt:
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05/14/2015
| | | | |
Title:
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THICK AND THIN DATA VOLUME MANAGEMENT
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Patent #:
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Issue Dt:
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08/11/2015
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14160918
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01/22/2014
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Publication #:
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Pub Dt:
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07/23/2015
| | | | |
Title:
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IDENTIFYING AND MITIGATING ELECTROMIGRATION FAILURES IN SIGNAL NETS OF AN INTEGRATED CIRCUIT CHIP DESIGN
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11/03/2015
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14160927
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01/22/2014
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Publication #:
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Pub Dt:
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05/14/2015
| | | | |
Title:
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THICK AND THIN DATA VOLUME MANAGEMENT
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Patent #:
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08/02/2016
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14161228
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01/22/2014
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Publication #:
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Pub Dt:
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07/23/2015
| | | | |
Title:
|
THROUGH PRINTED CIRCUIT BOARD (PCB) VIAS
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Patent #:
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Issue Dt:
|
10/25/2016
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Application #:
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14161309
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Filing Dt:
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01/22/2014
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Publication #:
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Pub Dt:
|
07/23/2015
| | | | |
Title:
|
STRUCTURE AND METHOD TO DETERMINE THROUGH SILICON VIA BUILD INTEGRITY
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Patent #:
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Issue Dt:
|
05/24/2016
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Application #:
|
14161738
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Filing Dt:
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01/23/2014
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Publication #:
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Pub Dt:
|
07/23/2015
| | | | |
Title:
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WAFER THINNING ENDPOINT DETECTION FOR TSV TECHNOLOGY
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Patent #:
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|
Issue Dt:
|
08/05/2014
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Application #:
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14161896
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Filing Dt:
|
01/23/2014
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Publication #:
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Pub Dt:
|
06/12/2014
| | | | |
Title:
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SEMICONDUCTOR CHIP REPAIR BY STACKING OF A BASE SEMICONDUCTOR CHIP AND A REPAIR SEMICONDUCTOR CHIP
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Patent #:
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Issue Dt:
|
12/23/2014
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Application #:
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14162256
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Filing Dt:
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01/23/2014
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Publication #:
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Pub Dt:
|
05/15/2014
| | | | |
Title:
|
SELF-ALIGNED EMITTER-BASE IN ADVANCED BiCMOS TECHNOLOGY
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Patent #:
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Issue Dt:
|
12/29/2015
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Application #:
|
14162403
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Filing Dt:
|
01/23/2014
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Publication #:
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Pub Dt:
|
07/23/2015
| | | | |
Title:
|
SEMICONDUCTOR FINS ON A TRENCH ISOLATION REGION IN A BULK SEMICONDUCTOR SUBSTRATE AND A METHOD OF FORMING THE SEMICONDUCTOR FINS
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Patent #:
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|
Issue Dt:
|
01/26/2016
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Application #:
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14164310
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Filing Dt:
|
01/27/2014
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Publication #:
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Pub Dt:
|
05/22/2014
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH A THIN BODY FIELD EFFECT TRANSISTOR AND CAPACITOR
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|
Patent #:
|
NONE
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Issue Dt:
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|
Application #:
|
14164555
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Filing Dt:
|
01/27/2014
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Publication #:
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Pub Dt:
|
07/24/2014
| | | | |
Title:
|
ADHESION LAYER AND MULTIPHASE ULTRA-LOW k DIELECTRIC MATERIAL
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|
Patent #:
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|
Issue Dt:
|
12/01/2015
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Application #:
|
14164687
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Filing Dt:
|
01/27/2014
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Publication #:
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|
Pub Dt:
|
07/31/2014
| | | | |
Title:
|
LEVEL-ESTIMATION IN MULTI-LEVEL CELL MEMORY
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|
Patent #:
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|
Issue Dt:
|
09/27/2016
|
Application #:
|
14165607
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Filing Dt:
|
01/28/2014
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Publication #:
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|
Pub Dt:
|
01/22/2015
| | | | |
Title:
|
SEGMENTED THIN FILM SOLAR CELLS
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|
Patent #:
|
|
Issue Dt:
|
12/22/2015
|
Application #:
|
14165621
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Filing Dt:
|
01/28/2014
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Publication #:
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|
Pub Dt:
|
01/08/2015
| | | | |
Title:
|
BALL GRID ARRAY CONFIGURATION FOR RELIABLE TESTING
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|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
14165633
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Filing Dt:
|
01/28/2014
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Publication #:
|
|
Pub Dt:
|
04/23/2015
| | | | |
Title:
|
STORAGE AND RETRIEVAL OF HIGH IMPORTANCE PAGES IN AN ACTIVE MEMORY SHARING ENVIRONMENT
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|
Patent #:
|
|
Issue Dt:
|
02/23/2016
|
Application #:
|
14165762
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Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
11/27/2014
| | | | |
Title:
|
VALIDATION OF CACHE LOCKING USING INSTRUCTION FETCH AND EXECUTION
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|
Patent #:
|
|
Issue Dt:
|
03/07/2017
|
Application #:
|
14166078
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
04/23/2015
| | | | |
Title:
|
PROXIMITY BASED DUAL AUTHENTICATION FOR A WIRELESS NETWORK
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14166155
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
07/30/2015
| | | | |
Title:
|
STRUCTURE AND PROCESS TO DECOUPLE DEEP TRENCH CAPACITORS AND WELL ISOLATION
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|
|
Patent #:
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|
Issue Dt:
|
03/10/2015
|
Application #:
|
14166219
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Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
LOCALLY ISOLATED PROTECTED BULK FINFET SEMICONDUCTOR DEVICE
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|
|
Patent #:
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|
Issue Dt:
|
10/27/2015
|
Application #:
|
14166274
|
Filing Dt:
|
01/28/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
DUAL-DAMASCENE PROCESS TO FABRICATE THICK WIRE STRUCTURE
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14167298
|
Filing Dt:
|
01/29/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR
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|
Patent #:
|
|
Issue Dt:
|
01/19/2016
|
Application #:
|
14167499
|
Filing Dt:
|
01/29/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
JUNCTION FIELD EFFECT TRANSISTOR WITH AN EPITAXIALLY GROWN GATE STRUCTURE
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|
Patent #:
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|
Issue Dt:
|
12/29/2015
|
Application #:
|
14168133
|
Filing Dt:
|
01/30/2014
|
Publication #:
|
|
Pub Dt:
|
07/30/2015
| | | | |
Title:
|
OPTICAL MODEL EMPLOYING PHASE TRANSMISSION VALUES FOR SUB-RESOLUTION ASSIST FEATURES
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|
|
Patent #:
|
|
Issue Dt:
|
06/30/2015
|
Application #:
|
14168208
|
Filing Dt:
|
01/30/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
INTEGRATED CIRCUIT WITH A THIN BODY FIELD EFFECT TRANSISTOR AND CAPACITOR
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|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
14168471
|
Filing Dt:
|
01/30/2014
|
Publication #:
|
|
Pub Dt:
|
05/29/2014
| | | | |
Title:
|
FIXED CURVATURE FORCE LOADING OF MECHANICALLY SPALLED FILMS
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|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
|
Application #:
|
14169318
|
Filing Dt:
|
01/31/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURES WITH PAIR(S) OF VERTICAL FIELD EFFECT TRANSISTORS, EACH PAIR HAVING A SHARED SOURCE/DRAIN REGION AND METHODS OF FORMING THE STRUCTURES
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14169632
|
Filing Dt:
|
01/31/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
ANALYTICS-DRIVEN PRODUCT RECOMMENDATION FOR FINANCIAL SERVICES
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|
|
Patent #:
|
|
Issue Dt:
|
03/01/2016
|
Application #:
|
14170205
|
Filing Dt:
|
01/31/2014
|
Publication #:
|
|
Pub Dt:
|
04/09/2015
| | | | |
Title:
|
Moving Checkpoint-Based High-Availability Log and Data Directly From a Producer Cache to a Consumer Cache
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|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
14170708
|
Filing Dt:
|
02/03/2014
|
Publication #:
|
|
Pub Dt:
|
06/26/2014
| | | | |
Title:
|
TRANSPARENT CONDUCTIVE ELECTRODE STACK CONTAINING CARBON-CONTAINING MATERIAL
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14171107
|
Filing Dt:
|
02/03/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
EFFICIENT WAKEUP OF POWER GATED DOMAINS THROUGH CHARGE SHARING AND RECYCLING
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14171836
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
ACCELERATING MICROPROCESSOR CORE WAKE UP VIA CHARGE FROM CAPACITANCE TANK WITHOUT INTRODUCING NOISE ON POWER GRID OF RUNNING MICROPROCESSOR CORES
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|
|
Patent #:
|
|
Issue Dt:
|
11/29/2016
|
Application #:
|
14171874
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
METHOD AND APPARATUS FOR DETECTING FOREIGN MATERIAL ON A CHUCK
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|
|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
14171899
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
ACCELERATING THE MICROPROCESSOR CORE WAKEUP BY PREDICTIVELY EXECUTING A SUBSET OF THE POWER-UP SEQUENCE
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|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
14172365
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
FinFET DEVICE CONTAINING A COMPOSITE SPACER STRUCTURE
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|
|
Patent #:
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|
Issue Dt:
|
06/21/2016
|
Application #:
|
14172550
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
TRANSMITTER SERIALIZER LATENCY TRIM
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|
|
Patent #:
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|
Issue Dt:
|
10/18/2016
|
Application #:
|
14172618
|
Filing Dt:
|
02/04/2014
|
Publication #:
|
|
Pub Dt:
|
08/06/2015
| | | | |
Title:
|
RECEIVER DESERIALIZER LATENCY TRIM
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|
|
Patent #:
|
|
Issue Dt:
|
12/08/2015
|
Application #:
|
14172922
|
Filing Dt:
|
02/05/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
AUTOMATIC IDENTIFICATION OF INFORMATION USEFUL FOR GENERATION-BASED FUNCTIONAL VERIFICATION
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|
|
Patent #:
|
|
Issue Dt:
|
11/17/2015
|
Application #:
|
14173296
|
Filing Dt:
|
02/05/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
SHALLOW TRENCH ISOLATION STRUCTURES
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|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
14174868
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
DISLOCATION ENGINEERING USING A SCANNED LASER
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|
|
Patent #:
|
|
Issue Dt:
|
10/21/2014
|
Application #:
|
14174869
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
DISLOCATION ENGINEERING USING A SCANNED LASER
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|
|
Patent #:
|
|
Issue Dt:
|
11/03/2015
|
Application #:
|
14174887
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
PLATED TRENCH CAPACITOR STRUCTURES
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14174920
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
08/13/2015
| | | | |
Title:
|
DIAMOND SHAPED EPITAXY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/02/2016
|
Application #:
|
14175116
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
07/10/2014
| | | | |
Title:
|
A COAXIAL PROBE STRUCTURE OF ELONGATED ELECTRICAL CONDUCTORS PROJECTING FROM A SUPPORT STRUCTURE
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|
|
Patent #:
|
|
Issue Dt:
|
10/25/2016
|
Application #:
|
14175587
|
Filing Dt:
|
02/07/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
METHOD OF FORMING SUBSTRATE CONTACT FOR SEMICONDUCTOR ON INSULATOR (SOI) SUBSTRATE
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|
|
Patent #:
|
|
Issue Dt:
|
09/23/2014
|
Application #:
|
14176460
|
Filing Dt:
|
02/10/2014
|
Publication #:
|
|
Pub Dt:
|
06/05/2014
| | | | |
Title:
|
TAPERED VIA AND MIM CAPACITOR
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/2015
|
Application #:
|
14176526
|
Filing Dt:
|
02/10/2014
|
Title:
|
TOUGHNESS, ADHESION AND SMOOTH METAL LINES OF POROUS LOW K DIELECTRIC INTERCONNECT STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
06/16/2015
|
Application #:
|
14176552
|
Filing Dt:
|
02/10/2014
|
Title:
|
SILICON WAVEGUIDE ON BULK SILICON SUBSTRATE AND METHODS OF FORMING
|
|