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Patent #:
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NONE
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Issue Dt:
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Application #:
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14519614
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Filing Dt:
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10/21/2014
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Publication #:
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Pub Dt:
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02/26/2015
| | | | |
Title:
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INTEGRATED CIRCUIT INCLUDING WIRE STRUCTURE AND RELATED METHOD
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Patent #:
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Issue Dt:
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09/20/2016
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Application #:
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14519615
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Filing Dt:
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10/21/2014
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Publication #:
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Pub Dt:
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12/24/2015
| | | | |
Title:
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REPLACEMENT GATE STRUCTURE FOR ENHANCING CONDUCTIVITY
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Patent #:
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Issue Dt:
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06/02/2015
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Application #:
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14519622
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Filing Dt:
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10/21/2014
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Publication #:
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Pub Dt:
|
02/05/2015
| | | | |
Title:
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MIDDLE-OF-LINE BORDERLESS CONTACT STRUCTURE AND METHOD OF FORMING
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Patent #:
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Issue Dt:
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01/12/2016
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Application #:
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14519630
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Filing Dt:
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10/21/2014
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Publication #:
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Pub Dt:
|
02/05/2015
| | | | |
Title:
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COMPENSATED IMPEDANCE CALIBRATION CIRCUIT
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Patent #:
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Issue Dt:
|
10/29/2019
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Application #:
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14520115
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Filing Dt:
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10/21/2014
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Publication #:
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Pub Dt:
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04/23/2015
| | | | |
Title:
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ELECTRONIC CIRCUIT HAVING SERIAL LATCH SCAN CHAINS
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Patent #:
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Issue Dt:
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04/26/2016
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Application #:
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14520390
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Filing Dt:
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10/22/2014
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Publication #:
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Pub Dt:
|
02/05/2015
| | | | |
Title:
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MODIFIED VIA BOTTOM FOR BEOL VIA EFUSE
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Patent #:
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Issue Dt:
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05/24/2016
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Application #:
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14520445
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Filing Dt:
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10/22/2014
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Publication #:
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Pub Dt:
|
02/05/2015
| | | | |
Title:
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METHOD, STRUCTURE AND DESIGN STRUCTURE FOR CUSTOMIZING HISTORY EFFECTS OF SOI CIRCUITS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14520648
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Filing Dt:
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10/22/2014
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Publication #:
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Pub Dt:
|
02/05/2015
| | | | |
Title:
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SEGMENTED GUARD RING STRUCTURES WITH ELECTRICALLY INSULATED GAP STRUCTURES AND DESIGN STRUCTURES THEREOF
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14520677
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Filing Dt:
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10/22/2014
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Publication #:
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Pub Dt:
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02/05/2015
| | | | |
Title:
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FLEXIBLE FILM CARRIER TO INCREASE INTERCONNECT DENSITY OF MODULES AND METHODS THEREOF
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Patent #:
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Issue Dt:
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03/22/2016
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Application #:
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14521605
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
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02/12/2015
| | | | |
Title:
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BIPOLAR JUNCTION TRANSISTOR HAVING MULTI-SIDED BASE CONTACT
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Patent #:
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Issue Dt:
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08/23/2016
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Application #:
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14521739
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
|
04/28/2016
| | | | |
Title:
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PERFORMING SECURE ADDRESS RELOCATION WITHIN A MULTI-PROCESSOR SYSTEM SHARING A SAME PHYSICAL MEMORY CHANNEL TO EXTERNAL MEMORY
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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14521743
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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THERMALLY STABLE HIGH-K TETRAGONAL HFO2 LAYER WITHIN HIGH ASPECT RATIO DEEP TRENCHES
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Patent #:
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Issue Dt:
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01/24/2017
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Application #:
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14521795
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
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04/30/2015
| | | | |
Title:
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Method and Computer System for Dynamically Providing Multi-Dimensional Based Password/Challenge Authentication
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14521948
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
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02/12/2015
| | | | |
Title:
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CATALYTIC ETCH WITH MAGNETIC DIRECTION CONTROL
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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14522017
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
|
04/28/2016
| | | | |
Title:
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PROGRAMMING AN ELECTRICAL FUSE WITH A SILICON-CONTROLLED RECTIFIER
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Patent #:
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Issue Dt:
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01/24/2017
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Application #:
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14522083
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
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04/28/2016
| | | | |
Title:
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STRAIN DETECTION STRUCTURES FOR BONDED WAFERS AND CHIPS
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Patent #:
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Issue Dt:
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03/01/2016
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Application #:
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14522090
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Filing Dt:
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10/23/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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SELF-ALIGNED EMITTER-BASE REGION
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Patent #:
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Issue Dt:
|
08/11/2015
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Application #:
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14522119
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Filing Dt:
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10/23/2014
|
Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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SELF ALIGNED CONTACT WITH IMPROVED ROBUSTNESS
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Patent #:
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Issue Dt:
|
03/22/2016
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Application #:
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14522626
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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VOLTAGE CONTRAST INSPECTION OF DEEP TRENCH ISOLATION
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Patent #:
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Issue Dt:
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02/09/2016
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Application #:
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14522633
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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BOTTOM-UP PLATING OF THROUGH-SUBSTRATE VIAS
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Patent #:
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Issue Dt:
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03/01/2016
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Application #:
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14522649
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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3D TRANSISTOR CHANNEL MOBILITY ENHANCEMENT
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Patent #:
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Issue Dt:
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05/31/2016
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Application #:
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14522652
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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HIGH-VOLTAGE METAL-INSULATOR-SEMICONDUCTOR FIELD EFFECT TRANSISTOR STRUCTURES
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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14522664
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Filing Dt:
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10/24/2014
|
Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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STRUCTURES AND METHODS FOR IMPROVING SOLDER BUMP CONNECTIONS IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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10/03/2017
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Application #:
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14522809
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
04/28/2016
| | | | |
Title:
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ELECTROPLATING SYSTEM AND METHOD OF USING ELECTROPLATING SYSTEM FOR CONTROLLING CONCENTRATION OF ORGANIC ADDITIVES IN ELECTROPLATING SOLUTION
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14522848
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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UPDATING TECHNIQUES FOR MEMORY OF A CHASSIS MANAGEMENT MODULE
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Patent #:
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Issue Dt:
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12/19/2017
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Application #:
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14523076
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Filing Dt:
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10/24/2014
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Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURE
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Patent #:
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Issue Dt:
|
11/15/2016
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Application #:
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14523083
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Filing Dt:
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10/24/2014
|
Publication #:
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Pub Dt:
|
04/28/2016
| | | | |
Title:
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SEMICONDUCTOR STRUCTURES WITH FIELD EFFECT TRANSISTOR(S) HAVING LOW-RESISTANCE SOURCE/DRAIN CONTACT(S)
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Patent #:
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Issue Dt:
|
05/10/2016
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Application #:
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14524079
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Filing Dt:
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10/27/2014
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Publication #:
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Pub Dt:
|
04/23/2015
| | | | |
Title:
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ANISOTROPIC DIELECTRIC MATERIAL GATE SPACER FOR A FIELD EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
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05/24/2016
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Application #:
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14524246
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Filing Dt:
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10/27/2014
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Publication #:
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Pub Dt:
|
12/31/2015
| | | | |
Title:
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LOW RESISTANCE AND DEFECT FREE EPITAXIAL SEMICONDUCTOR MATERIAL FOR PROVIDING MERGED FinFETs
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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14524367
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Filing Dt:
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10/27/2014
|
Publication #:
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Pub Dt:
|
04/16/2015
| | | | |
Title:
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MERGED FIN FINFET WITH (100) SIDEWALL SURFACES AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
|
12/04/2018
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Application #:
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14524413
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Filing Dt:
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10/27/2014
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Publication #:
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Pub Dt:
|
04/30/2015
| | | | |
Title:
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METHOD AND APPARATUS FOR SIMULATING A DIGITAL CIRCUIT
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|
Patent #:
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|
Issue Dt:
|
07/21/2015
|
Application #:
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14524637
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Filing Dt:
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10/27/2014
|
Publication #:
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|
Pub Dt:
|
02/12/2015
| | | | |
Title:
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SEMICONDUCTOR TEST AND MONITORING STRUCTURE TO DETECT BOUNDARIES OF SAFE EFFECTIVE MODULUS
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Patent #:
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|
Issue Dt:
|
06/13/2017
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Application #:
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14525254
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Filing Dt:
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10/28/2014
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Publication #:
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Pub Dt:
|
04/28/2016
| | | | |
Title:
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ANODIZED METAL ON CARRIER WAFER
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Patent #:
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Issue Dt:
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08/08/2017
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Application #:
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14525267
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Filing Dt:
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10/28/2014
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Publication #:
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Pub Dt:
|
04/28/2016
| | | | |
Title:
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NON-TRANSPARENT MICROELECTRONIC GRADE GLASS AS A SUBSTRATE, TEMPORARY CARRIER OR WAFER
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Patent #:
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NONE
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Issue Dt:
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|
Application #:
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14525320
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Filing Dt:
|
10/28/2014
|
Publication #:
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Pub Dt:
|
04/28/2016
| | | | |
Title:
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INTEGRATED CIRCUIT TIMING VARIABILITY REDUCTION
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Patent #:
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|
Issue Dt:
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04/28/2015
|
Application #:
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14525559
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Filing Dt:
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10/28/2014
|
Publication #:
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Pub Dt:
|
03/05/2015
| | | | |
Title:
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INTEGRATED CIRCUIT INCLUDING DRAM AND SRAM/LOGIC
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|
Patent #:
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|
Issue Dt:
|
10/20/2015
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Application #:
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14525682
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Filing Dt:
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10/28/2014
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Publication #:
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Pub Dt:
|
02/12/2015
| | | | |
Title:
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COMPENSATING FOR WARPAGE OF A FLIP CHIP PACKAGE BY VARYING HEIGHTS OF A REDISTRIBUTION LAYER ON AN INTEGRATED CIRCUIT CHIP
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Patent #:
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Issue Dt:
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12/25/2018
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Application #:
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14526580
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Filing Dt:
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10/29/2014
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Publication #:
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|
Pub Dt:
|
02/19/2015
| | | | |
Title:
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SILICON CONTROLLED RECTIFIERS (SCR), METHODS OF MANUFACTURE AND DESIGN STRUCTURES
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Patent #:
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|
Issue Dt:
|
06/21/2016
|
Application #:
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14526767
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Filing Dt:
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10/29/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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EPITAXIAL SEMICONDUCTOR RESISTOR WITH SEMICONDUCTOR STRUCTURES ON SAME SUBSTRATE
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Patent #:
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Issue Dt:
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04/19/2016
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Application #:
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14527042
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Filing Dt:
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10/29/2014
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Publication #:
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Pub Dt:
|
03/05/2015
| | | | |
Title:
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TRENCH ISOLATION STRUCTURES AND METHODS FOR BIPOLAR JUNCTION TRANSISTORS
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Patent #:
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|
Issue Dt:
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05/26/2015
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Application #:
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14527813
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Filing Dt:
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10/30/2014
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Publication #:
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Pub Dt:
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02/19/2015
| | | | |
Title:
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DEVELOPABLE BOTTOM ANTIREFLECTIVE COATING COMPOSITION AND PATTERN FORMING METHOD USING THEREOF
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Patent #:
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Issue Dt:
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08/09/2016
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Application #:
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14528028
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Filing Dt:
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10/30/2014
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Publication #:
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Pub Dt:
|
03/05/2015
| | | | |
Title:
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TWO MASK PROCESS FOR ELECTROPLATING METAL EMPLOYING A NEGATIVE ELECTROPHORETIC PHOTORESIST
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Patent #:
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Issue Dt:
|
06/07/2016
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Application #:
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14528266
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Filing Dt:
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10/30/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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FINFET AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
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02/21/2017
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Application #:
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14528316
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Filing Dt:
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10/30/2014
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Publication #:
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Pub Dt:
|
04/30/2015
| | | | |
Title:
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LGA SOCKET TERMINAL DAMAGE PREVENTION
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|
Patent #:
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|
Issue Dt:
|
06/30/2015
|
Application #:
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14528388
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Filing Dt:
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10/30/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED PARASITIC CAPACITANCE
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Patent #:
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Issue Dt:
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02/07/2017
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Application #:
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14528435
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Filing Dt:
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10/30/2014
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Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
|
DEVICE ISOLATION WITH IMPROVED THERMAL CONDUCTIVITY
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|
Patent #:
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NONE
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Issue Dt:
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|
Application #:
|
14528466
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Filing Dt:
|
10/30/2014
|
Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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FINFET WITH SELF-ALIGNED PUNCHTHROUGH STOPPER
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Patent #:
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Issue Dt:
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02/23/2016
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Application #:
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14528830
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Filing Dt:
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10/30/2014
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Publication #:
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Pub Dt:
|
03/05/2015
| | | | |
Title:
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DUMMY FIN FORMATION BY GAS CLUSTER ION BEAM
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Patent #:
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|
Issue Dt:
|
08/16/2016
|
Application #:
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14529243
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Filing Dt:
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10/31/2014
|
Publication #:
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|
Pub Dt:
|
03/05/2015
| | | | |
Title:
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ELECTRICALLY CONTROLLED OPTICAL FUSE AND METHOD OF FABRICATION
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|
Patent #:
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|
Issue Dt:
|
10/25/2016
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Application #:
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14529332
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Filing Dt:
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10/31/2014
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Publication #:
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|
Pub Dt:
|
03/05/2015
| | | | |
Title:
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FINFET WITH DIELECTRIC ISOLATION BY SILICON-ON-NOTHING AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
|
11/22/2016
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Application #:
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14529338
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Filing Dt:
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10/31/2014
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Publication #:
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Pub Dt:
|
04/30/2015
| | | | |
Title:
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TECHNIQUES FOR MANAGING SECURITY MODES APPLIED TO APPLICATION PROGRAM EXECUTION
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Patent #:
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Issue Dt:
|
06/06/2017
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Application #:
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14529431
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Filing Dt:
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10/31/2014
|
Publication #:
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Pub Dt:
|
02/26/2015
| | | | |
Title:
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INTERCONNECT STRUCTURE WITH ENHANCED RELIABILITY
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|
Patent #:
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|
Issue Dt:
|
12/22/2015
|
Application #:
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14529825
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Filing Dt:
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10/31/2014
|
Publication #:
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|
Pub Dt:
|
11/26/2015
| | | | |
Title:
|
FINFET WITH DIELECTRIC ISOLATION BY SILICON-ON-NOTHING AND METHOD OF FABRICATION
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|
Patent #:
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|
Issue Dt:
|
07/05/2016
|
Application #:
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14530796
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Filing Dt:
|
11/02/2014
|
Publication #:
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|
Pub Dt:
|
03/05/2015
| | | | |
Title:
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DEVICE STRUCTURE WITH INCREASED CONTACT AREA AND REDUCED GATE CAPACITANCE
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|
Patent #:
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|
Issue Dt:
|
09/13/2016
|
Application #:
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14532122
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Filing Dt:
|
11/04/2014
|
Publication #:
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Pub Dt:
|
03/26/2015
| | | | |
Title:
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Gate-All-Around Nanowire MOSFET and Method of Formation
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|
|
Patent #:
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|
Issue Dt:
|
02/09/2016
|
Application #:
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14532437
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Filing Dt:
|
11/04/2014
|
Publication #:
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|
Pub Dt:
|
03/05/2015
| | | | |
Title:
|
IN-SITU THERMOELECTRIC COOLING
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|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
14533148
|
Filing Dt:
|
11/05/2014
|
Publication #:
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|
Pub Dt:
|
05/05/2016
| | | | |
Title:
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GENERATING AN ELECTROMAGNETIC PARAMETERIZED CELL FOR AN INTEGRATED CIRCUIT DESIGN
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|
Patent #:
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|
Issue Dt:
|
09/06/2016
|
Application #:
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14533154
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Filing Dt:
|
11/05/2014
|
Publication #:
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|
Pub Dt:
|
03/05/2015
| | | | |
Title:
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SEMI-CONDUCTOR DEVICE WITH EPITAXIAL SOURCE/DRAIN FACETTING PROVIDED AT THE GATE EDGE
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14533177
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Filing Dt:
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11/05/2014
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Publication #:
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Pub Dt:
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02/26/2015
| | | | |
Title:
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LOCAL INTERCONNECTS BY METAL-III-V ALLOY WIRING IN SEMI-INSULATING III-V SUBSTRATES
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Patent #:
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Issue Dt:
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02/02/2016
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Application #:
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14533629
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Filing Dt:
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11/05/2014
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Title:
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PATTERNING ASSIST FEATURE TO MITIGATE REACTIVE ION ETCH MICROLOADING EFFECT
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Patent #:
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Issue Dt:
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01/24/2017
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Application #:
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14534205
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Filing Dt:
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11/06/2014
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Publication #:
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Pub Dt:
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05/12/2016
| | | | |
Title:
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DOPED METAL-INSULATOR-TRANSITION LATCH CIRCUITRY
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Patent #:
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Issue Dt:
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10/27/2015
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Application #:
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14537139
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Filing Dt:
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11/10/2014
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Publication #:
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Pub Dt:
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02/26/2015
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Title:
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FINFET STRUCTURE AND METHOD TO ADJUST THRESHOLD VOLTAGE IN A FINFET STRUCTURE
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Patent #:
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Issue Dt:
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10/25/2016
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Application #:
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14537832
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Filing Dt:
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11/10/2014
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Publication #:
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Pub Dt:
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05/12/2016
| | | | |
Title:
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SEMICONDUCTOR JUNCTION FORMATION
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Patent #:
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Issue Dt:
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11/08/2016
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Application #:
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14538170
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Filing Dt:
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11/11/2014
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Publication #:
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Pub Dt:
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04/23/2015
| | | | |
Title:
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FABRICATING PREASSEMBLED OPTOELECTRONIC INTERCONNECT STRUCTURES
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Patent #:
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Issue Dt:
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04/18/2017
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Application #:
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14538401
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Filing Dt:
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11/11/2014
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Publication #:
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Pub Dt:
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03/05/2015
| | | | |
Title:
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SELF-ALIGNED DIELECTRIC ISOLATION FOR FINFET DEVICES
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14540051
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Filing Dt:
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11/13/2014
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Publication #:
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Pub Dt:
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05/19/2016
| | | | |
Title:
|
TALL STRAINED HIGH PERCENTAGE SILICON-GERMANIUM FINS
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Patent #:
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NONE
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Issue Dt:
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Application #:
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14540315
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Filing Dt:
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11/13/2014
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Publication #:
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Pub Dt:
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03/12/2015
| | | | |
Title:
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SPALLING METHODS TO FORM MULTI-JUNCTION PHOTOVOLTAIC STRUCTURE
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Patent #:
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Issue Dt:
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07/21/2015
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Application #:
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14541182
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Filing Dt:
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11/14/2014
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Publication #:
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Pub Dt:
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03/12/2015
| | | | |
Title:
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SEMICONDUCTOR DEVICES HAVING DIFFERENT GATE OXIDE THICKNESSES
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Patent #:
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Issue Dt:
|
11/08/2016
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Application #:
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14541803
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Filing Dt:
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11/14/2014
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Publication #:
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Pub Dt:
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05/19/2016
| | | | |
Title:
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THREE DIMENSIONAL ORGANIC OR GLASS INTERPOSER
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Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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14543456
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Filing Dt:
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11/17/2014
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Publication #:
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Pub Dt:
|
03/19/2015
| | | | |
Title:
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PHOTOVOLTAIC DEVICE USING NANO-SPHERES FOR TEXTURED ELECTRODES
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Patent #:
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Issue Dt:
|
10/20/2015
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Application #:
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14546058
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Filing Dt:
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11/18/2014
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Publication #:
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Pub Dt:
|
03/12/2015
| | | | |
Title:
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HIGH LINEARITY SOI WAFER FOR LOW-DISTORTION CIRCUIT APPLICATIONS
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|
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Patent #:
|
|
Issue Dt:
|
07/24/2018
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Application #:
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14546065
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Filing Dt:
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11/18/2014
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Publication #:
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Pub Dt:
|
05/19/2016
| | | | |
Title:
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INTEGRATED CIRCUIT PERFORMANCE MODELING USING A CONNECTIVITY-BASED CONDENSED RESISTANCE MODEL FOR A CONDUCTIVE STRUCTURE IN AN INTEGRATED CIRCUIT
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Patent #:
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|
Issue Dt:
|
11/26/2019
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Application #:
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14546318
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Filing Dt:
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11/18/2014
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Publication #:
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Pub Dt:
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05/19/2016
| | | | |
Title:
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SCOPED SEARCH ENGINE
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|
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Patent #:
|
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Issue Dt:
|
09/20/2016
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Application #:
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14546554
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Filing Dt:
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11/18/2014
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Publication #:
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Pub Dt:
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03/12/2015
| | | | |
Title:
|
DYNAMIC RECONFIGURATION-SWITCHING OF WINDINGS IN AN ELECTRIC MOTOR
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|
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Patent #:
|
|
Issue Dt:
|
07/21/2015
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Application #:
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14547504
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Filing Dt:
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11/19/2014
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Publication #:
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|
Pub Dt:
|
06/18/2015
| | | | |
Title:
|
TAPE SERVO TRACK WRITE COMPENSATION
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|
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Patent #:
|
|
Issue Dt:
|
10/11/2016
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Application #:
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14548929
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Filing Dt:
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11/20/2014
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Publication #:
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|
Pub Dt:
|
05/26/2016
| | | | |
Title:
|
FORWARD ERROR CORRECTION SYNCHRONIZATION
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|
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Patent #:
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NONE
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Issue Dt:
|
|
Application #:
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14549846
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Filing Dt:
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11/21/2014
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Publication #:
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Pub Dt:
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05/26/2016
| | | | |
Title:
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NON-CONTIGUOUS DUMMY STRUCTURE SURROUNDING THROUGH-SUBSTRATE VIA NEAR INTEGRATED CIRCUIT WIRES
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Patent #:
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|
Issue Dt:
|
06/23/2015
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Application #:
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14551693
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Filing Dt:
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11/24/2014
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Publication #:
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Pub Dt:
|
04/16/2015
| | | | |
Title:
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SEMICONDUCTOR DEVICE RELIABILITY MODEL AND METHODOLOGIES FOR USE THEREOF
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|
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Patent #:
|
|
Issue Dt:
|
06/28/2016
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Application #:
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14552782
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Filing Dt:
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11/25/2014
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Publication #:
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Pub Dt:
|
03/19/2015
| | | | |
Title:
|
MODELING MULTI-PATTERNING VARIABILITY WITH STATISTICAL TIMING
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|
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Patent #:
|
|
Issue Dt:
|
07/21/2015
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Application #:
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14552791
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Filing Dt:
|
11/25/2014
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Publication #:
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Pub Dt:
|
03/19/2015
| | | | |
Title:
|
MULTICHIP MODULE WITH STIFFENING FRAME AND ASSOCIATED COVERS
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|
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Patent #:
|
|
Issue Dt:
|
08/08/2017
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Application #:
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14553203
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Filing Dt:
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11/25/2014
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Publication #:
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Pub Dt:
|
05/26/2016
| | | | |
Title:
|
MICROBOLOMETER DEVICES IN CMOS AND BiCMOS TECHNOLOGIES
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|
|
Patent #:
|
NONE
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Issue Dt:
|
|
Application #:
|
14553932
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Filing Dt:
|
11/25/2014
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Publication #:
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|
Pub Dt:
|
03/19/2015
| | | | |
Title:
|
DATA WRITING METHOD AND PROGRAM FOR TAPE DRIVE
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|
|
Patent #:
|
|
Issue Dt:
|
02/16/2016
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Application #:
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14554643
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Filing Dt:
|
11/26/2014
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Publication #:
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Pub Dt:
|
04/30/2015
| | | | |
Title:
|
SELF-PROTECTED METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR
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|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
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Application #:
|
14554766
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Filing Dt:
|
11/26/2014
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Publication #:
|
|
Pub Dt:
|
03/26/2015
| | | | |
Title:
|
TUNNEL FIELD-EFFECT TRANSISTORS WITH A GATE-SWING BROKEN-GAP HETEROSTRUCTURE
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Patent #:
|
|
Issue Dt:
|
06/23/2015
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Application #:
|
14556200
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Filing Dt:
|
11/30/2014
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Publication #:
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Pub Dt:
|
05/07/2015
| | | | |
Title:
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FLEXIBLE, STRETCHABLE ELECTRONIC DEVICES
|
|
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Patent #:
|
|
Issue Dt:
|
08/30/2016
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Application #:
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14557541
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Filing Dt:
|
12/02/2014
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Publication #:
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Pub Dt:
|
06/02/2016
| | | | |
Title:
|
ASYMMETRIC FIELD EFFECT TRANSISTOR CAP LAYER
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|
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Patent #:
|
|
Issue Dt:
|
06/23/2015
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Application #:
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14557578
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Filing Dt:
|
12/02/2014
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Title:
|
MODELING CHARGE DISTRIBUTION ON FINFET SIDEWALLS
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|
|
Patent #:
|
|
Issue Dt:
|
06/07/2016
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Application #:
|
14557759
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Filing Dt:
|
12/02/2014
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Publication #:
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|
Pub Dt:
|
03/26/2015
| | | | |
Title:
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PREDICTIVE FETCHING AND DECODING FOR SELECTED RETURN INSTRUCTIONS
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|
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Patent #:
|
|
Issue Dt:
|
01/10/2017
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Application #:
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14557819
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Filing Dt:
|
12/02/2014
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Publication #:
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Pub Dt:
|
06/02/2016
| | | | |
Title:
|
VOID MONITORING DEVICE FOR MEASUREMENT OF WAFER TEMPERATURE VARIATIONS
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|
|
Patent #:
|
|
Issue Dt:
|
02/13/2018
|
Application #:
|
14558037
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Filing Dt:
|
12/02/2014
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Publication #:
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Pub Dt:
|
06/02/2016
| | | | |
Title:
|
CONTACT MODULE FOR OPTIMIZING EMITTER AND CONTACT RESISTANCE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/17/2017
|
Application #:
|
14558411
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Filing Dt:
|
12/02/2014
|
Publication #:
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|
Pub Dt:
|
06/02/2016
| | | | |
Title:
|
3D Multipath Inductor
|
|
|
Patent #:
|
|
Issue Dt:
|
02/02/2016
|
Application #:
|
14558591
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Filing Dt:
|
12/02/2014
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Publication #:
|
|
Pub Dt:
|
03/26/2015
| | | | |
Title:
|
TAPE HEADER PROTECTION SCHEME FOR USE IN A TAPE STORAGE SUBSYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2016
|
Application #:
|
14558782
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Filing Dt:
|
12/03/2014
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Publication #:
|
|
Pub Dt:
|
06/09/2016
| | | | |
Title:
|
CHIP CARRIER WITH DUAL-SIDED CHIP ACCESS AND A METHOD FOR TESTING A CHIP USING THE CHIP CARRIER
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/2017
|
Application #:
|
14558904
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Filing Dt:
|
12/03/2014
|
Publication #:
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|
Pub Dt:
|
05/21/2015
| | | | |
Title:
|
SEMICONDUCTOR DEVICE WITH A LOW-K SPACER AND METHOD OF FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/2017
|
Application #:
|
14559087
|
Filing Dt:
|
12/03/2014
|
Publication #:
|
|
Pub Dt:
|
03/26/2015
| | | | |
Title:
|
PREDICTOR DATA STRUCTURE FOR USE IN PIPELINED PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
06/06/2017
|
Application #:
|
14559951
|
Filing Dt:
|
12/04/2014
|
Publication #:
|
|
Pub Dt:
|
05/28/2015
| | | | |
Title:
|
FIELD EFFECT TRANSISTORS WITH VARYING THRESHOLD VOLTAGES
|
|
|
Patent #:
|
|
Issue Dt:
|
11/01/2016
|
Application #:
|
14560518
|
Filing Dt:
|
12/04/2014
|
Publication #:
|
|
Pub Dt:
|
06/09/2016
| | | | |
Title:
|
MEASURING SEMICONDUCTOR DEVICE FEATURES USING STEPWISE OPTICAL METROLOGY
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
|
Application #:
|
14561134
|
Filing Dt:
|
12/04/2014
|
Publication #:
|
|
Pub Dt:
|
04/02/2015
| | | | |
Title:
|
METHODS FOR BIASING ELECTRICALLY BIASABLE STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2016
|
Application #:
|
14561395
|
Filing Dt:
|
12/05/2014
|
Title:
|
EPITAXIALLY GROWN SILICON GERMANIUM CHANNEL FINFET WITH SILICON UNDERLAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
03/14/2017
|
Application #:
|
14561632
|
Filing Dt:
|
12/05/2014
|
Publication #:
|
|
Pub Dt:
|
01/21/2016
| | | | |
Title:
|
FINFET SOURCE-DRAIN MERGED BY SILICIDE-BASED MATERIAL
|
|