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Reel/Frame:	036779/0001			Pages:	985
		Recorded:	10/05/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14854
Page 21 of 149
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Patent #:	6656809	Issue Dt:	12/02/2003	Application #:	10047975	Filing Dt:	01/15/2002
Publication #:	US20030132453	Pub Dt:	07/17/2003
Title:	METHOD TO FABRICATE SIGE HBTS WITH CONTROLLED CURRENT GAIN AND IMPROVED BREAKDOWN VOLTAGE CHARACTERISTICS

Patent #:	6638374	Issue Dt:	10/28/2003	Application #:	10050285	Filing Dt:	01/16/2002
Publication #:	US20020129879	Pub Dt:	09/19/2002
Title:	DEVICE PRODUCED BY A PROCESS OF CONTROLLING GRAIN GROWTH IN METAL FILMS

Patent #:	6743268	Issue Dt:	06/01/2004	Application #:	10051135	Filing Dt:	01/18/2002
Publication #:	US20020066234	Pub Dt:	06/06/2002
Title:	CHEMICAL-MECHANICAL PLANARIZATION OF BARRIERS OR LINERS FOR COPPER METALLURGY

Patent #:	NONE	Issue Dt:		Application #:	10052451	Filing Dt:	01/18/2002
Publication #:	US20020096768	Pub Dt:	07/25/2002
Title:	Soft metal conductor and method of making

Patent #:	6459160	Issue Dt:	10/01/2002	Application #:	10054099	Filing Dt:	01/22/2002
Publication #:	US20020090761	Pub Dt:	07/11/2002
Title:	PACKAGE WITH LOW STRESS HERMETIC SEAL

Patent #:	6744338	Issue Dt:	06/01/2004	Application #:	10054409	Filing Dt:	11/13/2001
Publication #:	US20030090346	Pub Dt:	05/15/2003
Title:	RESONANT OPERATION OF MEMS SWITCH

Patent #:	NONE	Issue Dt:		Application #:	10054605	Filing Dt:	11/13/2001
Publication #:	US20020098681	Pub Dt:	07/25/2002
Title:	Reduced electromigration and stressed induced migration of Cu wires by surface coating

Patent #:	6979393	Issue Dt:	12/27/2005	Application #:	10055134	Filing Dt:	01/22/2002
Publication #:	US20020066673	Pub Dt:	06/06/2002
Title:	METHOD FOR PLATING COPPER CONDUCTORS AND DEVICES FORMED

Patent #:	6805962	Issue Dt:	10/19/2004	Application #:	10055138	Filing Dt:	01/23/2002
Publication #:	US20030139000	Pub Dt:	07/24/2003
Title:	METHOD OF CREATING HIGH-QUALITY RELAXED SIGE-ON-INSULATOR FOR STRAINED SI CMOS APPLICATIONS

Patent #:	6495429	Issue Dt:	12/17/2002	Application #:	10055139	Filing Dt:	01/23/2002
Title:	CONTROLLING INTERNAL THERMAL OXIDATION AND ELIMINATING DEEP DIVOTS IN SIMOX BY CHLORINE-BASED ANNEALING

Patent #:	6968489	Issue Dt:	11/22/2005	Application #:	10055275	Filing Dt:	01/23/2002
Publication #:	US20030140293	Pub Dt:	07/24/2003
Title:	PSEUDO RANDOM OPTIMIZED BUILT-IN SELF-TEST

Patent #:	6525427	Issue Dt:	02/25/2003	Application #:	10055704	Filing Dt:	01/22/2002
Publication #:	US20020066919	Pub Dt:	06/06/2002
Title:	BEOL DECOUPLING CAPACITOR

Patent #:	6682872	Issue Dt:	01/27/2004	Application #:	10056245	Filing Dt:	01/22/2002
Publication #:	US20030138733	Pub Dt:	07/24/2003
Title:	UV-CURABLE COMPOSITIONS AND METHOD OF USE THEREOF IN MICROELECTRONICS

Patent #:	6599623	Issue Dt:	07/29/2003	Application #:	10056531	Filing Dt:	01/24/2002
Publication #:	US20020094438	Pub Dt:	07/18/2002
Title:	NANOPARTICLES FORMED WITH RIGID CONNECTOR COMPOUNDS

Patent #:	6825358	Issue Dt:	11/30/2004	Application #:	10057024	Filing Dt:	01/25/2002
Publication #:	US20020072618	Pub Dt:	06/13/2002
Title:	SYNTHESIS OF SOLUBLE DERIVATIVES OF SEXITHIOPHENE AND THEIR USE AS THE SEMICONDUCTING CHANNELS IN THIN-FILM FIELD-EFFECT TRANSISTORS

Patent #:	6744132	Issue Dt:	06/01/2004	Application #:	10058999	Filing Dt:	01/29/2002
Publication #:	US20030141586	Pub Dt:	07/31/2003
Title:	MODULE WITH ADHESIVELY ATTACHED HEAT SINK

Patent #:	6933566	Issue Dt:	08/23/2005	Application #:	10059422	Filing Dt:	01/31/2002
Publication #:	US20030008521	Pub Dt:	01/09/2003
Title:	METHOD OF FORMING LATTICE-MATCHED STRUCTURE ON SILICON AND STRUCTURE FORMED THEREBY

Patent #:	6620029	Issue Dt:	09/16/2003	Application #:	10059775	Filing Dt:	01/30/2002
Publication #:	US20030143930	Pub Dt:	07/31/2003
Title:	APPARATUS AND METHOD FOR FRONT SIDE CHEMICAL MECHANICAL PLANARIZATION (CMP) OF SEMICONDUCTOR WORKPIECES

Patent #:	6650561	Issue Dt:	11/18/2003	Application #:	10059863	Filing Dt:	01/30/2002
Publication #:	US20030142525	Pub Dt:	07/31/2003
Title:	HIGH RELIABILITY CONTENT-ADDRESSABLE MEMORY USING SHADOW CONTENT-ADDRESSABLE MEMORY

Patent #:	NONE	Issue Dt:		Application #:	10060750	Filing Dt:	01/30/2002
Publication #:	US20030145290	Pub Dt:	07/31/2003
Title:	SYSTEM FOR CONTROLLING EXTERNAL MODELS USED FOR VERIFICATION OF SYSTEM ON A CHIP (SOC) INTERFACES

Patent #:	6677645	Issue Dt:	01/13/2004	Application #:	10061263	Filing Dt:	01/31/2002
Publication #:	US20030141543	Pub Dt:	07/31/2003
Title:	BODY CONTACT MOSFET

Patent #:	6775736	Issue Dt:	08/10/2004	Application #:	10062812	Filing Dt:	01/31/2002
Publication #:	US20030145158	Pub Dt:	07/31/2003
Title:	EMBEDDED DRAM SYSTEM HAVING WIDE DATA BANDWIDTH AND DATA TRANSFER DATA PROTOCOL

Patent #:	6778447	Issue Dt:	08/17/2004	Application #:	10062972	Filing Dt:	01/31/2002
Publication #:	US20030142558	Pub Dt:	07/31/2003
Title:	EMBEDDED DRAM SYSTEM HAVING WIDE DATA BANDWIDTH AND DATA TRANSFER DATA PROTOCOL

Patent #:	6877048	Issue Dt:	04/05/2005	Application #:	10063018	Filing Dt:	03/12/2002
Publication #:	US20030177293	Pub Dt:	09/18/2003
Title:	DYNAMIC MEMORY ALLOCATION BETWEEN INBOUND AND OUTBOUND BUFFERS IN A PROTOCOL HANDLER

Patent #:	6878976	Issue Dt:	04/12/2005	Application #:	10063025	Filing Dt:	03/13/2002
Publication #:	US20030173580	Pub Dt:	09/18/2003
Title:	CARBON-MODULATED BREAKDOWN VOLTAGE SIGE TRANSISTOR FOR LOW VOLTAGE TRIGGER ESD APPLICATIONS

Patent #:	6657252	Issue Dt:	12/02/2003	Application #:	10063095	Filing Dt:	03/19/2002
Publication #:	US20030178670	Pub Dt:	09/25/2003
Title:	FINFET CMOS WITH NVRAM CAPABILITY

Patent #:	NONE	Issue Dt:		Application #:	10063142	Filing Dt:	03/25/2002
Publication #:	US20030182639	Pub Dt:	09/25/2003
Title:	Circuit simulator system and method

Patent #:	6778419	Issue Dt:	08/17/2004	Application #:	10063212	Filing Dt:	03/29/2002
Publication #:	US20030185035	Pub Dt:	10/02/2003
Title:	COMPLEMENTARY TWO TRANSISTOR ROM CELL

Patent #:	NONE	Issue Dt:		Application #:	10063214	Filing Dt:	03/29/2002
Publication #:	US20030188267	Pub Dt:	10/02/2003
Title:	Circuit and method for modeling I/O

Patent #:	6731488	Issue Dt:	05/04/2004	Application #:	10063225	Filing Dt:	04/01/2002
Publication #:	US20030184943	Pub Dt:	10/02/2003
Title:	DUAL EMITTER TRANSISTOR WITH ESD PROTECTION

Patent #:	6750487	Issue Dt:	06/15/2004	Application #:	10063323	Filing Dt:	04/11/2002
Publication #:	US20030193065	Pub Dt:	10/16/2003
Title:	DUAL DOUBLE GATE TRANSISTOR AND METHOD FOR FORMING

Patent #:	6697293	Issue Dt:	02/24/2004	Application #:	10063329	Filing Dt:	04/12/2002
Publication #:	US20030193828	Pub Dt:	10/16/2003
Title:	LOCALIZED DIRECT SENSE ARCHITECTURE

Patent #:	6664582	Issue Dt:	12/16/2003	Application #:	10063330	Filing Dt:	04/12/2002
Publication #:	US20030197194	Pub Dt:	10/23/2003
Title:	FIN MEMORY CELL AND METHOD OF FABRICATION

Patent #:	6995412	Issue Dt:	02/07/2006	Application #:	10063331	Filing Dt:	04/12/2002
Publication #:	US20030193058	Pub Dt:	10/16/2003
Title:	INTEGRATED CIRCUIT WITH CAPACITORS HAVING A FIN STRUCTURE

Patent #:	6794726	Issue Dt:	09/21/2004	Application #:	10063376	Filing Dt:	04/17/2002
Publication #:	US20030201514	Pub Dt:	10/30/2003
Title:	MOS ANTIFUSE WITH LOW POST-PROGRAM RESISTANCE

Patent #:	6990644	Issue Dt:	01/24/2006	Application #:	10063394	Filing Dt:	04/18/2002
Publication #:	US20030197534	Pub Dt:	10/23/2003
Title:	ON CHIP TIMING ADJUSTMENT IN MULTI-CHANNEL FAST DATA TRANSFER

Patent #:	6667205	Issue Dt:	12/23/2003	Application #:	10063406	Filing Dt:	04/19/2002
Publication #:	US20030197227	Pub Dt:	10/23/2003
Title:	METHOD OF FORMING RETROGRADE N-WELL AND P-WELL

Patent #:	6823496	Issue Dt:	11/23/2004	Application #:	10063427	Filing Dt:	04/23/2002
Publication #:	US20030200513	Pub Dt:	10/23/2003
Title:	PHYSICAL DESIGN CHARACTERIZATION SYSTEM

Patent #:	7308621	Issue Dt:	12/11/2007	Application #:	10063495	Filing Dt:	04/30/2002
Publication #:	US20030204795	Pub Dt:	10/30/2003
Title:	TESTING OF ECC MEMORIES

Patent #:	7149941	Issue Dt:	12/12/2006	Application #:	10063497	Filing Dt:	04/30/2002
Publication #:	US20030204798	Pub Dt:	10/30/2003
Title:	OPTIMIZED ECC/REDUNDANCY FAULT RECOVERY

Patent #:	6731154	Issue Dt:	05/04/2004	Application #:	10063504	Filing Dt:	05/01/2002
Publication #:	US20030206051	Pub Dt:	11/06/2003
Title:	GLOBAL VOLTAGE BUFFER FOR VOLTAGE ISLANDS

Patent #:	6904584	Issue Dt:	06/07/2005	Application #:	10063633	Filing Dt:	05/06/2002
Publication #:	US20030208737	Pub Dt:	11/06/2003
Title:	METHOD AND SYSTEM FOR PLACING LOGIC NODES BASED ON AN ESTIMATED WIRING CONGESTION

Patent #:	NONE	Issue Dt:		Application #:	10063837	Filing Dt:	05/17/2002
Publication #:	US20030217338	Pub Dt:	11/20/2003
Title:	Congestion mitigation with logic order preservation

Patent #:	6774019	Issue Dt:	08/10/2004	Application #:	10063846	Filing Dt:	05/17/2002
Publication #:	US20030213433	Pub Dt:	11/20/2003
Title:	INCORPORATION OF AN IMPURITY INTO A THIN FILM

Patent #:	6762918	Issue Dt:	07/13/2004	Application #:	10063858	Filing Dt:	05/20/2002
Publication #:	US20030213978	Pub Dt:	11/20/2003
Title:	FAULT FREE FUSE NETWORK

Patent #:	7020857	Issue Dt:	03/28/2006	Application #:	10063859	Filing Dt:	05/20/2002
Publication #:	US20030214348	Pub Dt:	11/20/2003
Title:	METHOD AND APPARATUS FOR PROVIDING NOISE SUPPRESSION IN AN INTEGRATED CIRCUIT

Patent #:	6642090	Issue Dt:	11/04/2003	Application #:	10063994	Filing Dt:	06/03/2002
Title:	FIN FET DEVICES FROM BULK SEMICONDUCTOR AND METHOD FOR FORMING

Patent #:	6815751	Issue Dt:	11/09/2004	Application #:	10064301	Filing Dt:	07/01/2002
Publication #:	US20040000685	Pub Dt:	01/01/2004
Title:	STRUCTURE FOR SCALABLE, LOW-COST POLYSILICON DRAM IN A PLANAR CAPAACITOR

Patent #:	6639242	Issue Dt:	10/28/2003	Application #:	10064303	Filing Dt:	07/01/2002
Title:	MONOLITHICALLY INTEGRATED SOLID-STATE SIGE THERMOELECTRIC ENERGY CONVERTER FOR HIGH SPEED AND LOW POWER CIRCUITS

Patent #:	6711078	Issue Dt:	03/23/2004	Application #:	10064306	Filing Dt:	07/01/2002
Publication #:	US20040001382	Pub Dt:	01/01/2004
Title:	WRITEBACK AND REFRESH CIRCUITRY FOR DIRECT SENSED DRAM MACRO

Patent #:	6660596	Issue Dt:	12/09/2003	Application #:	10064318	Filing Dt:	07/02/2002
Publication #:	US20020153587	Pub Dt:	10/24/2002
Title:	DOUBLE PLANAR GATED SOI MOSFET STRUCTURE

Patent #:	6753590	Issue Dt:	06/22/2004	Application #:	10064375	Filing Dt:	07/08/2002
Publication #:	US20040004269	Pub Dt:	01/08/2004
Title:	HIGH IMPEDANCE ANTIFUSE

Patent #:	NONE	Issue Dt:		Application #:	10064376	Filing Dt:	07/08/2002
Publication #:	US20040004268	Pub Dt:	01/08/2004
Title:	E-Fuse and anti-E-Fuse device structures and methods

Patent #:	6835502	Issue Dt:	12/28/2004	Application #:	10064442	Filing Dt:	07/15/2002
Publication #:	US20040009411	Pub Dt:	01/15/2004
Title:	IN-SITU PELLICLE MONITOR

Patent #:	7381276	Issue Dt:	06/03/2008	Application #:	10064451	Filing Dt:	07/16/2002
Publication #:	US20040011293	Pub Dt:	01/22/2004
Title:	SUSCEPTOR POCKET WITH BEVELED PROJECTION SIDEWALL

Patent #:	6869854	Issue Dt:	03/22/2005	Application #:	10064476	Filing Dt:	07/18/2002
Publication #:	US20040014271	Pub Dt:	01/22/2004
Title:	DIFFUSED EXTRINSIC BASE AND METHOD FOR FABRICATION

Patent #:	7136798	Issue Dt:	11/14/2006	Application #:	10064486	Filing Dt:	07/19/2002
Publication #:	US20040015334	Pub Dt:	01/22/2004
Title:	METHOD AND APPARATUS TO MANAGE MULTI-COMPUTER DEMAND

Patent #:	6794706	Issue Dt:	09/21/2004	Application #:	10064493	Filing Dt:	07/22/2002
Publication #:	US20040012046	Pub Dt:	01/22/2004
Title:	APPLICATIONS OF SPACE-CHARGE-LIMITED CONDUCTION INDUCED CURRENT INCREASE IN NITRIDE-OXIDE DIELECTRIC CAPACITORS: VOLTAGE REGULATOR FOR POWER SUPPLY SYSTEM AND OTHERS

Patent #:	6819967	Issue Dt:	11/16/2004	Application #:	10064531	Filing Dt:	07/24/2002
Publication #:	US20040019604	Pub Dt:	01/29/2004
Title:	RELATIONAL DATABASE FOR PRODUCING BILL-OF-MATERIALS FROM PLANNING INFORMATION

Patent #:	6674673	Issue Dt:	01/06/2004	Application #:	10064867	Filing Dt:	08/26/2002
Title:	COLUMN REDUNDANCY SYSTEM AND METHOD FOR A MICRO-CELL EMBEDDED DRAM (E-DRAM) ARCHITECTURE

Patent #:	7005221	Issue Dt:	02/28/2006	Application #:	10064920	Filing Dt:	08/29/2002
Publication #:	US20040043198	Pub Dt:	03/04/2004
Title:	METHOD AND APPARATUS TO EASILY MEASURE RETICLE BLIND POSITIONING WITH AN EXPOSURE APPARATUS

Patent #:	6794901	Issue Dt:	09/21/2004	Application #:	10064921	Filing Dt:	08/29/2002
Publication #:	US20040041590	Pub Dt:	03/04/2004
Title:	APPARATUS FOR REDUCING SOFT ERRORS IN DYNAMIC CIRCUITS

Patent #:	6820240	Issue Dt:	11/16/2004	Application #:	10065201	Filing Dt:	09/25/2002
Publication #:	US20040060023	Pub Dt:	03/25/2004
Title:	VOLTAGE ISLAND CHIP IMPLEMENTATION

Patent #:	6577548	Issue Dt:	06/10/2003	Application #:	10065223	Filing Dt:	09/26/2002
Title:	SELF TIMING INTERLOCK CIRCUIT FOR EMBEDDED DRAM

Patent #:	7010733	Issue Dt:	03/07/2006	Application #:	10065365	Filing Dt:	10/09/2002
Publication #:	US20040073856	Pub Dt:	04/15/2004
Title:	PARAMETRIC TESTING FOR HIGH PIN COUNT ASIC

Patent #:	6930506	Issue Dt:	08/16/2005	Application #:	10065475	Filing Dt:	10/22/2002
Publication #:	US20040075463	Pub Dt:	04/22/2004
Title:	TERMINATING RESISTOR DRIVER FOR HIGH SPEED DATA COMMUNICATION

Patent #:	7103814	Issue Dt:	09/05/2006	Application #:	10065503	Filing Dt:	10/25/2002
Publication #:	US20040083412	Pub Dt:	04/29/2004
Title:	TESTING LOGIC AND EMBEDDED MEMORY IN PARALLEL

Patent #:	7110930	Issue Dt:	09/19/2006	Application #:	10065753	Filing Dt:	11/15/2002
Publication #:	US20040098238	Pub Dt:	05/20/2004
Title:	INTEGRATED CIRCUIT AND PACKAGE MODELING

Patent #:	6854041	Issue Dt:	02/08/2005	Application #:	10065839	Filing Dt:	11/25/2002
Publication #:	US20040100851	Pub Dt:	05/27/2004
Title:	DRAM-BASED SEPARATE I/O MEMORY SOLUTION FOR COMMUNICATION APPLICATIONS

Patent #:	NONE	Issue Dt:		Application #:	10065843	Filing Dt:	11/25/2002
Publication #:	US20030146492	Pub Dt:	08/07/2003
Title:	Nitride etchstop film to protect metal-insulator-metal capacitor dielectric from degradation and method for making same

Patent #:	6734047	Issue Dt:	05/11/2004	Application #:	10065884	Filing Dt:	11/27/2002
Title:	THINNING OF FUSE PASSIVATION AFTER C4 FORMATION

Patent #:	6827868	Issue Dt:	12/07/2004	Application #:	10065885	Filing Dt:	11/27/2002
Publication #:	US20040099632	Pub Dt:	05/27/2004
Title:	THINNING OF FUSE PASSIVATION AFTER C4 FORMATION

Patent #:	7067220	Issue Dt:	06/27/2006	Application #:	10065963	Filing Dt:	12/04/2002
Publication #:	US20040110069	Pub Dt:	06/10/2004
Title:	PATTERN COMPENSATION TECHNIQUES FOR CHARGED PARTICLE LITHOGRAPHIC MASKS

Patent #:	8486250	Issue Dt:	07/16/2013	Application #:	10066171	Filing Dt:	02/01/2002
Publication #:	US20020089344	Pub Dt:	07/11/2002
Title:	ELECTRODEPOSITION METHOD OF FORMING A PROBE STRUCTURE HAVING A PLURALITY OF DISCRETE INSULATED PROBE TIPS PROJECTING FROM A SUPPORT SURFACE

Patent #:	6562642	Issue Dt:	05/13/2003	Application #:	10072330	Filing Dt:	02/07/2002
Title:	MICRO-STRUCTURES AND METHODS FOR THEIR MANUFACTURE

Patent #:	7061821	Issue Dt:	06/13/2006	Application #:	10072346	Filing Dt:	02/06/2002
Publication #:	US20020108013	Pub Dt:	08/08/2002
Title:	ADDRESS WRAP FUNCTION FOR ADDRESSABLE MEMORY DEVICES

Patent #:	6774647	Issue Dt:	08/10/2004	Application #:	10072486	Filing Dt:	02/07/2002
Publication #:	US20030146768	Pub Dt:	08/07/2003
Title:	NONINVASIVE OPTICAL METHOD AND SYSTEM FOR INSPECTING OR TESTING CMOS CIRCUITS

Patent #:	7392515	Issue Dt:	06/24/2008	Application #:	10073630	Filing Dt:	02/11/2002
Publication #:	US20020154551	Pub Dt:	10/24/2002
Title:	PROGRAM COMPONENTS HAVING MULTIPLE SELECTABLE IMPLEMENTATIONS

Patent #:	6740600	Issue Dt:	05/25/2004	Application #:	10073695	Filing Dt:	02/11/2002
Publication #:	US20020166839	Pub Dt:	11/14/2002
Title:	ENHANCED INTERFACE THERMOELECTRIC COOLERS WITH ALL-METAL TIPS

Patent #:	6897650	Issue Dt:	05/24/2005	Application #:	10073755	Filing Dt:	02/11/2002
Publication #:	US20030151407	Pub Dt:	08/14/2003
Title:	MAGNETIC-FIELD SENSOR DEVICE

Patent #:	6650010	Issue Dt:	11/18/2003	Application #:	10078174	Filing Dt:	02/15/2002
Publication #:	US20030155642	Pub Dt:	08/21/2003
Title:	UNIQUE FEATURE DESIGN ENABLING STRUCTURAL INTEGRITY FOR ADVANCED LOW K SEMICONDUCTOR CHIPS

Patent #:	6562713	Issue Dt:	05/13/2003	Application #:	10078779	Filing Dt:	02/19/2002
Title:	METHOD OF PROTECTING SEMICONDUCTOR AREAS WHILE EXPOSING A GATE

Patent #:	6734090	Issue Dt:	05/11/2004	Application #:	10078861	Filing Dt:	02/20/2002
Publication #:	US20030157794	Pub Dt:	08/21/2003
Title:	METHOD OF MAKING AN EDGE SEAL FOR A SEMICONDUCTOR DEVICE

Patent #:	NONE	Issue Dt:		Application #:	10078875	Filing Dt:	02/20/2002
Publication #:	US20030155655	Pub Dt:	08/21/2003
Title:	Integrated, active, moisture and oxygen getter layers

Patent #:	6622907	Issue Dt:	09/23/2003	Application #:	10078948	Filing Dt:	02/19/2002
Publication #:	US20030155408	Pub Dt:	08/21/2003
Title:	SACRIFICIAL SEED LAYER PROCESS FOR FORMING C4 SOLDER BUMPS

Patent #:	6620635	Issue Dt:	09/16/2003	Application #:	10079092	Filing Dt:	02/20/2002
Publication #:	US20030155570	Pub Dt:	08/21/2003
Title:	Method of measuring the width of a damascene resistor

Patent #:	7261992	Issue Dt:	08/28/2007	Application #:	10079289	Filing Dt:	02/19/2002
Publication #:	US20020090572	Pub Dt:	07/11/2002
Title:	FLUORINATED SILSESQUIOXANE POLYMERS AND USE THEREOF IN LITHOGRAPHIC PHOTORESIST COMPOSITIONS

Patent #:	6815838	Issue Dt:	11/09/2004	Application #:	10079333	Filing Dt:	02/20/2002
Publication #:	US20030156289	Pub Dt:	08/21/2003
Title:	LASER ALIGNMENT TARGET AND METHOD

Patent #:	6610585	Issue Dt:	08/26/2003	Application #:	10083062	Filing Dt:	02/26/2002
Publication #:	US20030162374	Pub Dt:	08/28/2003
Title:	METHOD FOR FORMING A RETROGRADE IMPLANT

Patent #:	6660598	Issue Dt:	12/09/2003	Application #:	10084550	Filing Dt:	02/26/2002
Publication #:	US20030162358	Pub Dt:	08/28/2003
Title:	METHOD OF FORMING A FULLY-DEPLETED SOI (SILICON-ON-INSULATOR) MOSFET HAVING A THINNED CHANNEL REGION

Patent #:	6893523	Issue Dt:	05/17/2005	Application #:	10085313	Filing Dt:	02/28/2002
Publication #:	US20020079048	Pub Dt:	06/27/2002
Title:	METHOD FOR BONDING HEAT SINKS TO OVERMOLD MATERIAL

Patent #:	6975580	Issue Dt:	12/13/2005	Application #:	10090589	Filing Dt:	02/28/2002
Publication #:	US20030123335	Pub Dt:	07/03/2003
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100

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Assignors

GLOBALFOUNDRIES U.S. 2 LLC

Exec Dt:

09/10/2015

GLOBALFOUNDRIES U.S. INC.

Exec Dt:

09/10/2015

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309

UGLAND HOUSE

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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