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Reel/Frame:	036779/0001			Pages:	985
		Recorded:	10/05/2015
Attorney Dkt #:	3718.266
Conveyance:	ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 14854
Page 53 of 149
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Patent #:	NONE	Issue Dt:		Application #:	11619475	Filing Dt:	01/03/2007
Publication #:	US20070103141	Pub Dt:	05/10/2007
Title:	DUTY CYCLE MEASURMENT CIRCUIT FOR MEASURING AND MAINTAINING BALANCED CLOCK DUTY CYCLE

Patent #:	7396758	Issue Dt:	07/08/2008	Application #:	11619502	Filing Dt:	01/03/2007
Publication #:	US20070111509	Pub Dt:	05/17/2007
Title:	POLYCARBOSILANE BURIED ETCH STOPS IN INTERCONNECT STRUCTURES

Patent #:	7808081	Issue Dt:	10/05/2010	Application #:	11619511	Filing Dt:	01/03/2007
Publication #:	US20070111417	Pub Dt:	05/17/2007
Title:	STRAINED-SILICON CMOS DEVICE AND METHOD

Patent #:	7803639	Issue Dt:	09/28/2010	Application #:	11619623	Filing Dt:	01/04/2007
Publication #:	US20080164617	Pub Dt:	07/10/2008
Title:	METHOD OF FORMING VERTICAL CONTACTS IN INTEGRATED CIRCUITS

Patent #:	7616113	Issue Dt:	11/10/2009	Application #:	11619637	Filing Dt:	01/04/2007
Publication #:	US20080165058	Pub Dt:	07/10/2008
Title:	SPATIALLY LOCATING RFID TAGS USING MULTIPLE READERS AND CORRECTION FACTORS

Patent #:	7689947	Issue Dt:	03/30/2010	Application #:	11619691	Filing Dt:	01/04/2007
Publication #:	US20080164908	Pub Dt:	07/10/2008
Title:	DATA-DRIVEN FINITE STATE MACHINE ENGINE FOR FLOW CONTROL

Patent #:	7470613	Issue Dt:	12/30/2008	Application #:	11619748	Filing Dt:	01/04/2007
Publication #:	US20070111510	Pub Dt:	05/17/2007
Title:	DUAL DAMASCENE MULTI-LEVEL METALLIZATION

Patent #:	8217423	Issue Dt:	07/10/2012	Application #:	11619809	Filing Dt:	01/04/2007
Publication #:	US20080164491	Pub Dt:	07/10/2008
Title:	STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED SILICIDE

Patent #:	7694719	Issue Dt:	04/13/2010	Application #:	11619928	Filing Dt:	01/04/2007
Publication #:	US20080165502	Pub Dt:	07/10/2008
Title:	PATTERNED METAL THERMAL INTERFACE

Patent #:	8426967	Issue Dt:	04/23/2013	Application #:	11620138	Filing Dt:	01/05/2007
Publication #:	US20080164452	Pub Dt:	07/10/2008
Title:	SCALED-DOWN PHASE CHANGE MEMORY CELL IN RECESSED HEATER

Patent #:	7785982	Issue Dt:	08/31/2010	Application #:	11620224	Filing Dt:	01/05/2007
Publication #:	US20080164493	Pub Dt:	07/10/2008
Title:	STRUCTURES CONTAINING ELECTRODEPOSITED GERMANIUM AND METHODS FOR THEIR FABRICATION

Patent #:	7679164	Issue Dt:	03/16/2010	Application #:	11620242	Filing Dt:	01/05/2007
Publication #:	US20080164494	Pub Dt:	07/10/2008
Title:	BIPOLAR TRANSISTOR WITH SILICIDED SUB-COLLECTOR

Patent #:	7460423	Issue Dt:	12/02/2008	Application #:	11620282	Filing Dt:	01/05/2007
Publication #:	US20080165560	Pub Dt:	07/10/2008
Title:	HIERARCHICAL 2T-DRAM WITH SELF-TIMED SENSING

Patent #:	7471546	Issue Dt:	12/30/2008	Application #:	11620297	Filing Dt:	01/05/2007
Publication #:	US20080165561	Pub Dt:	07/10/2008
Title:	HIERARCHICAL SIX-TRANSISTOR SRAM

Patent #:	7460387	Issue Dt:	12/02/2008	Application #:	11620328	Filing Dt:	01/05/2007
Publication #:	US20080165601	Pub Dt:	07/10/2008
Title:	EDRAM HIERARCHICAL DIFFERENTIAL SENSE AMP

Patent #:	7659200	Issue Dt:	02/09/2010	Application #:	11620391	Filing Dt:	01/05/2007
Publication #:	US20080166858	Pub Dt:	07/10/2008
Title:	SELF-CONSTRAINED ANISOTROPIC GERMANIUM NANOSTRUCTURE FROM ELECTROPLATING

Patent #:	7863189	Issue Dt:	01/04/2011	Application #:	11620423	Filing Dt:	01/05/2007
Publication #:	US20080164573	Pub Dt:	07/10/2008
Title:	METHODS FOR FABRICATING SILICON CARRIERS WITH CONDUCTIVE THROUGH-VIAS WITH LOW STRESS AND LOW DEFECT DENSITY

Patent #:	7539051	Issue Dt:	05/26/2009	Application #:	11620445	Filing Dt:	01/05/2007
Publication #:	US20080165576	Pub Dt:	07/10/2008
Title:	MEMORY STORAGE DEVICES COMPRISING DIFFERENT FERROMAGNETIC MATERIAL LAYERS, AND METHODS OF MAKING AND USING THE SAME

Patent #:	7736753	Issue Dt:	06/15/2010	Application #:	11620480	Filing Dt:	01/05/2007
Publication #:	US20080166584	Pub Dt:	07/10/2008
Title:	FORMATION OF NANOSTRUCTURES COMPRISING COMPOSITIONALLY MODULATED FERROMAGNETIC LAYERS BY PULSED ECD

Patent #:	7608538	Issue Dt:	10/27/2009	Application #:	11620497	Filing Dt:	01/05/2007
Publication #:	US20080166874	Pub Dt:	07/10/2008
Title:	FORMATION OF VERTICAL DEVICES BY ELECTROPLATING

Patent #:	7541272	Issue Dt:	06/02/2009	Application #:	11620541	Filing Dt:	01/05/2007
Publication #:	US20070111502	Pub Dt:	05/17/2007
Title:	DAMASCENE PATTERNING OF BARRIER LAYER METAL FOR C4 SOLDER BUMPS

Patent #:	7592671	Issue Dt:	09/22/2009	Application #:	11620663	Filing Dt:	01/06/2007
Publication #:	US20070111463	Pub Dt:	05/17/2007
Title:	STRAINED SILICON-ON-INSULATOR BY ANODIZATION OF A BURIED P+ SILICON GERMANIUM LAYER

Patent #:	NONE	Issue Dt:		Application #:	11620677	Filing Dt:	01/07/2007
Publication #:	US20080164933	Pub Dt:	07/10/2008
Title:	METHOD AND APPARATUS FOR MULTIPLE ARRAY LOW-POWER OPERATION MODES

Patent #:	7480184	Issue Dt:	01/20/2009	Application #:	11620704	Filing Dt:	01/07/2007
Publication #:	US20080165595	Pub Dt:	07/10/2008
Title:	MAXIMUM LIKELIHOOD STATISTICAL METHOD OF OPERATIONS FOR MULTI-BIT SEMICONDUCTOR MEMORY

Patent #:	7512772	Issue Dt:	03/31/2009	Application #:	11620869	Filing Dt:	01/08/2007
Publication #:	US20080168305	Pub Dt:	07/10/2008
Title:	SOFT ERROR HANDLING IN MICROPROCESSORS

Patent #:	7940846	Issue Dt:	05/10/2011	Application #:	11621016	Filing Dt:	01/08/2007
Publication #:	US20080165837	Pub Dt:	07/10/2008
Title:	TEST CIRCUIT FOR SERIAL LINK RECEIVER

Patent #:	NONE	Issue Dt:		Application #:	11621163	Filing Dt:	01/09/2007
Publication #:	US20080166492	Pub Dt:	07/10/2008
Title:	METAL-GRAPHITE FOAM COMPOSITE AND A COOLING APPARATUS FOR USING THE SAME

Patent #:	7545165	Issue Dt:	06/09/2009	Application #:	11621175	Filing Dt:	01/09/2007
Publication #:	US20080164903	Pub Dt:	07/10/2008
Title:	SYSTEM ARCHITECTURES FOR AND METHODS OF SCHEDULING ON-CHIP AND ACROSS-CHIP NOISE EVENTS IN AN INTEGRATED CIRCUIT

Patent #:	7809543	Issue Dt:	10/05/2010	Application #:	11621184	Filing Dt:	01/09/2007
Publication #:	US20080168409	Pub Dt:	07/10/2008
Title:	METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR ELECTRICAL PACKAGE MODELING

Patent #:	7538391	Issue Dt:	05/26/2009	Application #:	11621228	Filing Dt:	01/09/2007
Publication #:	US20080164535	Pub Dt:	07/10/2008
Title:	CURVED FINFETS

Patent #:	7432730	Issue Dt:	10/07/2008	Application #:	11621248	Filing Dt:	01/09/2007
Publication #:	US20080164924	Pub Dt:	07/10/2008
Title:	TIME BASED DRIVER OUTPUT TRANSITION (SLEW) RATE COMPENSATION

Patent #:	8006155	Issue Dt:	08/23/2011	Application #:	11621361	Filing Dt:	01/09/2007
Publication #:	US20080167853	Pub Dt:	07/10/2008
Title:	TESTING AN OPERATION OF INTEGRATED CIRCUITRY

Patent #:	7749802	Issue Dt:	07/06/2010	Application #:	11621365	Filing Dt:	01/09/2007
Publication #:	US20080164579	Pub Dt:	07/10/2008
Title:	PROCESS FOR CHEMICAL VAPOR DEPOSITION OF MATERIALS WITH VIA FILLING CAPABILITY AND STRUCTURE FORMED THEREBY

Patent #:	7772120	Issue Dt:	08/10/2010	Application #:	11621381	Filing Dt:	01/09/2007
Publication #:	US20080164580	Pub Dt:	07/10/2008
Title:	CHEMICAL VAPOR DEPOSITION METHOD FOR THE INCORPORATION OF NITROGEN INTO MATERIALS INCLUDING GERMANIUM AND ANTIMONY

Patent #:	7823094	Issue Dt:	10/26/2010	Application #:	11621383	Filing Dt:	01/09/2007
Publication #:	US20080165192	Pub Dt:	07/10/2008
Title:	PSEUDO-STRING BASED PATTERN RECOGNITION IN L3GO DESIGNS

Patent #:	7820474	Issue Dt:	10/26/2010	Application #:	11621389	Filing Dt:	01/09/2007
Publication #:	US20080166586	Pub Dt:	07/10/2008
Title:	METAL CATALYZED SELECTIVE DEPOSITION OF MATERIALS INCLUDING GERMANIUM AND ANTIMONY

Patent #:	7442650	Issue Dt:	10/28/2008	Application #:	11621660	Filing Dt:	01/10/2007
Publication #:	US20080166879	Pub Dt:	07/10/2008
Title:	METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES USING RIE PROCESS

Patent #:	7923840	Issue Dt:	04/12/2011	Application #:	11621699	Filing Dt:	01/10/2007
Publication #:	US20080166857	Pub Dt:	07/10/2008
Title:	ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND INTEGRATED CIRCUIT

Patent #:	NONE	Issue Dt:		Application #:	11621709	Filing Dt:	01/10/2007
Publication #:	US20080164613	Pub Dt:	07/10/2008
Title:	ULTRA-THIN Cu ALLOY SEED FOR INTERCONNECT APPLICATION

Patent #:	7952165	Issue Dt:	05/31/2011	Application #:	11621864	Filing Dt:	01/10/2007
Publication #:	US20080164495	Pub Dt:	07/10/2008
Title:	HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) WITH SELF-ALIGNED SUB-LITHOGRAPHIC METAL-SEMICONDUCTOR ALLOY BASE CONTACTS

Patent #:	7888742	Issue Dt:	02/15/2011	Application #:	11621871	Filing Dt:	01/10/2007
Publication #:	US20080164528	Pub Dt:	07/10/2008
Title:	SELF-ALIGNED METAL-SEMICONDUCTOR ALLOY AND METALLIZATION FOR SUB-LITHOGRAPHIC SOURCE AND DRAIN CONTACTS

Patent #:	7546565	Issue Dt:	06/09/2009	Application #:	11622017	Filing Dt:	01/11/2007
Publication #:	US20080172640	Pub Dt:	07/17/2008
Title:	METHOD FOR COMPARING TWO DESIGNS OF ELECTRONIC CIRCUITS

Patent #:	7793184	Issue Dt:	09/07/2010	Application #:	11622048	Filing Dt:	01/11/2007
Publication #:	US20080172587	Pub Dt:	07/17/2008
Title:	LOWERING POWER CONSUMPTION DURING LOGIC BUILT-IN SELF-TESTING (LBIST) VIA CHANNEL SUPPRESSION

Patent #:	7635899	Issue Dt:	12/22/2009	Application #:	11622057	Filing Dt:	01/11/2007
Publication #:	US20080171420	Pub Dt:	07/17/2008
Title:	STRUCTURE AND METHOD TO FORM IMPROVED ISOLATION IN A SEMICONDUCTOR DEVICE

Patent #:	8736323	Issue Dt:	05/27/2014	Application #:	11622166	Filing Dt:	01/11/2007
Publication #:	US20080172193	Pub Dt:	07/17/2008
Title:	METHOD AND APPARATUS FOR ON-CHIP PHASE ERROR MEASUREMENT TO DETERMINE JITTER IN PHASE-LOCKED LOOPS

Patent #:	7400525	Issue Dt:	07/15/2008	Application #:	11622172	Filing Dt:	01/11/2007
Publication #:	US20080186752	Pub Dt:	08/07/2008
Title:	MEMORY CELL WITH INDEPENDENT-GATE CONTROLLED ACCESS DEVICES AND MEMORY USING THE CELL

Patent #:	7948050	Issue Dt:	05/24/2011	Application #:	11622358	Filing Dt:	01/11/2007
Publication #:	US20080169503	Pub Dt:	07/17/2008
Title:	CORE-SHELL NANOWIRE TRANSISTOR

Patent #:	8131967	Issue Dt:	03/06/2012	Application #:	11622445	Filing Dt:	01/11/2007
Publication #:	US20080172540	Pub Dt:	07/17/2008
Title:	ASYNCHRONOUS DATA INTERFACE

Patent #:	7489572	Issue Dt:	02/10/2009	Application #:	11622519	Filing Dt:	01/12/2007
Publication #:	US20080170449	Pub Dt:	07/17/2008
Title:	METHOD FOR IMPLEMENTING EFUSE SENSE AMPLIFIER TESTING WITHOUT BLOWING THE EFUSE

Patent #:	7528056	Issue Dt:	05/05/2009	Application #:	11622543	Filing Dt:	01/12/2007
Publication #:	US20080171423	Pub Dt:	07/17/2008
Title:	LOW-COST STRAINED SOI SUBSTRATE FOR HIGH-PERFORMANCE CMOS TECHNOLOGY

Patent #:	7691690	Issue Dt:	04/06/2010	Application #:	11622586	Filing Dt:	01/12/2007
Publication #:	US20080171408	Pub Dt:	07/17/2008
Title:	METHODS FOR FORMING DUAL FULLY SILICIDED GATES OVER FINS OF FINFET DEVICES

Patent #:	NONE	Issue Dt:		Application #:	11622588	Filing Dt:	01/12/2007
Publication #:	US20080169535	Pub Dt:	07/17/2008
Title:	SUB-LITHOGRAPHIC FACETING FOR MOSFET PERFORMANCE ENHANCEMENT

Patent #:	8004059	Issue Dt:	08/23/2011	Application #:	11622616	Filing Dt:	01/12/2007
Publication #:	US20080169529	Pub Dt:	07/17/2008
Title:	EFUSE CONTAINING SIGE STACK

Patent #:	7962114	Issue Dt:	06/14/2011	Application #:	11622812	Filing Dt:	01/12/2007
Publication #:	US20080169859	Pub Dt:	07/17/2008
Title:	DRAIN-PUMPED SUB-HARMONIC MIXER FOR MILLIMETER WAVE APPLICATIONS

Patent #:	NONE	Issue Dt:		Application #:	11623102	Filing Dt:	01/15/2007
Publication #:	US20080172277	Pub Dt:	07/17/2008
Title:	ALGORITHMIC FRAMEWORK FOR SCHEDULING STEELMAKING PRODUCTION OPTIMIZING THE FLOW OF MOLTEN IRON SUBJECT TO INVENTORY CONSTRAINTS

Patent #:	7573300	Issue Dt:	08/11/2009	Application #:	11623112	Filing Dt:	01/15/2007
Publication #:	US20080169837	Pub Dt:	07/17/2008
Title:	CURRENT CONTROL MECHANISM FOR DYNAMIC LOGIC KEEPER CIRCUITS IN AN INTEGRATED CIRCUIT AND METHOD OF REGULATING SAME

Patent #:	7498869	Issue Dt:	03/03/2009	Application #:	11623114	Filing Dt:	01/15/2007
Publication #:	US20080169869	Pub Dt:	07/17/2008
Title:	VOLTAGE REFERENCE CIRCUIT FOR LOW VOLTAGE APPLICATIONS IN AN INTEGRATED CIRCUIT

Patent #:	7466171	Issue Dt:	12/16/2008	Application #:	11623119	Filing Dt:	01/15/2007
Publication #:	US20080169844	Pub Dt:	07/17/2008
Title:	VOLTAGE DETECTION CIRCUIT AND CIRCUIT FOR GENERATING A TRIGGER FLAG SIGNAL.

Patent #:	7400015	Issue Dt:	07/15/2008	Application #:	11623164	Filing Dt:	01/15/2007
Publication #:	US20080169518	Pub Dt:	07/17/2008
Title:	SEMICONDUCTOR STRUCTURE WITH FIELD SHIELD AND METHOD OF FORMING THE STRUCTURE.

Patent #:	7463078	Issue Dt:	12/09/2008	Application #:	11623185	Filing Dt:	01/15/2007
Publication #:	US20080169875	Pub Dt:	07/17/2008
Title:	LEVEL-SHIFTING DIFFERENTIAL AMPLIFIER

Patent #:	7466617	Issue Dt:	12/16/2008	Application #:	11623434	Filing Dt:	01/16/2007
Publication #:	US20080175086	Pub Dt:	07/24/2008
Title:	MULTI-PORT DYNAMIC MEMORY STRUCTURES

Patent #:	7814443	Issue Dt:	10/12/2010	Application #:	11623541	Filing Dt:	01/16/2007
Publication #:	US20080172645	Pub Dt:	07/17/2008
Title:	GRAPH-BASED PATTERN MATCHING IN L3GO DESIGNS

Patent #:	7351115	Issue Dt:	04/01/2008	Application #:	11623820	Filing Dt:	01/17/2007
Title:	METHOD FOR MODIFYING AN ELECTRICAL CONNECTOR

Patent #:	7381623	Issue Dt:	06/03/2008	Application #:	11623882	Filing Dt:	01/17/2007
Title:	PRE-EPITAXIAL DISPOSABLE SPACER INTEGRATION SCHEME WITH VERY LOW TEMPERATURE SELECTIVE EPITAXY FOR ENHANCED DEVICE PERFORMANCE

Patent #:	8344286	Issue Dt:	01/01/2013	Application #:	11624235	Filing Dt:	01/18/2007
Publication #:	US20100289186	Pub Dt:	11/18/2010
Title:	ENHANCED QUALITY OF LASER ABLATION BY CONTROLLING LASER REPETITION RATE

Patent #:	7732104	Issue Dt:	06/08/2010	Application #:	11624257	Filing Dt:	01/18/2007
Publication #:	US20080176147	Pub Dt:	07/24/2008
Title:	SYSTEM AND METHOD FOR ELIMINATING THE STRUCTURE AND EDGE ROUGHNESS PRODUCED DURING LASER ABLATION OF A MATERIAL

Patent #:	7550808	Issue Dt:	06/23/2009	Application #:	11624324	Filing Dt:	01/18/2007
Publication #:	US20080173953	Pub Dt:	07/24/2008
Title:	FULLY SILICIDING REGIONS TO IMPROVE PERFORMANCE

Patent #:	7682922	Issue Dt:	03/23/2010	Application #:	11624385	Filing Dt:	01/18/2007
Publication #:	US20080173977	Pub Dt:	07/24/2008
Title:	POST STI TRENCH CAPACITOR

Patent #:	7781278	Issue Dt:	08/24/2010	Application #:	11624387	Filing Dt:	01/18/2007
Publication #:	US20080173901	Pub Dt:	07/24/2008
Title:	CMOS DEVICES HAVING CHANNEL REGIONS WITH A V-SHAPED TRENCH AND HYBRID CHANNEL ORIENTATIONS, AND METHOD FOR FORMING THE SAME

Patent #:	7719079	Issue Dt:	05/18/2010	Application #:	11624436	Filing Dt:	01/18/2007
Publication #:	US20080173993	Pub Dt:	07/24/2008
Title:	CHIP CARRIER SUBSTRATE CAPACITOR AND METHOD FOR FABRICATION THEREOF

Patent #:	NONE	Issue Dt:		Application #:	11624712	Filing Dt:	01/19/2007
Publication #:	US20080173981	Pub Dt:	07/24/2008
Title:	INTEGRATED CIRCUIT (IC) CHIP WITH ONE OR MORE VERTICAL PLATE CAPACITORS AND METHOD OF MAKING THE CAPACITORS

Patent #:	NONE	Issue Dt:		Application #:	11624824	Filing Dt:	01/19/2007
Publication #:	US20080173972	Pub Dt:	07/24/2008
Title:	METHOD OF WAFER THINNING

Patent #:	7728364	Issue Dt:	06/01/2010	Application #:	11624931	Filing Dt:	01/19/2007
Publication #:	US20080173906	Pub Dt:	07/24/2008
Title:	ENHANCED MOBILITY CMOS TRANSISTORS WITH A V-SHAPED CHANNEL WITH SELF-ALIGNMENT TO SHALLOW TRENCH ISOLATION

Patent #:	8140341	Issue Dt:	03/20/2012	Application #:	11624990	Filing Dt:	01/19/2007
Publication #:	US20080177786	Pub Dt:	07/24/2008
Title:	METHOD FOR THE SEMI-AUTOMATIC EDITING OF TIMED AND ANNOTATED DATA

Patent #:	NONE	Issue Dt:		Application #:	11625474	Filing Dt:	01/22/2007
Publication #:	US20070117404	Pub Dt:	05/24/2007
Title:	MODIFICATION OF ELECTRICAL PROPERTIES FOR SEMICONDUCTOR WAFERS

Patent #:	7973409	Issue Dt:	07/05/2011	Application #:	11625576	Filing Dt:	01/22/2007
Publication #:	US20080174017	Pub Dt:	07/24/2008
Title:	HYBRID INTERCONNECT STRUCTURE FOR PERFORMANCE IMPROVEMENT AND RELIABILITY ENHANCEMENT

Patent #:	7788610	Issue Dt:	08/31/2010	Application #:	11625831	Filing Dt:	01/23/2007
Publication #:	US20080177968	Pub Dt:	07/24/2008
Title:	RANDOM STIMULI GENERATION OF MEMORY MAPS AND MEMORY ALLOCATIONS

Patent #:	7854878	Issue Dt:	12/21/2010	Application #:	11625839	Filing Dt:	01/23/2007
Publication #:	US20090184445	Pub Dt:	07/23/2009
Title:	METHOD FOR FORMING AND ALIGNING CHEMICALLY MEDIATED DISPERSION OF MAGNETIC NANOPARTICLES IN A POLYMER

Patent #:	7821051	Issue Dt:	10/26/2010	Application #:	11625883	Filing Dt:	01/23/2007
Publication #:	US20070117313	Pub Dt:	05/24/2007
Title:	MIM CAPACITOR AND METHOD OF FABRICATING SAME

Patent #:	NONE	Issue Dt:		Application #:	11626431	Filing Dt:	01/24/2007
Publication #:	US20070195682	Pub Dt:	08/23/2007
Title:	METHOD FOR HIGH DENSITY DATA STORAGE AND IMAGING

Patent #:	NONE	Issue Dt:		Application #:	11626468	Filing Dt:	01/24/2007
Publication #:	US20080173994	Pub Dt:	07/24/2008
Title:	METHOD OF MAKING RELEASE COATINGS FOR COMPOSITE MATERIALS

Patent #:	7662722	Issue Dt:	02/16/2010	Application #:	11626548	Filing Dt:	01/24/2007
Publication #:	US20080173976	Pub Dt:	07/24/2008
Title:	AIR GAP UNDER ON-CHIP PASSIVE DEVICE

Patent #:	8017522	Issue Dt:	09/13/2011	Application #:	11626550	Filing Dt:	01/24/2007
Publication #:	US20080173984	Pub Dt:	07/24/2008
Title:	MECHANICALLY ROBUST METAL/LOW-K INTERCONNECTS

Patent #:	NONE	Issue Dt:		Application #:	11626552	Filing Dt:	01/24/2007
Publication #:	US20080173985	Pub Dt:	07/24/2008
Title:	DIELECTRIC CAP HAVING MATERIAL WITH OPTICAL BAND GAP TO SUBSTANTIALLY BLOCK UV RADIATION DURING CURING TREATMENT, AND RELATED METHODS

Patent #:	NONE	Issue Dt:		Application #:	11626802	Filing Dt:	01/24/2007
Publication #:	US20070139853	Pub Dt:	06/21/2007
Title:	ESD DISSIPATIVE COATING ON CABLES

Patent #:	8032349	Issue Dt:	10/04/2011	Application #:	11626915	Filing Dt:	01/25/2007
Publication #:	US20080183442	Pub Dt:	07/31/2008
Title:	EFFICIENT METHODOLOGY FOR THE ACCURATE GENERATION OF CUSTOMIZED COMPACT MODEL PARAMETERS FROM ELECTRICAL TEST DATA

Patent #:	8234624	Issue Dt:	07/31/2012	Application #:	11626967	Filing Dt:	01/25/2007
Publication #:	US20080184193	Pub Dt:	07/31/2008
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Title:	COMPLIANT PENETRATING PACKAGING INTERCONNECT

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100

Patent #:	8691685	Issue Dt:	04/08/2014	Application #:	11657000	Filing Dt:	01/23/2007
Publication #:	US20070166994	Pub Dt:	07/19/2007
Title:	PREVENTION AND CONTROL OF INTERMETALLIC ALLOY INCLUSIONS THAT FORM DURING REFLOW OF PB FREE, SN RICH, SOLDERS IN CONTACTS IN MICROELECTRONIC PACKAGING IN INTEGRATED CIRCUIT CONTACT STRUCTURES WHERE ELECTROLESS NI(P) METALLIZATION IS PRESENT

Assignors

GLOBALFOUNDRIES U.S. 2 LLC

Exec Dt:

09/10/2015

GLOBALFOUNDRIES U.S. INC.

Exec Dt:

09/10/2015

Assignee

GLOBALFOUNDRIES INC.

PO BOX 309

UGLAND HOUSE

GRAND CAYMAN, CAYMAN ISLANDS KY1-1104

Correspondence name and address
	HESLIN ROTHENBERG FARLEY & MESITI P.C.
	5 COLUMBIA CIRCLE
	ALBANY, NY 12203

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