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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036779/0001   Pages: 985
Recorded: 10/05/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
02/17/2009
Application #:
11757660
Filing Dt:
06/04/2007
Publication #:
Pub Dt:
10/04/2007
Title:
METHOD OF DOPING A GATE ELECTRODE OF A FIELD EFFECT TRANSISTOR
2
Patent #:
Issue Dt:
02/10/2009
Application #:
11758128
Filing Dt:
06/05/2007
Publication #:
Pub Dt:
10/11/2007
Title:
OPTIMIZED THERMALLY CONDUCTIVE PLATE AND ATTACHMENT METHOD FOR ENHANCED THERMAL PERFORMANCE AND RELIABILITY OF FLIP CHIP ORGANIC PACKAGES
3
Patent #:
NONE
Issue Dt:
Application #:
11758265
Filing Dt:
06/05/2007
Publication #:
Pub Dt:
10/04/2007
Title:
ULTRA-THIN Si MOSFET DEVICE STRUCTURE AND METHOD OF MANUFACTURE
4
Patent #:
NONE
Issue Dt:
Application #:
11758277
Filing Dt:
06/05/2007
Publication #:
Pub Dt:
12/11/2008
Title:
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR MAPPING A LOGICAL DESIGN ONTO AN INTEGRATED CIRCUIT WITH SLACK APPORTIONMENT
5
Patent #:
Issue Dt:
11/16/2010
Application #:
11758291
Filing Dt:
06/05/2007
Publication #:
Pub Dt:
12/11/2008
Title:
DUAL STRESS MEMORIZATION TECHNIQUE FOR CMOS APPLICATION
6
Patent #:
Issue Dt:
09/18/2012
Application #:
11758457
Filing Dt:
06/05/2007
Publication #:
Pub Dt:
08/23/2012
Title:
SELF ORIENTING MICRO PLATES OF THERMALLY CONDUCTING MATERIAL AS COMPONENT IN THERMAL PASTE OR ADHESIVE
7
Patent #:
Issue Dt:
09/28/2010
Application #:
11758746
Filing Dt:
06/06/2007
Publication #:
Pub Dt:
10/04/2007
Title:
CHANGING AN ELECTRICAL RESISTANCE OF A RESISTOR
8
Patent #:
Issue Dt:
03/03/2009
Application #:
11758752
Filing Dt:
06/06/2007
Publication #:
Pub Dt:
10/25/2007
Title:
GLOBAL VACUUM INJECTION MOLDED SOLDER SYSTEM AND METHOD
9
Patent #:
Issue Dt:
05/26/2009
Application #:
11759332
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
12/11/2008
Title:
ITERATIVE SYNTHESIS OF AN INTEGRATED CIRCUIT DESIGN FOR ATTAINING POWER CLOSURE WHILE MAINTAINING EXISTING DESIGN CONSTRAINTS
10
Patent #:
Issue Dt:
07/05/2011
Application #:
11759396
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
12/11/2008
Title:
OUT OF BAND SIGNALING ENHANCEMENT FOR HIGH SPEED SERIAL DRIVER
11
Patent #:
Issue Dt:
12/16/2008
Application #:
11759426
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
12/11/2008
Title:
METHOD AND APPARATUS FOR A CONFIGURABLE LOW POWER HIGH FAN-IN MULTIPLEXER
12
Patent #:
Issue Dt:
06/15/2010
Application #:
11759981
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
10/18/2007
Title:
WELL ISOLATION TRENCHES (WIT) FOR CMOS DEVICES
13
Patent #:
Issue Dt:
12/14/2010
Application #:
11760030
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
12/11/2008
Title:
FIELD EFFECT TRANSISTOR USING CARBON BASED STRESS LINER
14
Patent #:
NONE
Issue Dt:
Application #:
11760253
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
10/04/2007
Title:
STRUCTURE FOR LATCHUP SUPPRESSION
15
Patent #:
Issue Dt:
04/26/2011
Application #:
11760288
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
01/17/2008
Title:
STRUCTURE AND METHOD FOR PERFORMANCE IMPROVEMENT IN VERTICAL BIPOLAR TRANSISTORS
16
Patent #:
Issue Dt:
04/28/2009
Application #:
11760477
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
10/04/2007
Title:
SHALLOW TRENCH ISOLATION FILL BY LIQUID PHASE DEPOSITION OF SIO2
17
Patent #:
Issue Dt:
02/26/2008
Application #:
11760575
Filing Dt:
06/08/2007
Publication #:
Pub Dt:
10/18/2007
Title:
CHANGING CHIP FUNCTION BASED ON FUSE STATES
18
Patent #:
Issue Dt:
04/07/2009
Application #:
11760813
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
12/11/2008
Title:
AIR BEARING GAP CONTROL FOR INJECTION MOLDED SOLDER HEADS
19
Patent #:
Issue Dt:
04/26/2011
Application #:
11760856
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
12/11/2008
Title:
LOW VOLTAGE HEAD ROOM DETECTION FOR RELIABLE START-UP OF SELF-BIASED ANALOG CIRCUITS
20
Patent #:
NONE
Issue Dt:
Application #:
11760885
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
12/11/2008
Title:
TWO STEP PHOTORESIST STRIPPING METHOD SEQUENTIALLY USING ION ACTIVATED AND NON-ION ACTIVATED NITROGEN CONTAINING PLASMAS
21
Patent #:
NONE
Issue Dt:
Application #:
11760992
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
12/11/2008
Title:
MULTI-LAYER MASK METHOD FOR PATTERNED STRUCTURE ETHCING
22
Patent #:
Issue Dt:
04/19/2011
Application #:
11761043
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
12/11/2008
Title:
USE OF A SYMMETRIC RESISTIVE MEMORY MATERIAL AS A DIODE TO DRIVE SYMMETRIC OR ASYMMETRIC RESISTIVE MEMORY
23
Patent #:
Issue Dt:
09/07/2010
Application #:
11761234
Filing Dt:
06/11/2007
Publication #:
Pub Dt:
12/11/2008
Title:
METHOD FOR DIRECT HEAT SINK ATTACHMENT
24
Patent #:
NONE
Issue Dt:
Application #:
11761403
Filing Dt:
06/12/2007
Publication #:
Pub Dt:
12/18/2008
Title:
ELECTRICAL FUSE WITH SUBLITHOGRAPHIC DIMENSION
25
Patent #:
Issue Dt:
06/22/2010
Application #:
11761438
Filing Dt:
06/12/2007
Publication #:
Pub Dt:
10/04/2007
Title:
FIN DEVICE WITH CAPACITOR INTEGRATED UNDER GATE ELECTRODE
26
Patent #:
NONE
Issue Dt:
Application #:
11761485
Filing Dt:
06/12/2007
Publication #:
Pub Dt:
12/18/2008
Title:
MASK LAYOUT EDITOR SHAPE QUERY
27
Patent #:
Issue Dt:
10/13/2009
Application #:
11761568
Filing Dt:
06/12/2007
Publication #:
Pub Dt:
12/18/2008
Title:
PARTIALLY DEPLETED SOI FIELD EFFECT TRANSISTOR HAVING A METALLIZED SOURCE SIDE HALO REGION
28
Patent #:
Issue Dt:
07/05/2011
Application #:
11761610
Filing Dt:
06/12/2007
Publication #:
Pub Dt:
12/18/2008
Title:
METHOD AND APPARATUS FOR CALIBRATING INTERNAL PULSES IN AN INTEGRATED CIRCUIT
29
Patent #:
Issue Dt:
04/20/2010
Application #:
11761655
Filing Dt:
06/12/2007
Publication #:
Pub Dt:
12/18/2008
Title:
PROGRAMMABLE PULSEWIDTH AND DELAY GENERATING CIRCUIT FOR INTEGRATED CIRCUITS
30
Patent #:
Issue Dt:
03/08/2011
Application #:
11762130
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
12/18/2008
Title:
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR COUPLED NOISE TIMING VIOLATION AVOIDANCE IN DETAILED ROUTING
31
Patent #:
Issue Dt:
05/03/2011
Application #:
11762229
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
12/18/2008
Title:
METHOD AND APPARATUS FOR COMPONENT ASSOCIATION INFERENCE, FAILURE DIAGNOSIS AND MISCONFIGURATION DETECTION BASED ON HISTORICAL FAILURE DATA
32
Patent #:
NONE
Issue Dt:
Application #:
11762339
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
12/18/2008
Title:
3-D SRAM ARRAY TO IMPROVE STABILITY AND PERFORMANCE
33
Patent #:
Issue Dt:
03/17/2009
Application #:
11762376
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
10/04/2007
Title:
STRUCTURE AND METHOD OF INTEGRATING COMPOUND AND ELEMENTAL SEMICONDUCTORS FOR HIGH-PERFORMANCE CMOS
34
Patent #:
NONE
Issue Dt:
Application #:
11762405
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
10/04/2007
Title:
SYSTEM AND METHOD FOR ACCOMMODATING NON-GAUSSIAN AND NON-LINEAR SOURCES OF VARIATION IN STATISTICAL STATIC TIMING ANALYSIS
35
Patent #:
Issue Dt:
08/26/2014
Application #:
11762811
Filing Dt:
06/14/2007
Publication #:
Pub Dt:
12/18/2008
Title:
VERTICAL CURRENT CONTROLLED SILICON ON INSULATOR (SOI) DEVICE SUCH AS A SILICON CONTROLLED RECTIFIER AND METHOD OF FORMING VERTICAL SOI CURRENT CONTROLLED DEVICES
36
Patent #:
Issue Dt:
04/13/2010
Application #:
11763047
Filing Dt:
06/14/2007
Publication #:
Pub Dt:
12/18/2008
Title:
CMOS TRANSISTORS WITH DIFFERENTIAL OXYGEN CONTENT HIGH-K DIELECTRICS
37
Patent #:
Issue Dt:
05/24/2011
Application #:
11763135
Filing Dt:
06/14/2007
Publication #:
Pub Dt:
10/04/2007
Title:
RELIABLE BEOL INTEGRATION PROCESS WITH DIRECT CMP OF POROUS SICOH DIELECTRIC
38
Patent #:
Issue Dt:
08/24/2010
Application #:
11763411
Filing Dt:
06/14/2007
Publication #:
Pub Dt:
12/18/2008
Title:
MULTI-NODE CONFIGURATION OF PROCESSOR CARDS CONNECTED VIA PROCESSOR FABRICS
39
Patent #:
Issue Dt:
07/22/2008
Application #:
11763499
Filing Dt:
06/15/2007
Publication #:
Pub Dt:
01/31/2008
Title:
PIN GRID ARRAY ZERO INSERTION FORCE CONNECTORS CONFIGURABLE FOR SUPPORTING LARGE PIN COUNTS
40
Patent #:
Issue Dt:
07/06/2010
Application #:
11763669
Filing Dt:
06/15/2007
Publication #:
Pub Dt:
01/31/2008
Title:
SELF-REFERENCED MATCH-LINE SENSE AMPLIFIER FOR CONTENT ADDRESSABLE MEMORIES
41
Patent #:
Issue Dt:
12/16/2008
Application #:
11763687
Filing Dt:
06/15/2007
Publication #:
Pub Dt:
10/11/2007
Title:
VOLTAGE CONTROLLED STATIC RANDOM ACCESS MEMORY
42
Patent #:
Issue Dt:
05/22/2012
Application #:
11763781
Filing Dt:
06/15/2007
Publication #:
Pub Dt:
10/11/2007
Title:
SYSTEM AND METHOD TO IMPROVE CHIP YIELD, RELIABILITY AND PERFORMANCE
43
Patent #:
Issue Dt:
11/04/2008
Application #:
11763808
Filing Dt:
06/15/2007
Publication #:
Pub Dt:
11/15/2007
Title:
SYSTEM AND METHOD OF AUTOMATICALLY GENERATING KERF DESIGN DATA
44
Patent #:
NONE
Issue Dt:
Application #:
11763829
Filing Dt:
06/15/2007
Publication #:
Pub Dt:
10/11/2007
Title:
DIFFUSION BARRIER WITH LOW DIELECTRIC CONSTANT AND SEMICONDUCTOR DEVICE CONTAINING SAME
45
Patent #:
Issue Dt:
11/03/2009
Application #:
11764237
Filing Dt:
06/18/2007
Publication #:
Pub Dt:
02/07/2008
Title:
SENSE-AMPLIFIER ASSIST (SAA) WITH POWER-REDUCTION TECHNIQUE
46
Patent #:
Issue Dt:
02/17/2009
Application #:
11764388
Filing Dt:
06/18/2007
Publication #:
Pub Dt:
10/18/2007
Title:
TRANSISTOR STRUCTURE WITH MINIMIZED PARASITICS AND METHOD OF FABRICATING THE SAME
47
Patent #:
Issue Dt:
09/07/2010
Application #:
11764571
Filing Dt:
06/18/2007
Publication #:
Pub Dt:
10/18/2007
Title:
SEMICONDUCTOR STRUCTURES FOR LATCH-UP SUPPRESSION AND METHODS OF FORMING SUCH SEMICONDUCTOR STRUCTURES
48
Patent #:
Issue Dt:
03/20/2012
Application #:
11764678
Filing Dt:
06/18/2007
Publication #:
Pub Dt:
08/14/2008
Title:
METHOD FOR MANUFACTURING A PHASE CHANGE MEMORY DEVICE WITH PILLAR BOTTOM ELECTRODE
49
Patent #:
Issue Dt:
07/06/2010
Application #:
11764817
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
DEVICE, SYSTEM AND METHOD OF GENERATING A HARDWARE-VERIFICATION TEST CASE
50
Patent #:
Issue Dt:
05/17/2011
Application #:
11764876
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
METHOD AND APPARATUS FOR RATELESS SOURCE CODING WITH/WITHOUT DECODER SIDE INFORMATION
51
Patent #:
Issue Dt:
10/04/2011
Application #:
11764948
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
FIELD EFFECT TRANSISTOR INCORPORATING AT LEAST ONE STRUCTURE FOR IMPARTING TEMPERATURE-DEPENDENT STRAIN ON THE CHANNEL REGION AND ASSOCIATED METHOD OF FORMING THE TRANSISTOR
52
Patent #:
Issue Dt:
08/07/2012
Application #:
11765055
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
DIRECT EDGE CONNECTION FOR MULTI-CHIP INTEGRATED CIRCUITS
53
Patent #:
NONE
Issue Dt:
Application #:
11765142
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
Method for Fabricating an Electrolytic Device Based on a Solution-Processed Electrolyte
54
Patent #:
Issue Dt:
05/22/2012
Application #:
11765396
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
PROCEDURE SUMMARIES FOR POINTER ANALYSIS
55
Patent #:
Issue Dt:
05/26/2009
Application #:
11765485
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
10/11/2007
Title:
BODY POTENTIAL IMAGER CELL
56
Patent #:
Issue Dt:
04/12/2011
Application #:
11765931
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
12/25/2008
Title:
FIN FIELD EFFECT TRANSISTOR DEVICES WITH SELF-ALIGNED SOURCE AND DRAIN REGIONS
57
Patent #:
Issue Dt:
03/20/2012
Application #:
11766261
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
12/25/2008
Title:
METAL CAP WITH ULTRA-LOW K DIELECTRIC MATERIAL FOR CIRCUIT INTERCONNECT APPLICATIONS
58
Patent #:
Issue Dt:
12/21/2010
Application #:
11766268
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
12/25/2008
Title:
ROBUST CABLE CONNECTIVITY TEST RECEIVER FOR HIGH-SPEED DATA RECEIVER
59
Patent #:
Issue Dt:
08/10/2010
Application #:
11766475
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
10/25/2007
Title:
SYSTEM AND PROGRAM PRODUCT FOR FACILITATING FORWARDING OF DATA PACKETS THROUGH A NODE OF A DATA TRANSFER NETWORK USING MULTIPLE TYPES OF FORWARDING TABLES
60
Patent #:
Issue Dt:
10/18/2011
Application #:
11766533
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
12/25/2008
Title:
METHOD AND APPARATUS FOR CHIP COOLING
61
Patent #:
Issue Dt:
01/12/2010
Application #:
11766820
Filing Dt:
06/22/2007
Publication #:
Pub Dt:
12/25/2008
Title:
DETERMINING AZIMUTH ANGLE OF INCIDENT BEAM TO WAFER
62
Patent #:
Issue Dt:
10/26/2010
Application #:
11766869
Filing Dt:
06/22/2007
Publication #:
Pub Dt:
12/25/2008
Title:
METHOD AND STRUCTURE FOR A PULL TEST FOR CONTROLLED COLLAPSE CHIP CONNECTIONS AND BALL LIMITING METALLURGY
63
Patent #:
NONE
Issue Dt:
Application #:
11767188
Filing Dt:
06/22/2007
Publication #:
Pub Dt:
01/03/2008
Title:
BURIED CHANNEL MOSFET USING III-V COMPOUND SEMICONDUCTORS AND HIGH k GATE DIELECTRICS
64
Patent #:
Issue Dt:
12/25/2012
Application #:
11767545
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
SYSTEM AND METHOD TO PROTECT COMPUTING SYSTEMS
65
Patent #:
Issue Dt:
10/12/2010
Application #:
11767616
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
DEEP TRENCH CAPACITOR AND METHOD OF MAKING SAME
66
Patent #:
Issue Dt:
11/02/2010
Application #:
11767627
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
JUNCTION FIELD EFFECT TRANSISTOR WITH A HYPERABRUPT JUNCTION
67
Patent #:
NONE
Issue Dt:
Application #:
11767789
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
PROVIDING GAPS IN CAPPING LAYER TO REDUCE TENSILE STRESS FOR BEOL FABRICATION OF INTEGRATED CIRCUITS
68
Patent #:
Issue Dt:
12/25/2012
Application #:
11767796
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
SEGREGATING WAFER CARRIER TYPES IN SEMICONDUCTOR STORAGE DEVICES
69
Patent #:
Issue Dt:
06/09/2009
Application #:
11767850
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
THERMAL ENERGY REMOVAL STRUCTURE AND METHOD
70
Patent #:
NONE
Issue Dt:
Application #:
11768208
Filing Dt:
06/26/2007
Publication #:
Pub Dt:
12/27/2007
Title:
PROGRAMMABLE SEMICONDUCTOR DEVICE
71
Patent #:
Issue Dt:
02/02/2010
Application #:
11768254
Filing Dt:
06/26/2007
Publication #:
Pub Dt:
10/25/2007
Title:
ELECTRICALLY PROGRAMMABLE PI-SHAPED FUSE STRUCTURES AND METHODS OF FABRICATION THEREOF
72
Patent #:
Issue Dt:
11/02/2010
Application #:
11768266
Filing Dt:
06/26/2007
Publication #:
Pub Dt:
01/01/2009
Title:
METHOD OF DOPING FIELD-EFFECT-TRANSISTORS (FETS) WITH REDUCED STRESS/STRAIN RELAXATION AND RESULTING FET DEVICES
73
Patent #:
Issue Dt:
01/04/2011
Application #:
11769064
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
11/15/2007
Title:
SELF HEATING MONITOR FOR SIGE AND SOI CMOS DEVICES
74
Patent #:
Issue Dt:
07/28/2009
Application #:
11769089
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
01/01/2009
Title:
FUSED AROMATIC STRUCTURES AND METHODS FOR PHOTOLITHOGRAPHIC APPLICATIONS
75
Patent #:
Issue Dt:
07/10/2012
Application #:
11769128
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
01/01/2009
Title:
TRANSMITTER BANDWIDTH OPTIMIZATION CIRCUIT
76
Patent #:
NONE
Issue Dt:
Application #:
11769408
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
12/06/2007
Title:
METHOD AND SYSTEM FOR HIGH FREQUENCY CLOCK SIGNAL GATING
77
Patent #:
NONE
Issue Dt:
Application #:
11770013
Filing Dt:
06/28/2007
Publication #:
Pub Dt:
12/06/2007
Title:
METHOD AND SYSTEM FOR DETERMINISTIC BIST
78
Patent #:
Issue Dt:
10/05/2010
Application #:
11770105
Filing Dt:
06/28/2007
Publication #:
Pub Dt:
01/01/2009
Title:
WAFER AND STAGE ALIGNMENT USING PHOTONIC DEVICES
79
Patent #:
Issue Dt:
10/12/2010
Application #:
11770303
Filing Dt:
06/28/2007
Publication #:
Pub Dt:
01/01/2009
Title:
SELECTABLE DEVICE OPTIONS FOR CHARACTERIZING SEMICONDUCTOR DEVICES
80
Patent #:
Issue Dt:
03/30/2010
Application #:
11770455
Filing Dt:
06/28/2007
Publication #:
Pub Dt:
01/01/2009
Title:
CMOS-PROCESS-COMPATIBLE PROGRAMMABLE VIA DEVICE
81
Patent #:
NONE
Issue Dt:
Application #:
11770783
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
Integrated Fin-Local Interconnect Structure
82
Patent #:
NONE
Issue Dt:
Application #:
11770798
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
Hybrid Fully-Silicided (FUSI)/Partially-Silicided (PASI) Structures
83
Patent #:
NONE
Issue Dt:
Application #:
11770843
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
CHARGE CARRIER BARRIER FOR IMAGE SENSOR
84
Patent #:
NONE
Issue Dt:
Application #:
11770867
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
Phase Locked Loop with Stabilized Dynamic Response
85
Patent #:
Issue Dt:
08/02/2011
Application #:
11770908
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
METHODS OF FORMING ALTERNATING REGIONS OF SI AND SIGE OR SIGEC ON A BURIED OXIDE LAYER ON A SUBSTRATE
86
Patent #:
Issue Dt:
05/18/2010
Application #:
11770928
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
METAL INTERCONNECT FORMING METHODS AND IC CHIP INCLUDING METAL INTERCONNECT
87
Patent #:
Issue Dt:
08/17/2010
Application #:
11770993
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
12/13/2007
Title:
METHOD OF CONTROLLING GRAIN SIZE IN A POLYSILICON LAYER AND IN SEMICONDUCTOR DEVICES HAVING POLYSILICON STRUCTURE
88
Patent #:
Issue Dt:
09/14/2010
Application #:
11771033
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
PHASE CHANGE MATERIAL BASED TEMPERATURE SENSOR
89
Patent #:
Issue Dt:
05/11/2010
Application #:
11771390
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
SYSTEM AND METHOD FOR FAULT MAPPING OF EXCEPTIONS ACROSS PROGRAMMING MODELS
90
Patent #:
Issue Dt:
04/26/2011
Application #:
11771457
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
PHASE CHANGE MEMORY CELL WITH VERTICAL TRANSISTOR
91
Patent #:
Issue Dt:
03/15/2011
Application #:
11771501
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
PHASE CHANGE MEMORY WITH TAPERED HEATER
92
Patent #:
Issue Dt:
04/26/2011
Application #:
11771854
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/01/2009
Title:
POLYMERIC MATERIAL, METHOD OF FORMING THE POLYMERIC MATERIAL, AND METHOD OF FORMING A THIN FILM USING THE POLYMERIC MATERIAL
93
Patent #:
Issue Dt:
06/28/2011
Application #:
11772347
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
MULTI-BIT ERROR CORRECTION SCHEME IN MULTI-LEVEL MEMORY STORAGE SYSTEM
94
Patent #:
Issue Dt:
06/21/2011
Application #:
11772356
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
MULTI-BIT ERROR CORRECTION SCHEME IN MULTI-LEVEL MEMORY STORAGE SYSTEM
95
Patent #:
Issue Dt:
10/26/2010
Application #:
11772418
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
12/06/2007
Title:
DIGITAL RELIABILITY MONITOR HAVING AUTONOMIC REPAIR AND NOTIFICATION CAPABILITY
96
Patent #:
Issue Dt:
03/09/2010
Application #:
11772464
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
ANTENNA ARRAY FEED LINE STRUCTURES FOR MILLIMETER WAVE APPLICATIONS
97
Patent #:
Issue Dt:
01/06/2009
Application #:
11772592
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
SHIFT REGISTER LATCH WITH EMBEDDED DYNAMIC RANDOM ACCESS MEMORY SCAN ONLY CELL
98
Patent #:
Issue Dt:
03/02/2010
Application #:
11772899
Filing Dt:
07/03/2007
Publication #:
Pub Dt:
11/01/2007
Title:
AIR-GAP INSULATED INTERCONNECTIONS
99
Patent #:
Issue Dt:
07/12/2011
Application #:
11772908
Filing Dt:
07/03/2007
Publication #:
Pub Dt:
01/08/2009
Title:
EFFICIENT UTILIZATION OF A MULTI-SOURCE NETWORK OF CONTROL LOGIC TO ACHIEVE TIMING CLOSURE IN A CLOCKED LOGIC CIRCUIT
100
Patent #:
NONE
Issue Dt:
Application #:
11773160
Filing Dt:
07/03/2007
Publication #:
Pub Dt:
01/08/2009
Title:
METHOD FOR DEPOSITION OF AN ULTRA-THIN ELECTROPOSITIVE METAL-CONTAINING CAP LAYER
Assignors
1
Exec Dt:
09/10/2015
2
Exec Dt:
09/10/2015
Assignee
1
PO BOX 309
UGLAND HOUSE
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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