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Reel/Frame:036779/0001   Pages: 985
Recorded: 10/05/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14854
Page 59 of 149
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149
1
Patent #:
7729161
Issue Dt:
06/01/2010
Application #:
11833143
Filing Dt:
08/02/2007
Publication #:
US20090034323
Pub Dt:
02/05/2009
Title:
PHASE CHANGE MEMORY WITH DUAL WORD LINES AND SOURCE LINES AND METHOD OF OPERATING SAME
2
Patent #:
8276038
Issue Dt:
09/25/2012
Application #:
11833274
Filing Dt:
08/03/2007
Publication #:
US20080055125
Pub Dt:
03/06/2008
Title:
DATA STORAGE SYSTEMS
3
Patent #:
8465657
Issue Dt:
06/18/2013
Application #:
11833283
Filing Dt:
08/03/2007
Publication #:
US20070267386
Pub Dt:
11/22/2007
Title:
POST CHEMICAL MECHANICAL POLISHING ETCH FOR IMPROVED TIME DEPENDENT DIELECTRIC BREAKDOWN RELIABILITY
4
Patent #:
NONE
Issue Dt:
Application #:
11833301
Filing Dt:
08/03/2007
Publication #:
US20090032491
Pub Dt:
02/05/2009
Title:
CONDUCTIVE ELEMENT FORMING USING SACRIFICIAL LAYER PATTERNED TO FORM DIELECTRIC LAYER
5
Patent #:
7969770
Issue Dt:
06/28/2011
Application #:
11833321
Filing Dt:
08/03/2007
Publication #:
US20090033358
Pub Dt:
02/05/2009
Title:
PROGRAMMABLE VIA DEVICES IN BACK END OF LINE LEVEL
6
Patent #:
7732932
Issue Dt:
06/08/2010
Application #:
11833348
Filing Dt:
08/03/2007
Publication #:
US20090032909
Pub Dt:
02/05/2009
Title:
SEMICONDUCTOR CHIPS WITH CRACK STOP REGIONS FOR REDUCING CRACK PROPAGATION FROM CHIP EDGES/CORNERS
7
Patent #:
7659534
Issue Dt:
02/09/2010
Application #:
11833354
Filing Dt:
08/03/2007
Publication #:
US20090033360
Pub Dt:
02/05/2009
Title:
PROGRAMMABLE VIA DEVICES WITH AIR GAP ISOLATION
8
Patent #:
7932552
Issue Dt:
04/26/2011
Application #:
11833538
Filing Dt:
08/03/2007
Publication #:
US20090033395
Pub Dt:
02/05/2009
Title:
MULTIPLE SOURCE-SINGLE DRAIN FIELD EFFECT SEMICONDUCTOR DEVICE AND CIRCUIT
9
Patent #:
NONE
Issue Dt:
Application #:
11833567
Filing Dt:
08/03/2007
Publication #:
US20090033389
Pub Dt:
02/05/2009
Title:
MICRO-PHASE ADJUSTING AND MICRO-PHASE ADJUSTING MIXER CIRCUITS DESIGNED WITH STANDARD FIELD EFFECT TRANSISTOR STRUCTURES
10
Patent #:
7941772
Issue Dt:
05/10/2011
Application #:
11834110
Filing Dt:
08/06/2007
Publication #:
US20090044054
Pub Dt:
02/12/2009
Title:
DYNAMIC CRITICAL PATH DETECTOR FOR DIGITAL LOGIC CIRCUIT PATHS
11
Patent #:
7749812
Issue Dt:
07/06/2010
Application #:
11834552
Filing Dt:
08/06/2007
Publication #:
US20090039499
Pub Dt:
02/12/2009
Title:
HEAT SINK WITH THERMALLY COMPLIANT BEAMS
12
Patent #:
8735243
Issue Dt:
05/27/2014
Application #:
11834641
Filing Dt:
08/06/2007
Publication #:
US20090039447
Pub Dt:
02/12/2009
Title:
FET DEVICE WITH STABILIZED THRESHOLD MODIFYING MATERIAL
13
Patent #:
7854547
Issue Dt:
12/21/2010
Application #:
11834752
Filing Dt:
08/07/2007
Publication #:
US20090041079
Pub Dt:
02/12/2009
Title:
BIDIRECTIONAL AND EXPANDABLE HEAT FLOW MEASUREMENT TOOL FOR UNITS OF AIR COOLED ELECTRICAL EQUIPMENT
14
Patent #:
NONE
Issue Dt:
Application #:
11834851
Filing Dt:
08/07/2007
Publication #:
US20090039331
Pub Dt:
02/12/2009
Title:
PHASE CHANGE MATERIAL STRUCTURES
15
Patent #:
NONE
Issue Dt:
Application #:
11834926
Filing Dt:
08/07/2007
Publication #:
US20090039916
Pub Dt:
02/12/2009
Title:
SYSTEMS AND APPARATUS FOR PROVIDING A MULTI-MODE MEMORY INTERFACE
16
Patent #:
7816762
Issue Dt:
10/19/2010
Application #:
11834956
Filing Dt:
08/07/2007
Publication #:
US20090039467
Pub Dt:
02/12/2009
Title:
ON-CHIP DECOUPLING CAPACITOR STRUCTURES
17
Patent #:
7968929
Issue Dt:
06/28/2011
Application #:
11834961
Filing Dt:
08/07/2007
Publication #:
US20090039465
Pub Dt:
02/12/2009
Title:
ON-CHIP DECOUPLING CAPACITOR STRUCTURES
18
Patent #:
7993498
Issue Dt:
08/09/2011
Application #:
11834971
Filing Dt:
08/07/2007
Publication #:
US20090038960
Pub Dt:
02/12/2009
Title:
APPARATUS AND METHOD OF ELECTROLYTIC REMOVAL OF METALS FROM A WAFER SURFACE
19
Patent #:
7741834
Issue Dt:
06/22/2010
Application #:
11835008
Filing Dt:
08/07/2007
Publication #:
US20090039911
Pub Dt:
02/12/2009
Title:
METHOD TO MONITOR SUBSTRATE VIABILITY BY A SENSOR MOUNTED TO A SUBSTRATE
20
Patent #:
7635856
Issue Dt:
12/22/2009
Application #:
11835167
Filing Dt:
08/07/2007
Publication #:
US20080017899
Pub Dt:
01/24/2008
Title:
VERTICAL NANOTUBE FIELD EFFECT TRANSISTOR
21
Patent #:
7800152
Issue Dt:
09/21/2010
Application #:
11835182
Filing Dt:
08/07/2007
Publication #:
US20080048233
Pub Dt:
02/28/2008
Title:
METHODS FOR MANUFACTURING A FINFET USING A CONVENTIONAL WAFER AND APPARATUS MANUFACTURED THEREFROM
22
Patent #:
7880243
Issue Dt:
02/01/2011
Application #:
11835310
Filing Dt:
08/07/2007
Publication #:
US20090039434
Pub Dt:
02/12/2009
Title:
SIMPLE LOW POWER CIRCUIT STRUCTURE WITH METAL GATE AND HIGH-K DIELECTRIC
23
Patent #:
7723798
Issue Dt:
05/25/2010
Application #:
11835318
Filing Dt:
08/07/2007
Publication #:
US20090039435
Pub Dt:
02/12/2009
Title:
LOW POWER CIRCUIT STRUCTURE WITH METAL GATE AND HIGH-K DIELECTRIC
24
Patent #:
7550323
Issue Dt:
06/23/2009
Application #:
11835800
Filing Dt:
08/08/2007
Publication #:
US20090042341
Pub Dt:
02/12/2009
Title:
ELECTRICAL FUSE WITH A THINNED FUSELINK MIDDLE PORTION
25
Patent #:
NONE
Issue Dt:
Application #:
11836193
Filing Dt:
08/09/2007
Publication #:
US20080036017
Pub Dt:
02/14/2008
Title:
METHOD AND STRUCTURE TO USE AN ETCH RESISTANT LINER ON TRANSISTOR GATE STRUCTURE TO ACHIEVE HIGH DEVICE PERFORMANCE
26
Patent #:
NONE
Issue Dt:
Application #:
11836215
Filing Dt:
08/09/2007
Publication #:
US20070273004
Pub Dt:
11/29/2007
Title:
LIKE INTEGRATED CIRCUIT DEVICES WITH DIFFERENT DEPTH
27
Patent #:
NONE
Issue Dt:
Application #:
11836226
Filing Dt:
08/09/2007
Publication #:
US20070267463
Pub Dt:
11/22/2007
Title:
APPARATUS FOR MOUNTING COLUMNS FOR GRID ARRAY ELECTRONIC PACKAGES
28
Patent #:
8512849
Issue Dt:
08/20/2013
Application #:
11836253
Filing Dt:
08/09/2007
Publication #:
US20090041989
Pub Dt:
02/12/2009
Title:
CORRUGATED INTERFACES FOR MULTILAYERED INTERCONNECTS
29
Patent #:
7740472
Issue Dt:
06/22/2010
Application #:
11836259
Filing Dt:
08/09/2007
Publication #:
US20080000536
Pub Dt:
01/03/2008
Title:
METHOD AND DEVICE FOR FLOWING A LIQUID ON A SURFACE
30
Patent #:
7456074
Issue Dt:
11/25/2008
Application #:
11836308
Filing Dt:
08/09/2007
Publication #:
US20070267286
Pub Dt:
11/22/2007
Title:
INCREASING AN ELECTRICAL RESISTANCE OF A RESISTOR BY NITRIDIZATION
31
Patent #:
NONE
Issue Dt:
Application #:
11836827
Filing Dt:
08/10/2007
Publication #:
US20070288787
Pub Dt:
12/13/2007
Title:
NOISE REDUCTION IN DIGITAL SYSTEMS
32
Patent #:
7958484
Issue Dt:
06/07/2011
Application #:
11836842
Filing Dt:
08/10/2007
Publication #:
US20070276896
Pub Dt:
11/29/2007
Title:
AFFINITY-BASED CLUSTERING OF VECTORS FOR PARTITIONING THE COLUMNS OF A MATRIX
33
Patent #:
7712069
Issue Dt:
05/04/2010
Application #:
11837033
Filing Dt:
08/10/2007
Publication #:
US20080022255
Pub Dt:
01/24/2008
Title:
METHOD FOR INTERLAYER AND YIELD BASED OPTICAL PROXIMITY CORRECTION
34
Patent #:
7652332
Issue Dt:
01/26/2010
Application #:
11837057
Filing Dt:
08/10/2007
Publication #:
US20090039426
Pub Dt:
02/12/2009
Title:
EXTREMELY-THIN SILICON-ON-INSULATOR TRANSISTOR WITH RAISED SOURCE/DRAIN
35
Patent #:
7709967
Issue Dt:
05/04/2010
Application #:
11837723
Filing Dt:
08/13/2007
Publication #:
US20070273048
Pub Dt:
11/29/2007
Title:
SHAPES-BASED MIGRATION OF ALUMINUM DESIGNS TO COPPER DAMASCENE
36
Patent #:
7761821
Issue Dt:
07/20/2010
Application #:
11837732
Filing Dt:
08/13/2007
Publication #:
US20070277129
Pub Dt:
11/29/2007
Title:
TECHNOLOGY MIGRATION FOR INTEGRATED CIRCUITS WITH RADICAL DESIGN RESTRICTIONS
37
Patent #:
7498250
Issue Dt:
03/03/2009
Application #:
11837768
Filing Dt:
08/13/2007
Publication #:
US20070275551
Pub Dt:
11/29/2007
Title:
SHAPES-BASED MIGRATION OF ALUMINUM DESIGNS TO COPPER DAMASCENE
38
Patent #:
8055976
Issue Dt:
11/08/2011
Application #:
11837785
Filing Dt:
08/13/2007
Publication #:
US20090049365
Pub Dt:
02/19/2009
Title:
SYSTEM AND METHOD FOR PROVIDING ERROR CORRECTION AND DETECTION IN A MEMORY SYSTEM
39
Patent #:
7698678
Issue Dt:
04/13/2010
Application #:
11837945
Filing Dt:
08/13/2007
Publication #:
US20080301592
Pub Dt:
12/04/2008
Title:
METHODOLOGY FOR AUTOMATED DESIGN OF VERTICAL PARALLEL PLATE CAPACITORS
40
Patent #:
NONE
Issue Dt:
Application #:
11837968
Filing Dt:
08/13/2007
Publication #:
US20070272425
Pub Dt:
11/29/2007
Title:
Multidimensional Compliant Thermal Cap for an Electronic Device
41
Patent #:
7558136
Issue Dt:
07/07/2009
Application #:
11838341
Filing Dt:
08/14/2007
Publication #:
US20070291562
Pub Dt:
12/20/2007
Title:
INTERNALLY ASYMMETRIC METHODS AND CIRCUITS FOR EVALUATING STATIC MEMORY CELL DYNAMIC STABILITY
42
Patent #:
7774732
Issue Dt:
08/10/2010
Application #:
11838368
Filing Dt:
08/14/2007
Publication #:
US20090049418
Pub Dt:
02/19/2009
Title:
METHOD FOR RADIATION TOLERANCE BY AUTOMATED PLACEMENT
43
Patent #:
7893549
Issue Dt:
02/22/2011
Application #:
11838507
Filing Dt:
08/14/2007
Publication #:
US20090045530
Pub Dt:
02/19/2009
Title:
MICROELECTRONIC LITHOGRAPHIC ALIGNMENT USING HIGH CONTRAST ALIGNMENT MARK
44
Patent #:
7755921
Issue Dt:
07/13/2010
Application #:
11838663
Filing Dt:
08/14/2007
Publication #:
US20090046493
Pub Dt:
02/19/2009
Title:
METHOD AND APPARATUS FOR FABRICATING SUB-LITHOGRAPHY DATA TRACKS FOR USE IN MAGNETIC SHIFT REGISTER MEMORY DEVICES
45
Patent #:
NONE
Issue Dt:
Application #:
11838929
Filing Dt:
08/15/2007
Publication #:
US20090045836
Pub Dt:
02/19/2009
Title:
ASIC LOGIC LIBRARY OF FLEXIBLE LOGIC BLOCKS AND METHOD TO ENABLE ENGINEERING CHANGE
46
Patent #:
7388274
Issue Dt:
06/17/2008
Application #:
11838931
Filing Dt:
08/15/2007
Publication #:
US20070272961
Pub Dt:
11/29/2007
Title:
CAPACITOR BELOW THE BURIED OXIDE OF SOI CMOS TECHNOLOGIES FOR PROTECTION AGAINST SOFT ERRORS
47
Patent #:
NONE
Issue Dt:
Application #:
11838934
Filing Dt:
08/15/2007
Publication #:
US20070284669
Pub Dt:
12/13/2007
Title:
METHOD AND STRUCTURE TO PROCESS THICK AND THIN FINS AND VARIABLE FIN TO FIN SPACING
48
Patent #:
7511940
Issue Dt:
03/31/2009
Application #:
11838939
Filing Dt:
08/15/2007
Publication #:
US20080019077
Pub Dt:
01/24/2008
Title:
FORMATION OF METAL-INSULATOR-METAL CAPACITOR SIMULTANEOUSLY WITH ALUMINUM METAL WIRING LEVEL USING A HARDMASK
49
Patent #:
7566921
Issue Dt:
07/28/2009
Application #:
11838941
Filing Dt:
08/15/2007
Publication #:
US20070272946
Pub Dt:
11/29/2007
Title:
SILICON GERMANIUM EMITTER
50
Patent #:
7732292
Issue Dt:
06/08/2010
Application #:
11838948
Filing Dt:
08/15/2007
Publication #:
US20070275535
Pub Dt:
11/29/2007
Title:
BIPOLAR TRANSISTOR WITH SELF-ALIGNED RETROGRADE EXTRINSIC BASE IMPLANT PROFILE AND SELF-ALIGNED SILICIDE
51
Patent #:
8030167
Issue Dt:
10/04/2011
Application #:
11839106
Filing Dt:
08/15/2007
Publication #:
US20070275534
Pub Dt:
11/29/2007
Title:
VARIED IMPURITY PROFILE REGION FORMATION FOR VARYING BREAKDOWN VOLTAGE OF DEVICES
52
Patent #:
NONE
Issue Dt:
Application #:
11839239
Filing Dt:
08/15/2007
Publication #:
US20070274125
Pub Dt:
11/29/2007
Title:
Enhanced Programming Performance in a Nonvolatile Memory Device Having a Bipolar Programmable Storage Element
53
Patent #:
NONE
Issue Dt:
Application #:
11839258
Filing Dt:
08/15/2007
Publication #:
US20070281469
Pub Dt:
12/06/2007
Title:
MODIFIED VIA BOTTOM STRUCTURE FOR RELIABILITY ENHANCEMENT
54
Patent #:
7585765
Issue Dt:
09/08/2009
Application #:
11839260
Filing Dt:
08/15/2007
Publication #:
US20070275557
Pub Dt:
11/29/2007
Title:
FORMATION OF OXIDATION-RESISTANT SEED LAYER FOR INTERCONNECT APPLICATIONS
55
Patent #:
8012848
Issue Dt:
09/06/2011
Application #:
11839585
Filing Dt:
08/16/2007
Publication #:
US20090045468
Pub Dt:
02/19/2009
Title:
TRENCH ISOLATION AND METHOD OF FABRICATING TRENCH ISOLATION
56
Patent #:
7805639
Issue Dt:
09/28/2010
Application #:
11839689
Filing Dt:
08/16/2007
Publication #:
US20090049011
Pub Dt:
02/19/2009
Title:
TOOL TO REPORT THE STATUS AND DRILL-DOWN OF AN APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT
57
Patent #:
7493236
Issue Dt:
02/17/2009
Application #:
11839714
Filing Dt:
08/16/2007
Publication #:
US20090048700
Pub Dt:
02/19/2009
Title:
METHOD FOR REPORTING THE STATUS OF A CONTROL APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT
58
Patent #:
NONE
Issue Dt:
Application #:
11839716
Filing Dt:
08/16/2007
Publication #:
US20090045484
Pub Dt:
02/19/2009
Title:
METHODS AND SYSTEMS INVOLVING ELECTRICALLY REPROGRAMMABLE FUSES
59
Patent #:
7835814
Issue Dt:
11/16/2010
Application #:
11839749
Filing Dt:
08/16/2007
Publication #:
US20090049345
Pub Dt:
02/19/2009
Title:
TOOL FOR REPORTING THE STATUS AND DRILL-DOWN OF A CONTROL APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT
60
Patent #:
7915162
Issue Dt:
03/29/2011
Application #:
11839767
Filing Dt:
08/16/2007
Publication #:
US20080096384
Pub Dt:
04/24/2008
Title:
METHOD OF FORMING DAMASCENE FILAMENT WIRES
61
Patent #:
7793162
Issue Dt:
09/07/2010
Application #:
11839796
Filing Dt:
08/16/2007
Publication #:
US20090048701
Pub Dt:
02/19/2009
Title:
METHOD FOR REPORTING THE STATUS AND DRILL-DOWN OF A CONTROL APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT
62
Patent #:
NONE
Issue Dt:
Application #:
11839891
Filing Dt:
08/16/2007
Publication #:
US20070278624
Pub Dt:
12/06/2007
Title:
DAMASCENE FILAMENT WIRE STRUCTURE
63
Patent #:
7935637
Issue Dt:
05/03/2011
Application #:
11839934
Filing Dt:
08/16/2007
Publication #:
US20090047784
Pub Dt:
02/19/2009
Title:
RESIST STRIPPING METHODS USING BACKFILLING MATERIAL LAYER
64
Patent #:
7396747
Issue Dt:
07/08/2008
Application #:
11840029
Filing Dt:
08/16/2007
Publication #:
US20070278517
Pub Dt:
12/06/2007
Title:
HETERO-INTEGRATED STRAINED SILICON N- AND P- MOSFETS
65
Patent #:
NONE
Issue Dt:
Application #:
11840337
Filing Dt:
08/17/2007
Publication #:
US20070297330
Pub Dt:
12/27/2007
Title:
Scalable Link-Level Flow-Control For A Switching Device
66
Patent #:
NONE
Issue Dt:
Application #:
11840389
Filing Dt:
08/17/2007
Publication #:
US20070281439
Pub Dt:
12/06/2007
Title:
Techniques for Layer Transfer Processing
67
Patent #:
7473975
Issue Dt:
01/06/2009
Application #:
11840774
Filing Dt:
08/17/2007
Publication #:
US20070281431
Pub Dt:
12/06/2007
Title:
FULLY SILICIDED METAL GATE SEMICONDUCTOR DEVICE STRUCTURE
68
Patent #:
7473608
Issue Dt:
01/06/2009
Application #:
11840795
Filing Dt:
08/17/2007
Publication #:
US20070281413
Pub Dt:
12/06/2007
Title:
N-CHANNEL MOSFETS COMPRISING DUAL STRESSORS, AND METHODS FOR FORMING THE SAME
69
Patent #:
7491623
Issue Dt:
02/17/2009
Application #:
11841018
Filing Dt:
08/20/2007
Publication #:
US20080057673
Pub Dt:
03/06/2008
Title:
METHOD OF MAKING A SEMICONDUCTOR STRUCTURE
70
Patent #:
7514361
Issue Dt:
04/07/2009
Application #:
11841114
Filing Dt:
08/20/2007
Publication #:
US20090053890
Pub Dt:
02/26/2009
Title:
SELECTIVE THIN METAL CAP PROCESS
71
Patent #:
NONE
Issue Dt:
Application #:
11841120
Filing Dt:
08/20/2007
Publication #:
US20090051026
Pub Dt:
02/26/2009
Title:
PROCESS FOR FORMING METAL FILM AND RELEASE LAYER ON POLYMER
72
Patent #:
7539772
Issue Dt:
05/26/2009
Application #:
11841163
Filing Dt:
08/20/2007
Publication #:
US20070280248
Pub Dt:
12/06/2007
Title:
METHOD FOR FACILITATING FORWARDING OF DATA PACKETS THROUGH A NODE OF A DATA TRANSFER NETWORK USING MULTIPLE TYPES OF FORWARDING TABLES
73
Patent #:
NONE
Issue Dt:
Application #:
11841247
Filing Dt:
08/20/2007
Publication #:
US20070278582
Pub Dt:
12/06/2007
Title:
STRUCTURE AND METHOD FOR IMPLEMENTING OXIDE LEAKAGE BASED VOLTAGE DIVIDER NETWORK FOR INTEGRATED CIRCUIT DEVICES
74
Patent #:
8055822
Issue Dt:
11/08/2011
Application #:
11842206
Filing Dt:
08/21/2007
Publication #:
US20090055826
Pub Dt:
02/26/2009
Title:
MULTICORE PROCESSOR HAVING STORAGE FOR CORE-SPECIFIC OPERATIONAL DATA
75
Patent #:
7741658
Issue Dt:
06/22/2010
Application #:
11842437
Filing Dt:
08/21/2007
Publication #:
US20090050942
Pub Dt:
02/26/2009
Title:
SELF-ALIGNED SUPER STRESSED PFET
76
Patent #:
7957826
Issue Dt:
06/07/2011
Application #:
11842515
Filing Dt:
08/21/2007
Publication #:
US20090053627
Pub Dt:
02/26/2009
Title:
METHODS FOR NORMALIZING ERROR IN PHOTOLITHOGRAPHIC PROCESSES
77
Patent #:
7360188
Issue Dt:
04/15/2008
Application #:
11842533
Filing Dt:
08/21/2007
Publication #:
US20070288872
Pub Dt:
12/13/2007
Title:
METHOD AND APPARATUS FOR CHARACTERISTIC IMPEDANCE DISCONTINUITY REDUCTION IN HIGH-SPEED FLEXIBLE CIRCUIT APPLICATIONS
78
Patent #:
7759766
Issue Dt:
07/20/2010
Application #:
11843047
Filing Dt:
08/22/2007
Publication #:
US20090051002
Pub Dt:
02/26/2009
Title:
ELECTRICAL FUSE HAVING A THIN FUSELINK
79
Patent #:
7730020
Issue Dt:
06/01/2010
Application #:
11843763
Filing Dt:
08/23/2007
Publication #:
US20070288795
Pub Dt:
12/13/2007
Title:
DIAGNOSIS OF EQUIPMENT FAILURES USING AN INTEGRATED APPROACH OF CASE BASED REASONING AND RELIABILITY ANALYSIS
80
Patent #:
7793167
Issue Dt:
09/07/2010
Application #:
11843791
Filing Dt:
08/23/2007
Publication #:
US20090055688
Pub Dt:
02/26/2009
Title:
DETECTION AND CORRECTION OF DROPPED WRITE ERRORS IN A DATA STORAGE SYSTEM
81
Patent #:
7793168
Issue Dt:
09/07/2010
Application #:
11843804
Filing Dt:
08/23/2007
Publication #:
US20090055584
Pub Dt:
02/26/2009
Title:
DETECTION AND CORRECTION OF DROPPED WRITE ERRORS IN A DATA STORAGE SYSTEM
82
Patent #:
NONE
Issue Dt:
Application #:
11843946
Filing Dt:
08/23/2007
Publication #:
US20090051003
Pub Dt:
02/26/2009
Title:
Methods and Structures Involving Electrically Programmable Fuses
83
Patent #:
7960808
Issue Dt:
06/14/2011
Application #:
11844109
Filing Dt:
08/23/2007
Publication #:
US20070290233
Pub Dt:
12/20/2007
Title:
REPROGRAMMABLE FUSE STRUCTURE AND METHOD
84
Patent #:
8589832
Issue Dt:
11/19/2013
Application #:
11844397
Filing Dt:
08/24/2007
Publication #:
US20090052153
Pub Dt:
02/26/2009
Title:
ON CHIP SHIELDING STRUCTURE FOR INTEGRATED CIRCUITS OR DEVICES ON A SUBSTRATE AND METHOD OF SHIELDING
85
Patent #:
7964081
Issue Dt:
06/21/2011
Application #:
11844587
Filing Dt:
08/24/2007
Publication #:
US20090050486
Pub Dt:
02/26/2009
Title:
ENHANCED MAGNETIC PLATING METHOD
86
Patent #:
7521582
Issue Dt:
04/21/2009
Application #:
11844769
Filing Dt:
08/24/2007
Publication #:
US20080033200
Pub Dt:
02/07/2008
Title:
PRECURSORS TO FLUOROALKANOL-CONTAINING OLEFIN MONOMERS, AND ASSOCIATED METHODS OF SYNTHESIS AND USE
87
Patent #:
7442828
Issue Dt:
10/28/2008
Application #:
11844806
Filing Dt:
08/24/2007
Publication #:
US20080033202
Pub Dt:
02/07/2008
Title:
PRECURSORS TO FLUOROALKANOL-CONTAINING OLEFIN MONOMERS, AND ASSOCIATED METHODS OF SYNTHESIS AND USE
88
Patent #:
7378542
Issue Dt:
05/27/2008
Application #:
11844831
Filing Dt:
08/24/2007
Publication #:
US20080033198
Pub Dt:
02/07/2008
Title:
PRECURSORS TO FLUOROALKANOL-CONTAINING OLEFIN MONOMERS, AND ASSOCIATED METHODS OF SYNTHESIS AND USE
89
Patent #:
7810065
Issue Dt:
10/05/2010
Application #:
11844861
Filing Dt:
08/24/2007
Publication #:
US20090055134
Pub Dt:
02/26/2009
Title:
SYSTEM AND METHOD FOR IMPLEMENTING OPTIMIZED CREATION OF OPENINGS FOR DE-GASSING IN AN ELECTRONIC PACKAGE
90
Patent #:
NONE
Issue Dt:
Application #:
11845301
Filing Dt:
08/27/2007
Publication #:
US20080148213
Pub Dt:
06/19/2008
Title:
ROUTING METHOD FOR REDUCING COUPLING BETWEEN WIRES OF AN ELECTRONIC CIRCUIT
91
Patent #:
7515489
Issue Dt:
04/07/2009
Application #:
11845386
Filing Dt:
08/27/2007
Publication #:
US20090059705
Pub Dt:
03/05/2009
Title:
SRAM HAVING ACTIVE WRITE ASSIST FOR IMPROVED OPERATIONAL MARGINS
92
Patent #:
7586806
Issue Dt:
09/08/2009
Application #:
11845395
Filing Dt:
08/27/2007
Publication #:
US20090059706
Pub Dt:
03/05/2009
Title:
SRAM ACTIVE WRITE ASSIST METHOD FOR IMPROVED OPERATIONAL MARGINS
93
Patent #:
NONE
Issue Dt:
Application #:
11845448
Filing Dt:
08/27/2007
Publication #:
US20090057755
Pub Dt:
03/05/2009
Title:
SPACER UNDERCUT FILLER, METHOD OF MANUFACTURE THEREOF AND ARTICLES COMPRISING THE SAME
94
Patent #:
8032851
Issue Dt:
10/04/2011
Application #:
11845852
Filing Dt:
08/28/2007
Publication #:
US20080184186
Pub Dt:
07/31/2008
Title:
A DESIGN STRUCTURE FOR AN INTEGRATED CIRCUIT DESIGN FOR REDUCING COUPLING BETWEEN WIRES OF AN ELECTRONIC CIRCUIT
95
Patent #:
7446395
Issue Dt:
11/04/2008
Application #:
11845888
Filing Dt:
08/28/2007
Publication #:
US20070292696
Pub Dt:
12/20/2007
Title:
DEVICE HAVING DUAL ETCH STOP LINER AND PROTECTIVE LAYER
96
Patent #:
NONE
Issue Dt:
Application #:
11845892
Filing Dt:
08/28/2007
Publication #:
US20080059933
Pub Dt:
03/06/2008
Title:
Method and System for Designing Fan-out Nets Connecting a Signal Source and Plurality of Active Net Elements in an Integrated Circuit
97
Patent #:
NONE
Issue Dt:
Application #:
11845972
Filing Dt:
08/28/2007
Publication #:
US20070290250
Pub Dt:
12/20/2007
Title:
MULTIPLE DIELECTRIC FINFET STRUCTURE AND METHOD
98
Patent #:
NONE
Issue Dt:
Application #:
11846182
Filing Dt:
08/28/2007
Publication #:
US20090061237
Pub Dt:
03/05/2009
Title:
LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT
99
Patent #:
7687867
Issue Dt:
03/30/2010
Application #:
11846248
Filing Dt:
08/28/2007
Publication #:
US20070290359
Pub Dt:
12/20/2007
Title:
INEXPENSIVE METHOD OF FABRICATING A HIGHER PERFORMANCE CAPACITANCE DENSITY MIMCAP INTEGRABLE INTO A COPPER INTERCONNECT SCHEME
100
Patent #:
NONE
Issue Dt:
Application #:
11846250
Filing Dt:
08/28/2007
Publication #:
US20090061649
Pub Dt:
03/05/2009
Title:
LOW k POROUS SiCOH DIELECTRIC AND INTEGRATION WITH POST FILM FORMATION TREATMENT
Assignors
1
GLOBALFOUNDRIES U.S. 2 LLC
Exec Dt:
09/10/2015
2
GLOBALFOUNDRIES U.S. INC.
Exec Dt:
09/10/2015
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309
UGLAND HOUSE
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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