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Reel/Frame:036779/0001   Pages: 985
Recorded: 10/05/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 14854
Page 76 of 149
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1
Patent #:
7900809
Issue Dt:
03/08/2011
Application #:
12146798
Filing Dt:
06/26/2008
Publication #:
US20080261350
Pub Dt:
10/23/2008
Title:
SOLDER INTERCONNECTION ARRAY WITH OPTIMAL MECHANICAL INTEGRITY
2
Patent #:
8306794
Issue Dt:
11/06/2012
Application #:
12146852
Filing Dt:
06/26/2008
Publication #:
US20090326879
Pub Dt:
12/31/2009
Title:
TECHNIQUES FOR THERMAL MODELING OF DATA CENTERS TO IMPROVE ENERGY EFFICIENCY
3
Patent #:
7622942
Issue Dt:
11/24/2009
Application #:
12147024
Filing Dt:
06/26/2008
Publication #:
US20080258752
Pub Dt:
10/23/2008
Title:
METHOD AND APPARATUS FOR MEASURING DEVICE MISMATCHES
4
Patent #:
8214699
Issue Dt:
07/03/2012
Application #:
12147670
Filing Dt:
06/27/2008
Publication #:
US20090327620
Pub Dt:
12/31/2009
Title:
CIRCUIT STRUCTURE AND METHOD FOR DIGITAL INTEGRATED CIRCUIT PERFORMANCE SCREENING
5
Patent #:
7830737
Issue Dt:
11/09/2010
Application #:
12147685
Filing Dt:
06/27/2008
Publication #:
US20090322376
Pub Dt:
12/31/2009
Title:
SMI MEMORY READ DATA CAPTURE MARGIN CHARACTERIZATION CIRCUITS AND METHODS
6
Patent #:
8009268
Issue Dt:
08/30/2011
Application #:
12154003
Filing Dt:
05/19/2008
Publication #:
US20080225251
Pub Dt:
09/18/2008
Title:
IMMERSION OPTICAL LITHOGRAPHY SYSTEM HAVING PROTECTIVE OPTICAL COATING
7
Patent #:
7692439
Issue Dt:
04/06/2010
Application #:
12154304
Filing Dt:
05/22/2008
Publication #:
US20080231312
Pub Dt:
09/25/2008
Title:
STRUCTURE FOR MODELING STRESS-INDUCED DEGRADATION OF CONDUCTIVE INTERCONNECTS
8
Patent #:
7695776
Issue Dt:
04/13/2010
Application #:
12154568
Filing Dt:
05/23/2008
Publication #:
US20080286493
Pub Dt:
11/20/2008
Title:
TRANSPARENT HARD COATS FOR OPTICAL ELEMENTS
9
Patent #:
8144726
Issue Dt:
03/27/2012
Application #:
12154796
Filing Dt:
05/27/2008
Publication #:
US20090300562
Pub Dt:
12/03/2009
Title:
DESIGN STRUCTURE FOR OUT OF BAND SIGNALING ENHANCEMENT FOR HIGH SPEED SERIAL DRIVER
10
Patent #:
7716007
Issue Dt:
05/11/2010
Application #:
12163025
Filing Dt:
06/27/2008
Publication #:
US20090024972
Pub Dt:
01/22/2009
Title:
DESIGN STRUCTURES OF POWERING ON INTEGRATED CIRCUIT
11
Patent #:
7964497
Issue Dt:
06/21/2011
Application #:
12163172
Filing Dt:
06/27/2008
Publication #:
US20090321933
Pub Dt:
12/31/2009
Title:
STRUCTURE TO FACILITATE PLATING INTO HIGH ASPECT RATIO VIAS
12
Patent #:
8290760
Issue Dt:
10/16/2012
Application #:
12163318
Filing Dt:
06/27/2008
Publication #:
US20090192776
Pub Dt:
07/30/2009
Title:
CHARGE-BASED CIRCUIT ANALYSIS
13
Patent #:
7652288
Issue Dt:
01/26/2010
Application #:
12163389
Filing Dt:
06/27/2008
Publication #:
US20090026459
Pub Dt:
01/29/2009
Title:
EPITAXIAL AND POLYCRYSTALLINE GROWTH OF SI1-X-YGEXCY AND SI1-YCY ALLOY LAYERS ON SI BY UHV-CVD
14
Patent #:
8134225
Issue Dt:
03/13/2012
Application #:
12164152
Filing Dt:
06/30/2008
Publication #:
US20080265396
Pub Dt:
10/30/2008
Title:
QUAD FLAT NO-LEAD CHIP CARRIER WITH STANDOFF
15
Patent #:
7915732
Issue Dt:
03/29/2011
Application #:
12164447
Filing Dt:
06/30/2008
Publication #:
US20090321914
Pub Dt:
12/31/2009
Title:
PRODUCTION OF INTEGRATED CIRCUIT CHIP PACKAGES PROHIBITING FORMATION OF MICRO SOLDER BALLS
16
Patent #:
7886435
Issue Dt:
02/15/2011
Application #:
12164478
Filing Dt:
06/30/2008
Publication #:
US20080296054
Pub Dt:
12/04/2008
Title:
HIGH PERFORMANCE CHIP CARRIER SUBSTRATE
17
Patent #:
7876565
Issue Dt:
01/25/2011
Application #:
12164576
Filing Dt:
06/30/2008
Publication #:
US20090016028
Pub Dt:
01/15/2009
Title:
METHOD OF OBTAINING ENHANCED LOCALIZED THERMAL INTERFACE REGIONS BY PARTICLE STACKING
18
Patent #:
7738753
Issue Dt:
06/15/2010
Application #:
12164580
Filing Dt:
06/30/2008
Publication #:
US20090324162
Pub Dt:
12/31/2009
Title:
CMOS COMPATIBLE INTEGRATED DIELECTRIC OPTICAL WAVEGUIDE COUPLER AND FABRICATION
19
Patent #:
7948051
Issue Dt:
05/24/2011
Application #:
12164599
Filing Dt:
06/30/2008
Publication #:
US20080265415
Pub Dt:
10/30/2008
Title:
NONLITHOGRAPHIC METHOD TO PRODUCE SELF-ALIGNED MASK, ARTICLES PRODUCED BY SAME AND COMPOSITIONS FOR SAME
20
Patent #:
NONE
Issue Dt:
Application #:
12164603
Filing Dt:
06/30/2008
Publication #:
US20100017009
Pub Dt:
01/21/2010
Title:
SYSTEM FOR MONITORING MULTI-ORDERABLE MEASUREMENT DATA
21
Patent #:
8491987
Issue Dt:
07/23/2013
Application #:
12164647
Filing Dt:
06/30/2008
Publication #:
US20080265382
Pub Dt:
10/30/2008
Title:
SELECTIVELY COATED SELF-ALIGNED MASK
22
Patent #:
7851783
Issue Dt:
12/14/2010
Application #:
12164690
Filing Dt:
06/30/2008
Publication #:
US20090032803
Pub Dt:
02/05/2009
Title:
METHOD AND APPARATUS FOR FABRICATING A CARBON NANOTUBE TRANSISTOR
23
Patent #:
7856609
Issue Dt:
12/21/2010
Application #:
12164781
Filing Dt:
06/30/2008
Publication #:
US20080256499
Pub Dt:
10/16/2008
Title:
USING CONSTRAINTS IN DESIGN VERIFICATION
24
Patent #:
7793173
Issue Dt:
09/07/2010
Application #:
12164869
Filing Dt:
06/30/2008
Publication #:
US20080263417
Pub Dt:
10/23/2008
Title:
EFFICIENT MEMORY PRODUCT FOR TEST AND SOFT REPAIR OF SRAM WITH REDUNDANCY
25
Patent #:
8347289
Issue Dt:
01/01/2013
Application #:
12165009
Filing Dt:
06/30/2008
Publication #:
US20080263563
Pub Dt:
10/23/2008
Title:
METHOD AND APPARATUS FOR ONLINE SAMPLE INTERVAL DETERMINATION
26
Patent #:
7904185
Issue Dt:
03/08/2011
Application #:
12165134
Filing Dt:
06/30/2008
Publication #:
US20080270061
Pub Dt:
10/30/2008
Title:
SYSTEM AND METHOD FOR SENSOR REPLICATION FOR ENSEMBLE AVERAGING IN MICRO-ELECTROMECHANICAL SYSTEM (MEMS)
27
Patent #:
7549095
Issue Dt:
06/16/2009
Application #:
12165355
Filing Dt:
06/30/2008
Title:
ERROR DETECTION ENHANCEMENT IN A MICROPROCESSOR THROUGH THE USE OF A SECOND DEPENDENCY MATRIX
28
Patent #:
7782646
Issue Dt:
08/24/2010
Application #:
12165530
Filing Dt:
06/30/2008
Publication #:
US20090323384
Pub Dt:
12/31/2009
Title:
HIGH DENSITY CONTENT ADDRESSABLE MEMORY USING PHASE CHANGE DEVICES
29
Patent #:
7812397
Issue Dt:
10/12/2010
Application #:
12166285
Filing Dt:
07/01/2008
Publication #:
US20080283918
Pub Dt:
11/20/2008
Title:
ULTRA THIN CHANNEL (UTC) MOSFET STRUCTURE FORMED ON BOX REGIONS HAVING DIFFERENT DEPTHS AND DIFFERENT THICKNESSES BENEATH THE UTC AND SOURCEDRAIN REGIONS AND METHOD OF MANUFACTURE THEREOF
30
Patent #:
7751217
Issue Dt:
07/06/2010
Application #:
12166311
Filing Dt:
07/01/2008
Publication #:
US20100002481
Pub Dt:
01/07/2010
Title:
CONTENT ADDRESSABLE MEMORY USING PHASE CHANGE DEVICES
31
Patent #:
8110875
Issue Dt:
02/07/2012
Application #:
12166362
Filing Dt:
07/02/2008
Publication #:
US20080265422
Pub Dt:
10/30/2008
Title:
STRUCTURE FOR CHARGE DISSIPATION DURING FABRICATION OF INTEGRATED CIRCUITS AND ISOLATION THEREOF
32
Patent #:
7984546
Issue Dt:
07/26/2011
Application #:
12166373
Filing Dt:
07/02/2008
Publication #:
US20080264568
Pub Dt:
10/30/2008
Title:
TOOL FOR FILLING VIAS IN A GREENSHEET
33
Patent #:
7810702
Issue Dt:
10/12/2010
Application #:
12166523
Filing Dt:
07/02/2008
Publication #:
US20100001045
Pub Dt:
01/07/2010
Title:
SOLDER STANDOFFS FOR INJECTION MOLDING OF SOLDER
34
Patent #:
8234611
Issue Dt:
07/31/2012
Application #:
12166550
Filing Dt:
07/02/2008
Publication #:
US20100005435
Pub Dt:
01/07/2010
Title:
SYSTEM AND METHOD FOR MODELING I/O SIMULTANEOUS SWITCHING NOISE
35
Patent #:
7934046
Issue Dt:
04/26/2011
Application #:
12166571
Filing Dt:
07/02/2008
Publication #:
US20100005213
Pub Dt:
01/07/2010
Title:
ACCESS TABLE LOOKUP FOR BUS BRIDGE
36
Patent #:
7898045
Issue Dt:
03/01/2011
Application #:
12166623
Filing Dt:
07/02/2008
Publication #:
US20080258246
Pub Dt:
10/23/2008
Title:
PASSIVE ELECTRICALLY TESTABLE ACCELERATION AND VOLTAGE MEASUREMENT DEVICES
37
Patent #:
NONE
Issue Dt:
Application #:
12166690
Filing Dt:
07/02/2008
Publication #:
US20080258198
Pub Dt:
10/23/2008
Title:
STABILIZATION OF FLATBAND VOLTAGES AND THRESHOLD VOLTAGES IN HAFNIUM OXIDE BASED SILICON TRANSISTORS FOR CMOS
38
Patent #:
7863091
Issue Dt:
01/04/2011
Application #:
12166773
Filing Dt:
07/02/2008
Publication #:
US20090075502
Pub Dt:
03/19/2009
Title:
PLANAR ARRAY CONTACT MEMORY CARDS
39
Patent #:
7552413
Issue Dt:
06/23/2009
Application #:
12166811
Filing Dt:
07/02/2008
Publication #:
US20080270963
Pub Dt:
10/30/2008
Title:
SYSTEM AND COMPUTER PROGRAM FOR VERIFYING PERFORMANCE OF AN ARRAY BY SIMULATING OPERATION OF EDGE CELLS IN A FULL ARRAY MODEL
40
Patent #:
7864566
Issue Dt:
01/04/2011
Application #:
12166934
Filing Dt:
07/02/2008
Publication #:
US20100002499
Pub Dt:
01/07/2010
Title:
PHASE CHANGE MEMORY PROGRAMMING METHOD WITHOUT RESET OVER-WRITE
41
Patent #:
8157970
Issue Dt:
04/17/2012
Application #:
12166958
Filing Dt:
07/02/2008
Publication #:
US20080264783
Pub Dt:
10/30/2008
Title:
SPUTTERING TARGET FIXTURE
42
Patent #:
7720956
Issue Dt:
05/18/2010
Application #:
12167275
Filing Dt:
07/03/2008
Publication #:
US20080259953
Pub Dt:
10/23/2008
Title:
METHOD, SYSTEM, AND STORAGE MEDIUM FOR PROVIDING CONTINUOUS COMMUNICATION BETWEEN PROCESS EQUIPMENT AND AN AUTOMATED MATERIAL HANDLING SYSTEM
43
Patent #:
7817481
Issue Dt:
10/19/2010
Application #:
12167300
Filing Dt:
07/03/2008
Publication #:
US20100002495
Pub Dt:
01/07/2010
Title:
COLUMN SELECTABLE SELF-BIASING VIRTUAL VOLTAGES FOR SRAM WRITE ASSIST
44
Patent #:
7749905
Issue Dt:
07/06/2010
Application #:
12167686
Filing Dt:
07/03/2008
Publication #:
US20080293246
Pub Dt:
11/27/2008
Title:
VERTICAL FET WITH NANOWIRE CHANNELS AND A SILICIDED BOTTOM CONTACT
45
Patent #:
8123997
Issue Dt:
02/28/2012
Application #:
12167817
Filing Dt:
07/03/2008
Publication #:
US20080292825
Pub Dt:
11/27/2008
Title:
LOW TEMPERATURE MELT-PROCESSING OF ORGANIC-INORGANIC HYBRID
46
Patent #:
NONE
Issue Dt:
Application #:
12167947
Filing Dt:
07/03/2008
Publication #:
US20080262981
Pub Dt:
10/23/2008
Title:
Method, System and Computer Program for Operational-Risk Modeling
47
Patent #:
7890905
Issue Dt:
02/15/2011
Application #:
12168153
Filing Dt:
07/06/2008
Publication #:
US20080295051
Pub Dt:
11/27/2008
Title:
SLEW CONSTRAINED MINIMUM COST BUFFERING
48
Patent #:
NONE
Issue Dt:
Application #:
12168310
Filing Dt:
07/07/2008
Publication #:
US20100003605
Pub Dt:
01/07/2010
Title:
SYSTEM AND METHOD FOR PROJECTION LITHOGRAPHY WITH IMMERSED IMAGE-ALIGNED DIFFRACTIVE ELEMENT
49
Patent #:
7728774
Issue Dt:
06/01/2010
Application #:
12168328
Filing Dt:
07/07/2008
Publication #:
US20100001906
Pub Dt:
01/07/2010
Title:
RADIO FREQUENCY (RF) INTEGRATED CIRCUIT (IC) PACKAGES HAVING CHARACTERISTICS SUITABLE FOR MASS PRODUCTION
50
Patent #:
7870528
Issue Dt:
01/11/2011
Application #:
12168793
Filing Dt:
07/07/2008
Publication #:
US20080270966
Pub Dt:
10/30/2008
Title:
METHOD AND SYSTEM FOR UNFOLDING/REPLICATING LOGIC PATHS TO FACILITATE MODELING OF METASTABLE VALUE PROPAGATION
51
Patent #:
7776624
Issue Dt:
08/17/2010
Application #:
12168945
Filing Dt:
07/08/2008
Publication #:
US20100009524
Pub Dt:
01/14/2010
Title:
METHOD FOR IMPROVING SEMICONDUCTOR SURFACES
52
Patent #:
7855110
Issue Dt:
12/21/2010
Application #:
12169118
Filing Dt:
07/08/2008
Publication #:
US20100006952
Pub Dt:
01/14/2010
Title:
FIELD EFFECT TRANSISTOR AND METHOD OF FABRICATING SAME
53
Patent #:
NONE
Issue Dt:
Application #:
12169664
Filing Dt:
07/09/2008
Publication #:
US20080270864
Pub Dt:
10/30/2008
Title:
DIFFERENCE SIGNAL PATH TEST AND CHARACTERIZATION CIRCUIT
54
Patent #:
NONE
Issue Dt:
Application #:
12169667
Filing Dt:
07/09/2008
Publication #:
US20080265333
Pub Dt:
10/30/2008
Title:
STRUCTURE AND METHOD FOR ENHANCED TRIPLE WELL LATCHUP ROBUSTNESS
55
Patent #:
8135558
Issue Dt:
03/13/2012
Application #:
12169668
Filing Dt:
07/09/2008
Publication #:
US20080270065
Pub Dt:
10/30/2008
Title:
AUTOMATED SIMULATION TESTBENCH GENERATION FOR SERIALIZER/DESERIALIZER DATAPATH SYSTEMS
56
Patent #:
7573284
Issue Dt:
08/11/2009
Application #:
12169670
Filing Dt:
07/09/2008
Publication #:
US20080270057
Pub Dt:
10/30/2008
Title:
INCREASE PRODUCTIVITY AT WAFER TEST USING PROBE RETEST DATA ANALYSIS
57
Patent #:
7781800
Issue Dt:
08/24/2010
Application #:
12169674
Filing Dt:
07/09/2008
Publication #:
US20080265281
Pub Dt:
10/30/2008
Title:
EMBEDDED SILICON GERMANIUM USING A DOUBLE BURIED OXIDE SILICON-ON-INSULATOR WAFER
58
Patent #:
7671666
Issue Dt:
03/02/2010
Application #:
12169705
Filing Dt:
07/09/2008
Publication #:
US20080265983
Pub Dt:
10/30/2008
Title:
METHODS TO REDUCE THRESHOLD VOLTAGE TOLERANCE AND SKEW IN MULTI-THRESHOLD VOLTAGE APPLICATIONS
59
Patent #:
7776706
Issue Dt:
08/17/2010
Application #:
12169727
Filing Dt:
07/09/2008
Publication #:
US20090079030
Pub Dt:
03/26/2009
Title:
FORMING SOI TRENCH MEMORY WITH SINGLE-SIDED BURIED STRAP
60
Patent #:
7727848
Issue Dt:
06/01/2010
Application #:
12169806
Filing Dt:
07/09/2008
Publication #:
US20080268610
Pub Dt:
10/30/2008
Title:
METHODS AND SEMICONDUCTOR STRUCTURES FOR LATCH-UP SUPPRESSION USING A CONDUCTIVE REGION
61
Patent #:
8097516
Issue Dt:
01/17/2012
Application #:
12169991
Filing Dt:
07/09/2008
Publication #:
US20080290379
Pub Dt:
11/27/2008
Title:
DUAL TRENCH ISOLATION FOR CMOS WITH HYBRID ORIENTATIONS
62
Patent #:
7772096
Issue Dt:
08/10/2010
Application #:
12170459
Filing Dt:
07/10/2008
Publication #:
US20100006985
Pub Dt:
01/14/2010
Title:
FORMATION OF SOI BY OXIDATION OF SILICON WITH ENGINEERED POROSITY GRADIENT
63
Patent #:
8234554
Issue Dt:
07/31/2012
Application #:
12170462
Filing Dt:
07/10/2008
Publication #:
US20100011278
Pub Dt:
01/14/2010
Title:
SOFT ERROR CORRECTION IN SLEEPING PROCESSORS
64
Patent #:
8198103
Issue Dt:
06/12/2012
Application #:
12170634
Filing Dt:
07/10/2008
Publication #:
US20080286972
Pub Dt:
11/20/2008
Title:
ADDITION OF BALLAST HYDROCARBON GAS TO DOPED POLYSILICON ETCH MASKED BY RESIST
65
Patent #:
7790553
Issue Dt:
09/07/2010
Application #:
12170687
Filing Dt:
07/10/2008
Publication #:
US20100006926
Pub Dt:
01/14/2010
Title:
METHODS FOR FORMING HIGH PERFORMANCE GATES AND STRUCTURES THEREOF
66
Patent #:
8609327
Issue Dt:
12/17/2013
Application #:
12170722
Filing Dt:
07/10/2008
Publication #:
US20100009298
Pub Dt:
01/14/2010
Title:
FORMING SUB-LITHOGRAPHIC PATTERNS USING DOUBLE EXPOSURE
67
Patent #:
8614150
Issue Dt:
12/24/2013
Application #:
12170956
Filing Dt:
07/10/2008
Publication #:
US20090017632
Pub Dt:
01/15/2009
Title:
METHODS OF MANUFACTURING SEMICONDUCTOR STRUCTURES USING RIE PROCESS
68
Patent #:
7535776
Issue Dt:
05/19/2009
Application #:
12170993
Filing Dt:
07/10/2008
Title:
CIRCUIT FOR IMPROVED SRAM WRITE AROUND WITH REDUCED READ ACCESS PENALTY
69
Patent #:
7911049
Issue Dt:
03/22/2011
Application #:
12171602
Filing Dt:
07/11/2008
Publication #:
US20080272862
Pub Dt:
11/06/2008
Title:
ELECTRICALLY OPTIMIZED AND STRUCTURALLY PROTECTED VIA STRUCTURE FOR HIGH SPEED SIGNALS
70
Patent #:
8084193
Issue Dt:
12/27/2011
Application #:
12172233
Filing Dt:
07/12/2008
Publication #:
US20100009132
Pub Dt:
01/14/2010
Title:
SELF-SEGREGATING MULTILAYER IMAGING STACK WITH BUILT-IN ANTIREFLECTIVE PROPERTIES
71
Patent #:
7945883
Issue Dt:
05/17/2011
Application #:
12172300
Filing Dt:
07/14/2008
Publication #:
US20080270968
Pub Dt:
10/30/2008
Title:
APPARATUS, AND COMPUTER PROGRAM FOR IMPLEMENTING VERTICALLY COUPLED NOISE CONTROL THROUGH A MESH PLANE IN AN ELECTRONIC PACKAGE DESIGN
72
Patent #:
8637953
Issue Dt:
01/28/2014
Application #:
12172452
Filing Dt:
07/14/2008
Publication #:
US20100006972
Pub Dt:
01/14/2010
Title:
WAFER SCALE MEMBRANE FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE FABRICATION
73
Patent #:
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Title:
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Pub Dt:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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Title:
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12174312
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Pub Dt:
06/25/2009
Title:
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Assignors
1
GLOBALFOUNDRIES U.S. 2 LLC
Exec Dt:
09/10/2015
2
GLOBALFOUNDRIES U.S. INC.
Exec Dt:
09/10/2015
Assignee
1
GLOBALFOUNDRIES INC.
PO BOX 309
UGLAND HOUSE
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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