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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:036779/0001   Pages: 985
Recorded: 10/05/2015
Attorney Dkt #:3718.266
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
12/27/2011
Application #:
12948246
Filing Dt:
11/17/2010
Title:
METHOD OF FORMING REPLACEMENT METAL GATE WITH BORDERLESS CONTACT AND STRUCTURE THEREOF
2
Patent #:
Issue Dt:
11/12/2013
Application #:
12948805
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
05/24/2012
Title:
METHOD OF FABRICATING FIELD EFFECT TRANSISTORS WITH LOW K SIDEWALL SPACERS
3
Patent #:
Issue Dt:
08/07/2012
Application #:
12949108
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
03/17/2011
Title:
BIPOLAR TRANSISTOR WITH RAISED EXTRINSIC SELF-ALIGNED BASE USING SELECTIVE EPITAXIAL GROWTH FOR BICMOS INTEGRATION
4
Patent #:
Issue Dt:
08/13/2013
Application #:
12949148
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
05/24/2012
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A CUT-WAY HOLE TO EXPOSE A PORTION OF A HARDMASK LAYER
5
Patent #:
Issue Dt:
06/18/2013
Application #:
12949158
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
05/19/2011
Title:
Method of Forming Metal Interconnect Structures in Ultra Low-K Dielectrics
6
Patent #:
Issue Dt:
12/04/2012
Application #:
12949328
Filing Dt:
11/18/2010
Publication #:
Pub Dt:
05/24/2012
Title:
PARTITIONING FOR HARDWARE-ACCELERATED FUNCTIONAL VERIFICATION
7
Patent #:
Issue Dt:
10/29/2013
Application #:
12949888
Filing Dt:
11/19/2010
Publication #:
Pub Dt:
05/24/2012
Title:
SOURCE/DRAIN-TO-SOURCE/DRAIN RECESSED STRAP AND METHODS OF MANUFACTURE OF SAME
8
Patent #:
Issue Dt:
06/24/2014
Application #:
12949998
Filing Dt:
11/19/2010
Publication #:
Pub Dt:
11/24/2011
Title:
CIRCUIT MACRO PLACEMENT USING MACRO ASPECT RATIO BASED ON PORTS
9
Patent #:
Issue Dt:
10/22/2013
Application #:
12950508
Filing Dt:
11/19/2010
Publication #:
Pub Dt:
05/24/2012
Title:
THERMAL SENSOR FOR SEMICONDUCTOR CIRCUITS
10
Patent #:
Issue Dt:
07/16/2013
Application #:
12950635
Filing Dt:
11/19/2010
Publication #:
Pub Dt:
05/24/2012
Title:
THIN FILM RESISTORS AND METHODS OF MANUFACTURE
11
Patent #:
Issue Dt:
07/23/2013
Application #:
12951107
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
05/24/2012
Title:
METHOD OF FORMING E-FUSE IN REPLACEMENT METAL GATE MANUFACTURING PROCESS
12
Patent #:
Issue Dt:
03/05/2013
Application #:
12951516
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
05/24/2012
Title:
HETEROJUNCTION BIPOLAR TRANSISTORS WITH REDUCED BASE RESISTANCE
13
Patent #:
Issue Dt:
02/19/2013
Application #:
12951575
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
05/24/2012
Title:
ISOLATION FET FOR INTEGRATED CIRCUIT
14
Patent #:
Issue Dt:
01/21/2014
Application #:
12951597
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
05/24/2012
Title:
FABRICATING PHOTONICS DEVICES FULLY INTEGRATED INTO A CMOS MANUFACTURING PROCESS
15
Patent #:
NONE
Issue Dt:
Application #:
12951674
Filing Dt:
11/22/2010
Publication #:
Pub Dt:
03/24/2011
Title:
OPTICAL SENSOR INCLUDING STACKED PHOTODIODES
16
Patent #:
Issue Dt:
07/09/2013
Application #:
12952346
Filing Dt:
11/23/2010
Publication #:
Pub Dt:
05/26/2011
Title:
DEVICE COMPRISING A CANTILEVER AND SCANNING SYSTEM
17
Patent #:
Issue Dt:
07/31/2012
Application #:
12952372
Filing Dt:
11/23/2010
Publication #:
Pub Dt:
05/24/2012
Title:
BORDERLESS CONTACT FOR REPLACEMENT GATE EMPLOYING SELECTIVE DEPOSITION
18
Patent #:
Issue Dt:
07/16/2013
Application #:
12952465
Filing Dt:
11/23/2010
Publication #:
Pub Dt:
05/26/2011
Title:
Method of Manufacturing a Photovoltaic Cell
19
Patent #:
Issue Dt:
12/31/2013
Application #:
12953511
Filing Dt:
11/24/2010
Publication #:
Pub Dt:
05/24/2012
Title:
DETERMINING LITHOGRAPHIC SET POINT USING OPTICAL PROXIMITY CORRECTION VERIFICATION SIMULATION
20
Patent #:
NONE
Issue Dt:
Application #:
12953654
Filing Dt:
11/24/2010
Publication #:
Pub Dt:
03/24/2011
Title:
SEMICONDUCTOR CHIP PACKAGES HAVING REDUCED STRESS
21
Patent #:
NONE
Issue Dt:
Application #:
12953727
Filing Dt:
11/24/2010
Publication #:
Pub Dt:
05/24/2012
Title:
VARIATION AWARE TESTING OF SMALL RANDOM DELAY DEFECTS
22
Patent #:
Issue Dt:
10/30/2012
Application #:
12954155
Filing Dt:
11/24/2010
Publication #:
Pub Dt:
05/24/2012
Title:
VERTICAL NPNP STRUCTURE IN A TRIPLE WELL CMOS PROCESS
23
Patent #:
Issue Dt:
05/28/2013
Application #:
12954946
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
05/31/2012
Title:
REPLACEMENT METAL GATE STRUCTURES PROVIDING INDEPENDENT CONTROL ON WORK FUNCTION AND GATE LEAKAGE CURRENT
24
Patent #:
NONE
Issue Dt:
Application #:
12955088
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
05/31/2012
Title:
HIGH-VOLTAGE SEMICONDUCTOR-ON-INSULATOR DEVICE
25
Patent #:
Issue Dt:
09/03/2013
Application #:
12955203
Filing Dt:
11/29/2010
Publication #:
Pub Dt:
05/31/2012
Title:
III-V COMPOUND SEMICONDUCTOR MATERIAL PASSIVATION WITH CRYSTALLINE INTERLAYER
26
Patent #:
Issue Dt:
03/20/2012
Application #:
12955224
Filing Dt:
11/29/2010
Title:
FORMING AN OXIDE MEMS BEAM
27
Patent #:
Issue Dt:
03/13/2012
Application #:
12955883
Filing Dt:
11/29/2010
Title:
REMOVABLE AND REPLACEABLE DUAL-SIDED CONNECTOR PIN INTERPOSER
28
Patent #:
Issue Dt:
04/01/2014
Application #:
12956343
Filing Dt:
11/30/2010
Publication #:
Pub Dt:
05/31/2012
Title:
DESIGN STRUCTURE FOR A FREQUENCY ADAPTIVE LEVEL SHIFTER CIRCUIT
29
Patent #:
Issue Dt:
09/04/2012
Application #:
12957420
Filing Dt:
12/01/2010
Publication #:
Pub Dt:
06/07/2012
Title:
CIRCUIT DESIGN APPROXIMATION
30
Patent #:
Issue Dt:
09/02/2014
Application #:
12957431
Filing Dt:
12/01/2010
Publication #:
Pub Dt:
03/31/2011
Title:
METHOD FOR FORMING A CURRENT DISTRIBUTION STRUCTURE
31
Patent #:
Issue Dt:
02/05/2013
Application #:
12957881
Filing Dt:
12/01/2010
Publication #:
Pub Dt:
03/24/2011
Title:
METHOD AND SYSTEM FOR ESTIMATING POWER CONSUMPTION OF INTEGRATED CIRCUITRY
32
Patent #:
Issue Dt:
10/30/2012
Application #:
12958431
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
METHOD FOR ENABLING MULTIPLE INCOMPATIBLE OR COSTLY TIMING ENVIRONMENTS FOR EFFICIENT TIMING CLOSURE
33
Patent #:
Issue Dt:
04/23/2013
Application #:
12958607
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
Self-Aligned Contact For Replacement Gate Devices
34
Patent #:
Issue Dt:
07/09/2013
Application #:
12958608
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
SELF-ALIGNED CONTACT COMBINED WITH A REPLACEMENT METAL GATE/HIGH-K GATE DIELECTRIC
35
Patent #:
Issue Dt:
08/20/2013
Application #:
12958637
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
CHARACTERIZATION OF NONLINEAR CELL MACRO MODEL FOR TIMING ANALYSIS
36
Patent #:
Issue Dt:
02/10/2015
Application #:
12958979
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
PARAMETER VARIATION IMPROVEMENT
37
Patent #:
Issue Dt:
01/29/2013
Application #:
12959029
Filing Dt:
12/02/2010
Publication #:
Pub Dt:
06/07/2012
Title:
RESOLVING GLOBAL COUPLING TIMING AND SLEW VIOLATIONS FOR BUFFER-DOMINATED DESIGNS
38
Patent #:
Issue Dt:
10/30/2012
Application #:
12959697
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
UNDERCUT-REPAIR OF BARRIER LAYER METALLURGY FOR SOLDER BUMPS AND METHODS THEREOF
39
Patent #:
Issue Dt:
02/11/2014
Application #:
12959824
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
METHOD OF FORMING SUBSTRATE CONTACT FOR SEMICONDUCTOR ON INSULATOR (SOI) SUBSTRATE
40
Patent #:
Issue Dt:
01/29/2013
Application #:
12959883
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
STATIC RANDOM ACCESS MEMORY (SRAM) WRITE ASSIST CIRCUIT WITH LEAKAGE SUPPRESSION AND LEVEL CONTROL
41
Patent #:
Issue Dt:
07/02/2013
Application #:
12959993
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
PROGRAM DISTURB ERROR LOGGING AND CORRECTION FOR FLASH MEMORY
42
Patent #:
Issue Dt:
06/11/2013
Application #:
12960004
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
PROBABILISTIC MULTI-TIER ERROR CORRECTION IN NOT-AND (NAND) FLASH MEMORY
43
Patent #:
Issue Dt:
10/30/2012
Application #:
12960110
Filing Dt:
12/03/2010
Publication #:
Pub Dt:
06/07/2012
Title:
OFFSET SOLDER VIAS, METHODS OF MANUFACTURING AND DESIGN STRUCTURES
44
Patent #:
Issue Dt:
04/16/2013
Application #:
12960586
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
06/07/2012
Title:
REPLACEMENT GATE DEVICES WITH BARRIER METAL FOR SIMULTANEOUS PROCESSING
45
Patent #:
Issue Dt:
06/18/2013
Application #:
12960589
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
06/07/2012
Title:
STRUCTURE AND METHOD FOR Vt TUNING AND SHORT CHANNEL CONTROL WITH HIGH K/METAL GATE MOSFETs
46
Patent #:
Issue Dt:
02/19/2013
Application #:
12960593
Filing Dt:
12/06/2010
Publication #:
Pub Dt:
06/07/2012
Title:
POLY RESISTOR AND METAL GATE FABRICATION AND STRUCTURE
47
Patent #:
Issue Dt:
10/29/2013
Application #:
12961553
Filing Dt:
12/07/2010
Publication #:
Pub Dt:
06/07/2012
Title:
METAL SEMICONDUCTOR ALLOY CONTACT WITH LOW RESISTANCE
48
Patent #:
Issue Dt:
11/26/2013
Application #:
12962722
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
THERMALLY CONTROLLED REFRACTORY METAL RESISTOR
49
Patent #:
Issue Dt:
08/27/2013
Application #:
12963054
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
SEMICONDUCTOR DEVICE INCLUDING ASYMMETRIC LIGHTLY DOPED DRAIN (LDD) REGION, RELATED METHOD AND DESIGN STRUCTURE
50
Patent #:
Issue Dt:
07/23/2013
Application #:
12963139
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
SOLDER BUMP CONNECTIONS
51
Patent #:
Issue Dt:
10/02/2012
Application #:
12963246
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
CREATING SCAN CHAIN DEFINITION FROM HIGH-LEVEL MODEL USING HIGH-LEVEL MODEL SIMULATION
52
Patent #:
Issue Dt:
04/09/2013
Application #:
12963314
Filing Dt:
12/08/2010
Publication #:
Pub Dt:
06/14/2012
Title:
NARROW-BAND WIDE-RANGE FREQUENCY MODULATION CONTINUOUS WAVE (FMCW) RADAR SYSTEM
53
Patent #:
Issue Dt:
11/20/2012
Application #:
12963677
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
06/14/2012
Title:
MULTISTAGE, HYBRID SYNTHESIS PROCESSING FACILITATING INTEGRATED CIRCUIT LAYOUT
54
Patent #:
Issue Dt:
03/12/2013
Application #:
12963965
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
06/14/2012
Title:
DATA SECURITY FOR DYNAMIC RANDOM ACCESS MEMORY AT POWER-UP
55
Patent #:
Issue Dt:
08/20/2013
Application #:
12964082
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
06/14/2012
Title:
PSEUDO BUTTED JUNCTION STRUCTURE FOR BACK PLANE CONNECTION
56
Patent #:
Issue Dt:
10/15/2013
Application #:
12964340
Filing Dt:
12/09/2010
Publication #:
Pub Dt:
06/14/2012
Title:
ADDING SCALABILITY AND FAULT TOLERANCE TO GENERIC FINITE STATE MACHINE FRAMEWORKS FOR USE IN AUTOMATED INCIDENT MANAGEMENT OF CLOUD COMPUTING INFRASTRUCTURES
57
Patent #:
Issue Dt:
12/25/2012
Application #:
12964807
Filing Dt:
12/10/2010
Publication #:
Pub Dt:
06/14/2012
Title:
ASYNCHRONOUS DELETION OF A RANGE OF MESSAGES PROCESSED BY A PARALLEL DATABASE REPLICATION APPLY PROCESS
58
Patent #:
Issue Dt:
10/04/2011
Application #:
12964831
Filing Dt:
12/10/2010
Title:
TEMPORARY ETCHABLE LINER FOR FORMING AIR GAP
59
Patent #:
Issue Dt:
06/25/2013
Application #:
12966432
Filing Dt:
12/13/2010
Publication #:
Pub Dt:
06/14/2012
Title:
NITRIDE ETCH FOR IMPROVED SPACER UNIFORMITY
60
Patent #:
Issue Dt:
12/17/2013
Application #:
12967114
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
SELF-PROTECTED ELECTROSTATIC DISCHARGE FIELD EFFECT TRANSISTOR (SPESDFET), AN INTEGRATED CIRCUIT INCORPORATING THE SPESDFET AS AN INPUT/OUTPUT (I/O) PAD DRIVER AND ASSOCIATED METHODS OF FORMING THE SPESDFET AND THE INTEGRATED CIRCUIT
61
Patent #:
Issue Dt:
08/20/2013
Application #:
12967268
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
12/22/2011
Title:
TRANSISTOR STRUCTURE WITH A SIDEWALL-DEFINED INTRINSIC BASE TO EXTRINSIC BASE LINK-UP REGION AND METHOD OF FORMING THE TRANSISTOR
62
Patent #:
Issue Dt:
11/19/2013
Application #:
12967308
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
ELECTRICAL FUSE WITH A CURRENT SHUNT
63
Patent #:
Issue Dt:
05/06/2014
Application #:
12967323
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
MEASUREMENT OF CMOS DEVICE CHANNEL STRAIN BY X-RAY DIFFRACTION
64
Patent #:
NONE
Issue Dt:
Application #:
12967328
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
Oxide Based LED BEOL Integration
65
Patent #:
Issue Dt:
04/15/2014
Application #:
12967329
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
PARTIALLY DEPLETED (PD) SEMICONDUCTOR-ON-INSULATOR (SOI) FIELD EFFECT TRANSISTOR (FET) STRUCTURE WITH A GATE-TO-BODY TUNNEL CURRENT REGION FOR THRESHOLD VOLTAGE (VT) LOWERING AND METHOD OF FORMING THE STRUCTURE
66
Patent #:
Issue Dt:
06/17/2014
Application #:
12967625
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
METHOD OF FABRICATING PHOTOCONDUCTOR-ON-ACTIVE PIXEL DEVICE
67
Patent #:
Issue Dt:
01/03/2012
Application #:
12967633
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
04/14/2011
Title:
CONTACT METALLURGY STRUCTURE
68
Patent #:
Issue Dt:
12/16/2014
Application #:
12967771
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
DEVICE ISOLATION WITH IMPROVED THERMAL CONDUCTIVITY
69
Patent #:
Issue Dt:
06/25/2013
Application #:
12968001
Filing Dt:
12/14/2010
Publication #:
Pub Dt:
06/14/2012
Title:
METHODS AND STRUCTURES FOR INCREASED THERMAL DISSIPATION OF THIN FILM RESISTORS
70
Patent #:
Issue Dt:
02/25/2014
Application #:
12968864
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
06/21/2012
Title:
STRESS TESTING OF SILICON-ON-INSULATOR SUBSTRATES USING APPLIED ELECTROSTATIC DISCHARGE
71
Patent #:
Issue Dt:
05/21/2013
Application #:
12969004
Filing Dt:
12/15/2010
Publication #:
Pub Dt:
06/21/2012
Title:
METAL-INSULATOR-METAL CAPACITORS WITH HIGH CAPACITANCE DENSITY
72
Patent #:
Issue Dt:
02/11/2014
Application #:
12971199
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
06/21/2012
Title:
BURIED OXIDATION FOR ENHANCED MOBILITY
73
Patent #:
Issue Dt:
08/11/2015
Application #:
12971239
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
04/14/2011
Title:
BALL GRID ARRAY AND CARD SKEW MATCHING OPTIMIZATION
74
Patent #:
Issue Dt:
09/09/2014
Application #:
12971243
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
06/21/2012
Title:
Deposition of Hydrogenated Thin Film
75
Patent #:
Issue Dt:
09/10/2013
Application #:
12971292
Filing Dt:
12/17/2010
Publication #:
Pub Dt:
06/21/2012
Title:
Fluoroalcohol Containing Molecular Photoresist Materials and Processes of Use
76
Patent #:
Issue Dt:
08/07/2012
Application #:
12972771
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
04/14/2011
Title:
HYBRID ORIENTATION SEMICONDUCTOR STRUCTURE WITH REDUCED BOUNDARY DEFECTS AND METHOD OF FORMING SAME
77
Patent #:
Issue Dt:
03/26/2013
Application #:
12972879
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
06/21/2012
Title:
TASK-BASED MULTI-PROCESS DESIGN SYNTHESIS
78
Patent #:
Issue Dt:
03/05/2013
Application #:
12972934
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
06/21/2012
Title:
TASK-BASED MULTI-PROCESS DESIGN SYNTHESIS WITH NOTIFICATION OF TRANSFORM SIGNATURES
79
Patent #:
Issue Dt:
12/25/2012
Application #:
12972980
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
06/21/2012
Title:
TASK-BASED MULTI-PROCESS DESIGN SYNTHESIS WITH REPRODUCIBLE TRANSFORMS
80
Patent #:
Issue Dt:
08/07/2012
Application #:
12973062
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
04/14/2011
Title:
COPPER CONTAMINATION DETECTION METHOD AND SYSTEM FOR MONITORING COPPER CONTAMINATION
81
Patent #:
Issue Dt:
03/20/2012
Application #:
12973063
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
08/25/2011
Title:
FORMATION OF CARBON AND SEMICONDUCTOR NANOMATERIALS USING MOLECULAR ASSEMBLIES
82
Patent #:
Issue Dt:
02/17/2015
Application #:
12973147
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
83
Patent #:
Issue Dt:
04/01/2014
Application #:
12973285
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
84
Patent #:
Issue Dt:
05/13/2014
Application #:
12973430
Filing Dt:
12/20/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
85
Patent #:
Issue Dt:
06/12/2012
Application #:
12974451
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
04/21/2011
Title:
DEEP TRENCH CAPACITOR IN A SOI SUBSTRATE HAVING A LATERALLY PROTRUDING BURIED STRAP
86
Patent #:
Issue Dt:
08/02/2016
Application #:
12974854
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
12/29/2011
Title:
PLANAR CAVITY MEMS AND RELATED STRUCTURES, METHODS OF MANUFACTURE AND DESIGN STRUCTURES
87
Patent #:
Issue Dt:
12/17/2013
Application #:
12975208
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
04/21/2011
Title:
MAGNETIC HEADS HAVING MAGNETIC FILMS THAT ARE MORE RECESSED THAN INSULATING FILMS, AND SYSTEMS HAVING SUCH HEADS
88
Patent #:
Issue Dt:
02/04/2014
Application #:
12975327
Filing Dt:
12/21/2010
Publication #:
Pub Dt:
06/21/2012
Title:
INTEGRATED CIRCUIT SYSTEM WITH REDUCED POLYSILICON RESIDUE AND METHOD OF MANUFACTURE THEREOF
89
Patent #:
Issue Dt:
03/13/2012
Application #:
12976445
Filing Dt:
12/22/2010
Publication #:
Pub Dt:
04/21/2011
Title:
EFFICIENT INTERCONNECT STRUCTURE FOR ELECTRICAL FUSE APPLICATIONS
90
Patent #:
Issue Dt:
10/22/2013
Application #:
12977134
Filing Dt:
12/23/2010
Publication #:
Pub Dt:
04/21/2011
Title:
ELECTRICALLY CONDUCTIVE PATH FORMING BELOW BARRIER OXIDE LAYER AND INTEGRATED CIRCUIT
91
Patent #:
Issue Dt:
07/29/2014
Application #:
12981017
Filing Dt:
12/29/2010
Publication #:
Pub Dt:
07/05/2012
Title:
CHANNEL MARKING FOR CHIP MARK OVERFLOW AND CALIBRATION ERRORS
92
Patent #:
Issue Dt:
11/05/2013
Application #:
12982014
Filing Dt:
12/30/2010
Publication #:
Pub Dt:
07/21/2011
Title:
MATERIALS AND METHODS FOR IMMOBILIZATION OF CATALYSTS ON SURFACES AND FOR SELECTIVE ELECTROLESS METALLIZATION
93
Patent #:
Issue Dt:
03/20/2012
Application #:
12983297
Filing Dt:
01/01/2011
Publication #:
Pub Dt:
06/02/2011
Title:
CHEMICAL TRIM OF PHOTORESIST LINES BY MEANS OF A TUNED OVERCOAT
94
Patent #:
Issue Dt:
09/24/2013
Application #:
12983352
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
07/05/2012
Title:
SEMICONDUCTOR DEVICE INCLUDING BODY CONNECTED FETS
95
Patent #:
Issue Dt:
06/25/2013
Application #:
12983353
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
07/05/2012
Title:
STRUCTURE, METHOD AND SYSTEM FOR COMPLEMENTARY STRAIN FILL FOR INTEGRATED CIRCUIT CHIPS
96
Patent #:
Issue Dt:
04/16/2013
Application #:
12983377
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
04/28/2011
Title:
METHOD FOR DIRECT HEAT SINK ATTACHMENT
97
Patent #:
Issue Dt:
10/30/2012
Application #:
12983439
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
07/05/2012
Title:
LATERAL EXTENDED DRAIN METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (LEDMOSFET) WITH TAPERED DIELECTRIC PLATES
98
Patent #:
Issue Dt:
09/09/2014
Application #:
12983477
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
05/12/2011
Title:
METHOD OF FORMING ASYMMETRIC SPACERS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICE USING ASYMMETRIC SPACERS
99
Patent #:
Issue Dt:
06/17/2014
Application #:
12983489
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
07/05/2012
Title:
JUNCTION FIELD EFFECT TRANSISTOR STRUCTURE WITH P-TYPE SILICON GERMANIUM OR SILICON GERMANIUM CARBIDE GATE(S) AND METHOD OF FORMING THE STRUCTURE
100
Patent #:
Issue Dt:
01/15/2013
Application #:
12983552
Filing Dt:
01/03/2011
Publication #:
Pub Dt:
04/28/2011
Title:
SMALL AREA, ROBUST SILICON VIA STRUCTURE AND PROCESS
Assignors
1
Exec Dt:
09/10/2015
2
Exec Dt:
09/10/2015
Assignee
1
PO BOX 309
UGLAND HOUSE
GRAND CAYMAN, CAYMAN ISLANDS KY1-1104
Correspondence name and address
HESLIN ROTHENBERG FARLEY & MESITI P.C.
5 COLUMBIA CIRCLE
ALBANY, NY 12203

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