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Patent Assignment Details
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Reel/Frame:036835/0019   Pages: 17
Recorded: 10/20/2015
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 15
1
Patent #:
Issue Dt:
10/15/2002
Application #:
08349281
Filing Dt:
12/05/1994
Title:
MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
2
Patent #:
Issue Dt:
04/06/1999
Application #:
08851287
Filing Dt:
05/05/1997
Title:
APPARATUS AND METHOD FOR OBSERVING THE MODE OF A MEMORY DEVICE
3
Patent #:
Issue Dt:
02/23/1999
Application #:
08976835
Filing Dt:
11/24/1997
Title:
DYNAMIC MEMORY DEVICE WITH REFRESH CIRCUIT AND REFRESH METHOD
4
Patent #:
Issue Dt:
12/28/1999
Application #:
09089719
Filing Dt:
06/03/1998
Title:
MICROCONTROLLER HAVING A NON-VOLATILE MEMORY AND A METHOD FOR SELECTING AN OPERATIONAL MODE
5
Patent #:
Issue Dt:
02/01/2000
Application #:
09123927
Filing Dt:
07/27/1998
Title:
METHOD AND APPARATUS FOR PRECHARGING BITLINES IN A NONVOLATILE MEMORY
6
Patent #:
Issue Dt:
10/03/2000
Application #:
09130343
Filing Dt:
08/13/1998
Title:
COMPLIMENTARY DOUBLE PUMPING VOLTAGE BOOST CONVERTER
7
Patent #:
Issue Dt:
08/31/1999
Application #:
09134943
Filing Dt:
08/17/1998
Title:
CIRCUIT FOR ELETROSTATIC DISCHARGE PROTECTION
8
Patent #:
Issue Dt:
12/05/2000
Application #:
09261876
Filing Dt:
03/02/1999
Title:
INTEGRATED CIRCUIT MEMORY HAVING A FUSE DETECT CIRCUIT AND METHOD THEREFOR
9
Patent #:
Issue Dt:
12/10/2002
Application #:
09479093
Filing Dt:
01/07/2000
Title:
INTEGRATED CIRCUIT HAVING BUFFERING CIRCUITRY WITH SLEW RATE CONTROL
10
Patent #:
Issue Dt:
04/16/2002
Application #:
09599378
Filing Dt:
06/22/2000
Title:
Method for forming a conductive plug between conductive layers of an integrated circuit
11
Patent #:
Issue Dt:
06/21/2005
Application #:
10465753
Filing Dt:
06/19/2003
Publication #:
Pub Dt:
12/23/2004
Title:
METHOD AND APPARATUS FOR DUAL OUTPUT VOLTAGE REGULATION
12
Patent #:
Issue Dt:
07/12/2005
Application #:
10675005
Filing Dt:
09/30/2003
Publication #:
Pub Dt:
03/31/2005
Title:
INTEGRATED CIRCUIT POWER MANAGEMENT FOR REDUCING LEAKAGE CURRENT IN CIRCUIT ARRAYS AND METHOD THEREFOR
13
Patent #:
Issue Dt:
02/24/2009
Application #:
11468521
Filing Dt:
08/30/2006
Publication #:
Pub Dt:
03/06/2008
Title:
CIRCUITRY FOR LATCHING
14
Patent #:
Issue Dt:
03/16/2010
Application #:
11550900
Filing Dt:
10/19/2006
Publication #:
Pub Dt:
04/24/2008
Title:
MEMORY DEVICE HAVING SELECTIVELY DECOUPLEABLE MEMORY PORTIONS AND METHOD THEREOF
15
Patent #:
Issue Dt:
09/13/2011
Application #:
11720129
Filing Dt:
08/11/2008
Publication #:
Pub Dt:
01/01/2009
Title:
APPARATUS AND METHOD FOR REDUCING POWER CONSUMPTION USING SELECTIVE POWER GATING
Assignor
1
Exec Dt:
10/02/2015
Assignee
1
600 ANTON BLVD.
SUITE 1350
COSTA MESA, CALIFORNIA 92626
Correspondence name and address
NORTH STAR INNOVATIONS INC.
600 ANTON BLVD.
SUITE 1350
COSTA MESA, CA 92626

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