Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 037182/0460 | |
| Pages: | 16 |
| | Recorded: | 12/01/2015 | | |
| Conveyance: | MERGER (SEE DOCUMENT FOR DETAILS). |
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Total properties:
6
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08564657
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Filing Dt:
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11/29/1995
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Title:
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BIT-PHASE ALIGNING CIRCUIT
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Patent #:
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Issue Dt:
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10/13/1998
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Application #:
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08665462
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Filing Dt:
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06/18/1996
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Title:
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DEVICE AND METHOD FOR CONVERTING A TRANSMISSION RATE BY ADDING DUMMY DATA
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Patent #:
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Issue Dt:
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05/18/1999
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Application #:
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08958402
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Filing Dt:
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10/29/1997
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Title:
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CONTENT ADRESSABLE MEMORY DEVICE
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Patent #:
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Issue Dt:
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02/02/1999
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Application #:
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08978482
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Filing Dt:
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11/25/1997
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Title:
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CONNECTION PIN
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Patent #:
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Issue Dt:
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10/28/2003
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Application #:
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09316116
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Filing Dt:
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05/20/1999
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Title:
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FEEDER CIRCUIT
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Patent #:
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Issue Dt:
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07/13/2004
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Application #:
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10026820
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Filing Dt:
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12/27/2001
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Publication #:
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Pub Dt:
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09/19/2002
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Title:
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CACHE MEMORY CAPABLE OF REDUCCING AREA OCCUPIED BY DATA MEMORY MACRO UNITS
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Assignee
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| 2711 CENTERVILLE RD |
| SUITE 400 |
| WILMINGTON, DELAWARE 19808 |
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Correspondence name and address
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PERKINS COIE LLP
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1201 THIRD AVENUE
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SUITE 4900
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SEATTLE, WA 98101
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