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Reel/Frame:037327/0085   Pages: 7
Recorded: 12/17/2015
Attorney Dkt #:C5709-0082
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 51
1
Patent #:
Issue Dt:
01/01/2002
Application #:
09121601
Filing Dt:
07/24/1998
Title:
SINGLE CHIP CMOS TRANSMITTER/RECEIVER
2
Patent #:
Issue Dt:
02/27/2001
Application #:
09121863
Filing Dt:
07/24/1998
Title:
VCO-MIXER STRUCTURE
3
Patent #:
Issue Dt:
04/25/2006
Application #:
09705696
Filing Dt:
11/06/2000
Title:
AUTOMATIC GAIN CONTROL LOOP APPARATUS
4
Patent #:
Issue Dt:
06/11/2002
Application #:
09709310
Filing Dt:
11/13/2000
Title:
GM-C TUNING CIRCUIT WITH FILTER CONFIGURATION
5
Patent #:
Issue Dt:
07/23/2002
Application #:
09709311
Filing Dt:
11/13/2000
Title:
PHASE LOCK LOOP (PLL) APPARATUS AND METHOD
6
Patent #:
Issue Dt:
06/22/2004
Application #:
09709314
Filing Dt:
11/13/2000
Title:
CMOS LOW NOISE AMPLIFIER
7
Patent #:
Issue Dt:
11/06/2001
Application #:
09709315
Filing Dt:
11/13/2000
Title:
Mixer structure and method for using same
8
Patent #:
Issue Dt:
11/19/2002
Application #:
09709637
Filing Dt:
11/13/2000
Title:
SINGLE CHIP CMOS TRANSMITTER/RECEIVER AND METHOD OF USING SAME
9
Patent #:
Issue Dt:
01/21/2003
Application #:
09897975
Filing Dt:
07/05/2001
Publication #:
Pub Dt:
12/06/2001
Title:
SINGLE CHIP CMOS TRANSMITTER/RECEIVER
10
Patent #:
Issue Dt:
12/24/2002
Application #:
09940637
Filing Dt:
08/29/2001
Publication #:
Pub Dt:
10/03/2002
Title:
AUTOMATIC GAIN CONTROL METHOD FOR HIGHLY INTEGRATED COMMUNICATION RECEIVER
11
Patent #:
Issue Dt:
07/23/2002
Application #:
09940806
Filing Dt:
08/29/2001
Title:
VARIABLE GAIN LOW-NOISE AMPLIFIER FOR A WIRELESS TERMINAL
12
Patent #:
Issue Dt:
04/22/2003
Application #:
09940807
Filing Dt:
08/29/2001
Publication #:
Pub Dt:
09/26/2002
Title:
FRACTIONAL-N FREQUENCY SYNTHESIZER WITH FRACTIONAL COMPENSATION METHOD
13
Patent #:
Issue Dt:
03/09/2004
Application #:
09940808
Filing Dt:
08/29/2001
Publication #:
Pub Dt:
09/26/2002
Title:
SAMPLE AND HOLD TYPE FRACTIONAL-N FREQUENCY SYNTHESIZER
14
Patent #:
Issue Dt:
01/28/2003
Application #:
09985897
Filing Dt:
11/06/2001
Publication #:
Pub Dt:
03/14/2002
Title:
MIXER STRUCTURE AND METHOD FOR USING SAME
15
Patent #:
Issue Dt:
03/25/2003
Application #:
10113600
Filing Dt:
04/02/2002
Publication #:
Pub Dt:
09/26/2002
Title:
GM-C TUNING CIRCUIT WITH FILTER CONFIGURATION
16
Patent #:
Issue Dt:
12/02/2003
Application #:
10196136
Filing Dt:
07/17/2002
Publication #:
Pub Dt:
12/19/2002
Title:
VARIABLE GAIN LOW-NOISE AMPLIFIER FOR A WIRELESS TERMINAL
17
Patent #:
Issue Dt:
06/29/2004
Application #:
10196479
Filing Dt:
07/17/2002
Publication #:
Pub Dt:
12/12/2002
Title:
PHASE LOCK LOOP (PLL) APPARATUS AND METHOD
18
Patent #:
Issue Dt:
02/01/2005
Application #:
10207986
Filing Dt:
07/31/2002
Publication #:
Pub Dt:
02/05/2004
Title:
RF FRONT END WITH REDUCED CARRIER LEAKAGE
19
Patent #:
Issue Dt:
02/21/2006
Application #:
10229267
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/06/2003
Title:
ADAPTIVE LINEARIZATION TECHNIQUE FOR COMMUNICATION BUILDING BLOCK
20
Patent #:
Issue Dt:
08/24/2004
Application #:
10253534
Filing Dt:
09/25/2002
Publication #:
Pub Dt:
01/30/2003
Title:
SINGLE CHIP CMOS TRANSMITTER/RECEIVER AND METHOD OF USING SAME
21
Patent #:
Issue Dt:
11/08/2005
Application #:
10284342
Filing Dt:
10/31/2002
Publication #:
Pub Dt:
05/06/2004
Title:
COMMUNICATION TRANSMITTER USING OFFSET PHASE-LOCKED-LOOP
22
Patent #:
Issue Dt:
04/05/2005
Application #:
10443835
Filing Dt:
05/23/2003
Publication #:
Pub Dt:
12/11/2003
Title:
LC OSCILLATOR WITH WIDE TUNING RANGE AND LOW PHASE NOISE
23
Patent #:
Issue Dt:
10/04/2005
Application #:
10689986
Filing Dt:
10/22/2003
Publication #:
Pub Dt:
05/06/2004
Title:
SYSTEM AND METHOD FOR SUPPRESSING NOISE IN A PHASE-LOCKED LOOP CIRCUIT
24
Patent #:
Issue Dt:
10/20/2009
Application #:
10690629
Filing Dt:
10/23/2003
Publication #:
Pub Dt:
07/08/2004
Title:
BIDIRECTIONAL TURBO ISI CANCELLER-BASED DSSS RECEIVER FOR HIGH-SPEED WIRELESS LAN
25
Patent #:
Issue Dt:
08/03/2010
Application #:
10927012
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/03/2005
Title:
INTEGRATED CIRCUIT PACKAGE HAVING AN INDUCTANCE LOOP FORMED FROM A MULTI-LOOP CONFIGURATION
26
Patent #:
Issue Dt:
02/21/2006
Application #:
10927013
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/03/2005
Title:
SYSTEM AND METHOD FOR FILTERING SIGNALS IN A TRANSCEIVER
27
Patent #:
Issue Dt:
07/04/2006
Application #:
10927152
Filing Dt:
08/27/2004
Publication #:
Pub Dt:
03/03/2005
Title:
INTEGRATED CIRCUIT PACKAGE HAVING INDUCTANCE LOOP FORMED FROM A BRIDGE INTERCONNECT
28
Patent #:
Issue Dt:
03/31/2009
Application #:
11057414
Filing Dt:
02/15/2005
Publication #:
Pub Dt:
01/05/2006
Title:
SYSTEM AND METHOD FOR TUNING A FREQUENCY GENERATOR USING AN LC OSCILLATOR
29
Patent #:
Issue Dt:
04/10/2007
Application #:
11066546
Filing Dt:
02/28/2005
Publication #:
Pub Dt:
01/05/2006
Title:
HIGHLY LINEAR VARIABLE GAIN AMPLIFIER
30
Patent #:
Issue Dt:
03/13/2007
Application #:
11227439
Filing Dt:
09/16/2005
Publication #:
Pub Dt:
07/13/2006
Title:
APPARATUS AND METHOD OF OSCILLATING WIDEBAND FREQUENCY
31
Patent #:
Issue Dt:
05/19/2009
Application #:
11227909
Filing Dt:
09/16/2005
Publication #:
Pub Dt:
03/30/2006
Title:
SIGMA-DELTA BASED PHASE LOCK LOOP
32
Patent #:
Issue Dt:
05/31/2011
Application #:
11274825
Filing Dt:
11/16/2005
Publication #:
Pub Dt:
04/20/2006
Title:
INTEGRATED CIRCUIT PACKAGE HAVING INDUCTANCE LOOP FORMED FROM SAME-PIN-TO-SAME-BONDING-PAD STRUCTURE
33
Patent #:
Issue Dt:
04/07/2009
Application #:
11708702
Filing Dt:
02/21/2007
Publication #:
Pub Dt:
08/30/2007
Title:
METHOD FOR COMPENSATING FOR GAIN RIPPLE AND GROUP DELAY CHARACTERISTICS OF FILTER AND RECEIVING CIRCUIT EMBODYING THE SAME
34
Patent #:
Issue Dt:
11/09/2010
Application #:
11708705
Filing Dt:
02/21/2007
Publication #:
Pub Dt:
08/30/2007
Title:
TRANCEIVER CIRCUIT FOR COMPENSATING IQ MISMATCH AND CARRIER LEAKAGE AND METHOD FOR CONTROLLING THE SAME
35
Patent #:
Issue Dt:
04/12/2011
Application #:
11708706
Filing Dt:
02/21/2007
Publication #:
Pub Dt:
08/30/2007
Title:
RECEIVING CIRCUIT AND METHOD FOR COMPENSATING IQ MISMATCH
36
Patent #:
Issue Dt:
10/14/2008
Application #:
11724319
Filing Dt:
03/15/2007
Publication #:
Pub Dt:
09/27/2007
Title:
CLOCK GENERATOR AND CLOCK GENERATING METHOD USING DELAY LOCKED LOOP
37
Patent #:
Issue Dt:
05/24/2011
Application #:
11819943
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
06/12/2008
Title:
METHOD FOR COMPENSATING TRANSMISSION CARRIER LEAKAGE AND TRANSCEIVING CIRCUIT EMBODYING THE SAME
38
Patent #:
NONE
Issue Dt:
Application #:
11878937
Filing Dt:
07/27/2007
Publication #:
Pub Dt:
01/31/2008
Title:
Method for performing handoff from WiBro(WIMAX) service to wireless LAN service and terminal apparatus using the same title
39
Patent #:
NONE
Issue Dt:
Application #:
11878938
Filing Dt:
07/27/2007
Publication #:
Pub Dt:
01/31/2008
Title:
Method and system for transmitting voice data by using wireless LAN and bluetooth
40
Patent #:
NONE
Issue Dt:
Application #:
11878939
Filing Dt:
07/27/2007
Publication #:
Pub Dt:
01/31/2008
Title:
Method and system for transmitting voice data by using wireless LAN and bluetooth
41
Patent #:
Issue Dt:
05/17/2011
Application #:
11889355
Filing Dt:
08/10/2007
Publication #:
Pub Dt:
07/03/2008
Title:
RADIO FREQUENCY INTEGRATED CIRCUIT
42
Patent #:
Issue Dt:
07/14/2009
Application #:
11902358
Filing Dt:
09/20/2007
Publication #:
Pub Dt:
08/21/2008
Title:
FREQUENCY SYNTHESIZER USING TWO PHASE LOCKED LOOPS
43
Patent #:
Issue Dt:
05/31/2011
Application #:
11907960
Filing Dt:
10/18/2007
Publication #:
Pub Dt:
08/07/2008
Title:
RECEIVER WITH FAST GAIN CONTROL AND DIGITAL SIGNAL PROCESSING UNIT WITH TRANSIENT SIGNAL COMPENSATION
44
Patent #:
Issue Dt:
08/14/2012
Application #:
11976909
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
10/16/2008
Title:
OFDM RECEIVING CIRCUIT HAVING MULTIPLE DEMODULATION PATHS USING OVERSAMPLING ANALOG-TO-DIGITAL CONVERTER
45
Patent #:
NONE
Issue Dt:
Application #:
11976910
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
10/16/2008
Title:
OFDM receiving circuit having multiple demodulation paths
46
Patent #:
Issue Dt:
10/12/2010
Application #:
11976911
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
10/16/2008
Title:
LOW NOISE AMPLIFIER HAVING IMPROVED LINEARITY
47
Patent #:
Issue Dt:
05/31/2011
Application #:
11976912
Filing Dt:
10/29/2007
Publication #:
Pub Dt:
10/16/2008
Title:
PHASE LOCKED LOOP AND METHOD FOR COMPENSATING TEMPERATURE THEREOF
48
Patent #:
Issue Dt:
09/13/2011
Application #:
12027742
Filing Dt:
02/07/2008
Publication #:
Pub Dt:
08/28/2008
Title:
APPARATUS FOR MEASURING IN-PHASE AND QUADRATURE (IQ) IMBALANCE
49
Patent #:
Issue Dt:
08/09/2011
Application #:
12027762
Filing Dt:
02/07/2008
Publication #:
Pub Dt:
09/04/2008
Title:
APPARATUS FOR MEASURING IN-PHASE AND QUADRATURE (IQ) IMBALANCE
50
Patent #:
Issue Dt:
07/24/2012
Application #:
12034627
Filing Dt:
02/20/2008
Publication #:
Pub Dt:
01/29/2009
Title:
APPARATUS FOR MEASURING IQ IMBALANCE
51
Patent #:
Issue Dt:
11/12/2013
Application #:
13272779
Filing Dt:
10/13/2011
Publication #:
Pub Dt:
10/25/2012
Title:
RECEIVER FOR ESTIMATING AND COMPENSATING FOR IN-PHASE/QUADRATURE MISMATCH
Assignor
1
Exec Dt:
12/11/2015
Assignee
1
2121 RINGWOOD AVENUE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
HELEN PANNECK
1000 WILSHIRE BLVD., STE. 1500
LOS ANGELES, CA 90017

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