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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:037354/0655   Pages: 15
Recorded: 12/21/2015
Conveyance: PATENT RELEASE
Total properties: 200
Page 1 of 3
Pages: 1 2 3
1
Patent #:
Issue Dt:
04/03/2007
Application #:
10017252
Filing Dt:
12/14/2001
Publication #:
Pub Dt:
06/19/2003
Title:
ROCKING POTENTIAL-WELL SWITCH AND MIXER
2
Patent #:
Issue Dt:
04/24/2007
Application #:
10045913
Filing Dt:
01/09/2002
Publication #:
Pub Dt:
05/29/2003
Title:
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING
3
Patent #:
Issue Dt:
06/05/2007
Application #:
10054577
Filing Dt:
11/13/2001
Publication #:
Pub Dt:
05/15/2003
Title:
INTERFACING A PROCESSOR TO A COPROCESSOR IN WHICH THE PROCESSOR SELECTIVELY BROADCASTS TO OR SELECTIVELY ALTERS AN EXECUTION MODE OF THE COPROCESSOR
4
Patent #:
Issue Dt:
05/08/2007
Application #:
10178154
Filing Dt:
06/24/2002
Publication #:
Pub Dt:
12/25/2003
Title:
METHOD AND APPARATUS FOR PURE DELAY ESTIMATION IN A COMMUNICATION SYSTEM
5
Patent #:
Issue Dt:
04/03/2007
Application #:
10207459
Filing Dt:
07/29/2002
Publication #:
Pub Dt:
01/29/2004
Title:
ON CHIP NETWORK THAT MAXIMIZES INTERCONNECT UTILIZATION BETWEEN PROCESSING ELEMENTS
6
Patent #:
Issue Dt:
06/26/2007
Application #:
10284661
Filing Dt:
10/31/2002
Publication #:
Pub Dt:
05/06/2004
Title:
DIGITAL IMAGE PROCESSING USING WHITE BALANCE AND GAMMA CORRECTION
7
Patent #:
Issue Dt:
04/24/2007
Application #:
10315796
Filing Dt:
12/10/2002
Publication #:
Pub Dt:
06/10/2004
Title:
TRANSIENT DETECTION CIRCUIT
8
Patent #:
Issue Dt:
05/01/2007
Application #:
10343540
Filing Dt:
05/12/2003
Publication #:
Pub Dt:
04/15/2004
Title:
APPARATUS FOR REDUCING DC OFFSET IN A RECEIVER
9
Patent #:
Issue Dt:
05/22/2007
Application #:
10517454
Filing Dt:
11/30/2004
Publication #:
Pub Dt:
09/29/2005
Title:
POWER AMPLIFIER WITH PRE-DISTORTER
10
Patent #:
Issue Dt:
06/26/2007
Application #:
10519306
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
06/22/2006
Title:
LOW DROP-OUT VOLTAGE REGULATOR AND METHOD
11
Patent #:
Issue Dt:
04/03/2007
Application #:
10631136
Filing Dt:
09/09/2004
Publication #:
Pub Dt:
03/09/2006
Title:
PREFETCH CONTROL IN A DATA PROCESSING SYSTEM
12
Patent #:
Issue Dt:
04/24/2007
Application #:
10648468
Filing Dt:
08/26/2003
Publication #:
Pub Dt:
03/03/2005
Title:
MULTIBAND AND MULTIMODE TRANSMITTER AND METHOD
13
Patent #:
Issue Dt:
06/05/2007
Application #:
10649427
Filing Dt:
08/26/2003
Publication #:
Pub Dt:
03/03/2005
Title:
RECEIVER WITH AUTOMATIC GAIN CONTROL THAT OPERATES WITH MULTIPLE PROTOCOLS AND METHOD THEREOF
14
Patent #:
Issue Dt:
05/08/2007
Application #:
10731069
Filing Dt:
12/09/2003
Publication #:
Pub Dt:
06/09/2005
Title:
ADAPTIVE TRANSMIT POWER CONTROL SYSTEM
15
Patent #:
Issue Dt:
04/17/2007
Application #:
10736395
Filing Dt:
12/15/2003
Publication #:
Pub Dt:
06/16/2005
Title:
METHOD FOR REDUCING CORROSION OF METAL SURFACES DURING SEMICONDUCTOR PROCESSING
16
Patent #:
Issue Dt:
04/03/2007
Application #:
10741065
Filing Dt:
12/19/2003
Publication #:
Pub Dt:
07/08/2004
Title:
MULTI-STRAND SUBSTRATE FOR BALL-GRID ARRAY ASSEMBLIES AND METHOD
17
Patent #:
Issue Dt:
04/17/2007
Application #:
10780143
Filing Dt:
02/17/2004
Publication #:
Pub Dt:
08/18/2005
Title:
SEMICONDUCTOR STRUCTURE HAVING STRAINED SEMICONDUCTOR AND METHOD THEREFOR
18
Patent #:
Issue Dt:
04/17/2007
Application #:
10807527
Filing Dt:
03/24/2004
Publication #:
Pub Dt:
09/29/2005
Title:
LAND GRID ARRAY PACKAGED DEVICE AND METHOD OF FORMING SAME
19
Patent #:
Issue Dt:
06/26/2007
Application #:
10854389
Filing Dt:
05/26/2004
Publication #:
Pub Dt:
12/15/2005
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING A SILICIDE LAYER
20
Patent #:
Issue Dt:
05/22/2007
Application #:
10854554
Filing Dt:
05/26/2004
Publication #:
Pub Dt:
12/15/2005
Title:
MEMORY WITH SERIAL INPUT/OUTPUT TERMINALS FOR ADDRESS AND DATA AND METHOD THEREFOR
21
Patent #:
Issue Dt:
04/10/2007
Application #:
10882482
Filing Dt:
06/30/2004
Publication #:
Pub Dt:
01/05/2006
Title:
METHOD OF PASSIVATING OXIDE/COMPOUND SEMICONDUCTOR INTERFACE
22
Patent #:
Issue Dt:
04/03/2007
Application #:
10889159
Filing Dt:
07/12/2004
Publication #:
Pub Dt:
01/12/2006
Title:
MEMORY ROW/COLUMN REPLACEMENT IN AN INTEGRATED CIRCUIT
23
Patent #:
Issue Dt:
06/12/2007
Application #:
10896268
Filing Dt:
07/21/2004
Publication #:
Pub Dt:
01/26/2006
Title:
MULTI-RATE VITERBI DECODER
24
Patent #:
Issue Dt:
05/08/2007
Application #:
10901844
Filing Dt:
07/29/2004
Publication #:
Pub Dt:
02/02/2006
Title:
SOLDERABLE METAL FINISH FOR INTEGRATED CIRCUIT PACKAGE LEADS AND METHOD FOR FORMING
25
Patent #:
Issue Dt:
05/29/2007
Application #:
10902021
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
02/02/2006
Title:
SYSTEM AND METHOD FOR THE MITIGATION OF SPECTRAL LINES IN AN ULTRAWIDE BANDWIDTH TRANSCEIVER
26
Patent #:
Issue Dt:
04/24/2007
Application #:
10909124
Filing Dt:
07/30/2004
Publication #:
Pub Dt:
02/03/2005
Title:
SEMICONDUCTOR DEVICE WITH STRAIN RELIEVING BUMP DESIGN
27
Patent #:
Issue Dt:
06/05/2007
Application #:
10914006
Filing Dt:
08/06/2004
Publication #:
Pub Dt:
02/09/2006
Title:
TUNGSTEN COATED SILICON FINGERS
28
Patent #:
Issue Dt:
04/24/2007
Application #:
10919922
Filing Dt:
08/17/2004
Publication #:
Pub Dt:
03/31/2005
Title:
TEMPLATE LAYER FORMATION
29
Patent #:
Issue Dt:
06/12/2007
Application #:
10925855
Filing Dt:
08/25/2004
Publication #:
Pub Dt:
03/02/2006
Title:
RECESSED SEMICONDUCTOR DEVICE
30
Patent #:
Issue Dt:
04/24/2007
Application #:
10943383
Filing Dt:
09/17/2004
Publication #:
Pub Dt:
03/23/2006
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING A METAL LAYER
31
Patent #:
Issue Dt:
06/26/2007
Application #:
10944306
Filing Dt:
09/17/2004
Publication #:
Pub Dt:
03/23/2006
Title:
SEMICONDUCTOR DEVICE HAVING A GATE WITH A THIN CONDUCTIVE LAYER
32
Patent #:
Issue Dt:
06/05/2007
Application #:
10955219
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
03/30/2006
Title:
DEVICE AND A METHOD FOR BIASING A TRANSISTOR THAT IS CONNECTED TO A POWER CONVERTER
33
Patent #:
Issue Dt:
05/22/2007
Application #:
10967563
Filing Dt:
10/18/2004
Publication #:
Pub Dt:
04/20/2006
Title:
LOGIC CIRCUITRY
34
Patent #:
Issue Dt:
06/05/2007
Application #:
10977423
Filing Dt:
10/29/2004
Publication #:
Pub Dt:
05/04/2006
Title:
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD THEREFOR
35
Patent #:
Issue Dt:
04/03/2007
Application #:
10978596
Filing Dt:
11/01/2004
Publication #:
Pub Dt:
05/04/2006
Title:
BALUNS FOR MULTIPLE BAND OPERATION
36
Patent #:
Issue Dt:
04/17/2007
Application #:
11000560
Filing Dt:
12/01/2004
Publication #:
Pub Dt:
06/01/2006
Title:
TEMPERATURE BASED DRAM REFRESH
37
Patent #:
Issue Dt:
06/19/2007
Application #:
11029951
Filing Dt:
01/04/2005
Publication #:
Pub Dt:
07/06/2006
Title:
MICROELECTROMECHANICAL (MEM) DEVICE WITH A PROTECTIVE CAP THAT FUNCTIONS AS A MOTION STOP
38
Patent #:
Issue Dt:
05/01/2007
Application #:
11047173
Filing Dt:
01/31/2005
Publication #:
Pub Dt:
06/16/2005
Title:
STACKED DIE SEMICONDUCTOR DEVICE
39
Patent #:
Issue Dt:
05/08/2007
Application #:
11047427
Filing Dt:
01/31/2005
Publication #:
Pub Dt:
08/03/2006
Title:
METHOD AND CIRCUIT FOR MAINTAININIG I/O PAD CHARACTERISTICS ACROSS DIFFERENT I/O SUPPLY VOLTAGES
40
Patent #:
Issue Dt:
04/10/2007
Application #:
11047448
Filing Dt:
01/31/2005
Publication #:
Pub Dt:
08/03/2006
Title:
METHOD OF MAKING A PLANAR DOUBLE-GATED TRANSISTOR
41
Patent #:
Issue Dt:
05/15/2007
Application #:
11058071
Filing Dt:
02/15/2005
Publication #:
Pub Dt:
08/17/2006
Title:
PROCESSES FOR FORMING ELECTRONIC DEVICES INCLUDING A SEMICONDUCTOR LAYER
42
Patent #:
Issue Dt:
05/22/2007
Application #:
11065324
Filing Dt:
02/24/2005
Publication #:
Pub Dt:
08/24/2006
Title:
METHOD OF FORMING A SEMICONDUCTOR DEVICE AND AN OPTICAL DEVICE AND STRUCTURE THEREOF
43
Patent #:
Issue Dt:
05/08/2007
Application #:
11065796
Filing Dt:
02/25/2005
Publication #:
Pub Dt:
08/31/2006
Title:
INTEGRATED CIRCUIT HAVING A LOW POWER MODE AND METHOD THEREFOR
44
Patent #:
Issue Dt:
06/26/2007
Application #:
11065898
Filing Dt:
02/25/2005
Publication #:
Pub Dt:
08/31/2006
Title:
METHOD AND APPARATUS FOR QUALIFYING DEBUG OPERATION USING SOURCE INFORMATION
45
Patent #:
Issue Dt:
05/15/2007
Application #:
11066887
Filing Dt:
02/24/2005
Publication #:
Pub Dt:
09/07/2006
Title:
SEMICONDUCTOR STRUCTURES AND METHODS FOR FABRICATING SEMICONDUCTOR STRUCTURES COMPRISING HIGH DIELECTRIC CONSTANT STACKED STRUCTURES
46
Patent #:
Issue Dt:
06/26/2007
Application #:
11075587
Filing Dt:
03/09/2005
Publication #:
Pub Dt:
07/14/2005
Title:
SYNTHETIC ANTIFERROMAGNETIC STRUCTURE FOR MAGNETOELECTRONIC DEVICES
47
Patent #:
Issue Dt:
06/26/2007
Application #:
11096515
Filing Dt:
03/31/2005
Publication #:
Pub Dt:
10/05/2006
Title:
TRANSITIONAL DIELECTRIC LAYER TO IMPROVE RELIABILITY AND PERFORMANCE OF HIGH DIELECTRIC CONSTANT TRANSISTORS
48
Patent #:
Issue Dt:
06/12/2007
Application #:
11098110
Filing Dt:
04/04/2005
Publication #:
Pub Dt:
10/05/2006
Title:
VOLTAGE CONTROLLED OSCILLATOR WITH GAIN CONTROL
49
Patent #:
Issue Dt:
05/08/2007
Application #:
11098874
Filing Dt:
04/05/2005
Publication #:
Pub Dt:
10/05/2006
Title:
METHOD OF FORMING AN ELECTRONIC DEVICE
50
Patent #:
Issue Dt:
04/03/2007
Application #:
11100163
Filing Dt:
04/06/2005
Publication #:
Pub Dt:
08/18/2005
Title:
SEMICONDUCTOR DEVICE HAVING AN ORGANIC ANTI-REFLECTIVE COATING (ARC) AND METHOD THEREFOR
51
Patent #:
Issue Dt:
06/05/2007
Application #:
11101354
Filing Dt:
04/07/2005
Publication #:
Pub Dt:
10/12/2006
Title:
TRANSISTOR FABRICATION USING DOUBLE ETCH/REFILL PROCESS
52
Patent #:
Issue Dt:
05/22/2007
Application #:
11110234
Filing Dt:
04/20/2005
Publication #:
Pub Dt:
10/26/2006
Title:
GESOI TRANSISTOR WITH LOW JUNCTION CURRENT AND LOW JUNCTION CAPACITANCE AND METHOD FOR MAKING THE SAME
53
Patent #:
Issue Dt:
04/17/2007
Application #:
11111450
Filing Dt:
04/21/2005
Publication #:
Pub Dt:
10/26/2006
Title:
SEMICONDUCTOR DEVICE AND METHOD FOR REGIONAL STRESS CONTROL
54
Patent #:
Issue Dt:
06/26/2007
Application #:
11111528
Filing Dt:
04/21/2005
Publication #:
Pub Dt:
08/25/2005
Title:
ELECTROSTATIC DISCHARGE CIRCUIT AND METHOD THEREFOR
55
Patent #:
Issue Dt:
06/05/2007
Application #:
11116614
Filing Dt:
04/28/2005
Publication #:
Pub Dt:
11/02/2006
Title:
MEMORY STRUCTURE AND METHOD OF PROGRAMMING
56
Patent #:
Issue Dt:
05/01/2007
Application #:
11117349
Filing Dt:
04/29/2005
Publication #:
Pub Dt:
09/08/2005
Title:
STRUCTURE AND METHOD FOR FABRICATING GAN DEVICES UTILIZING THE FORMATION OF A COMPLIANT SUBSTRATE
57
Patent #:
Issue Dt:
05/01/2007
Application #:
11124469
Filing Dt:
05/06/2005
Publication #:
Pub Dt:
11/09/2006
Title:
HIGH VOLTAGE FIELD EFFECT DEVICE AND METHOD
58
Patent #:
Issue Dt:
05/29/2007
Application #:
11166139
Filing Dt:
06/24/2005
Publication #:
Pub Dt:
12/28/2006
Title:
ANTIFUSE CIRCUIT
59
Patent #:
Issue Dt:
06/05/2007
Application #:
11182149
Filing Dt:
07/15/2005
Publication #:
Pub Dt:
11/10/2005
Title:
SYNTHETIC ANTIFERROMAGNET STRUCTURES FOR USE IN MTJS IN MRAM TECHNOLOGY
60
Patent #:
Issue Dt:
05/01/2007
Application #:
11188603
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
01/25/2007
Title:
SPLIT GATE STORAGE DEVICE INCLUDING A HORIZONTAL FIRST GATE AND A VERTICAL SECOND GATE IN A TRENCH
61
Patent #:
Issue Dt:
06/05/2007
Application #:
11188909
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
01/25/2007
Title:
PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
62
Patent #:
Issue Dt:
04/17/2007
Application #:
11188910
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
01/25/2007
Title:
ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
63
Patent #:
Issue Dt:
05/01/2007
Application #:
11188939
Filing Dt:
07/25/2005
Publication #:
Pub Dt:
01/25/2007
Title:
PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING DISCONTINUOUS STORAGE ELEMENTS
64
Patent #:
Issue Dt:
05/22/2007
Application #:
11192570
Filing Dt:
07/29/2005
Publication #:
Pub Dt:
02/01/2007
Title:
MAGNETIC TUNNEL JUNCTION SENSOR METHOD
65
Patent #:
Issue Dt:
04/17/2007
Application #:
11197814
Filing Dt:
08/05/2005
Publication #:
Pub Dt:
02/08/2007
Title:
ONE TIME PROGRAMMABLE MEMORY AND METHOD OF OPERATION
66
Patent #:
Issue Dt:
06/26/2007
Application #:
11213470
Filing Dt:
08/26/2005
Publication #:
Pub Dt:
03/01/2007
Title:
DUAL SILICIDE SEMICONDUCTOR FABRICATION PROCESS
67
Patent #:
Issue Dt:
04/03/2007
Application #:
11215655
Filing Dt:
08/30/2005
Publication #:
Pub Dt:
03/01/2007
Title:
STORAGE ELEMENT WITH CLEAR OPERATION AND METHOD THEREOF
68
Patent #:
Issue Dt:
06/12/2007
Application #:
11247866
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
04/13/2006
Title:
SEMICONDUCTOR TRANSISTOR HAVING STRUCTURAL ELEMENTS OF DIFFERING MATERIALS
69
Patent #:
Issue Dt:
05/08/2007
Application #:
11250993
Filing Dt:
10/14/2005
Publication #:
Pub Dt:
04/19/2007
Title:
SIGNAL CONVERTERS WITH MULTIPLE GATE DEVICES
70
Patent #:
Issue Dt:
06/05/2007
Application #:
11273286
Filing Dt:
11/14/2005
Publication #:
Pub Dt:
05/17/2007
Title:
DIGITAL SATURATION HANDLING IN INTEGRAL NOISE SHAPING OF PULSE WIDTH MODULATION
71
Patent #:
Issue Dt:
06/26/2007
Application #:
11290321
Filing Dt:
11/30/2005
Publication #:
Pub Dt:
05/31/2007
Title:
METHOD AND APPARATUS FOR PROGRAMMING/ERASING A NON-VOLATILE MEMORY
72
Patent #:
Issue Dt:
06/26/2007
Application #:
11297191
Filing Dt:
12/07/2005
Publication #:
Pub Dt:
06/07/2007
Title:
CIRCUIT AND METHOD FOR PEAK DETECTION OF AN ANALOG SIGNAL
73
Patent #:
Issue Dt:
04/17/2007
Application #:
11297203
Filing Dt:
12/07/2005
Title:
MRAM MEMORY WITH RESIDUAL WRITE FIELD RESET
74
Patent #:
Issue Dt:
05/15/2007
Application #:
11444087
Filing Dt:
05/31/2006
Title:
SYSTEM AND METHOD FOR REDUCING CURRENT IN A DEVICE DURING TESTING
75
Patent #:
Issue Dt:
06/26/2007
Application #:
11536099
Filing Dt:
09/28/2006
Publication #:
Pub Dt:
01/25/2007
Title:
SOURCE SIDE INJECTION STORAGE DEVICE WITH SPACER GATES AND METHOD THEREFOR
76
Patent #:
Issue Dt:
05/04/2010
Application #:
11576789
Filing Dt:
09/19/2007
Publication #:
Pub Dt:
02/28/2008
Title:
REFERENCE CIRCUIT
77
Patent #:
Issue Dt:
11/17/2009
Application #:
11576828
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
01/01/2009
Title:
VARACTOR
78
Patent #:
Issue Dt:
02/23/2010
Application #:
11695722
Filing Dt:
04/03/2007
Publication #:
Pub Dt:
10/09/2008
Title:
ELECTRONIC DEVICE INCLUDING A NONVOLATILE MEMORY ARRAY AND METHODS OF USING THE SAME
79
Patent #:
Issue Dt:
12/29/2009
Application #:
11695974
Filing Dt:
04/03/2007
Publication #:
Pub Dt:
10/09/2008
Title:
POWER SUPPLY SELECTION FOR MULTIPLE CIRCUITS ON AN INTEGRATED CIRCUIT
80
Patent #:
NONE
Issue Dt:
Application #:
11696374
Filing Dt:
04/04/2007
Publication #:
Pub Dt:
10/09/2008
Title:
STACKED AND SHIELDED DIE PACKAGES WITH INTERCONNECTS
81
Patent #:
Issue Dt:
02/14/2012
Application #:
11696610
Filing Dt:
04/04/2007
Publication #:
Pub Dt:
10/09/2008
Title:
VIDEO DE-INTERLACER USING PIXEL TRAJECTORY
82
Patent #:
NONE
Issue Dt:
Application #:
11696734
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
12/06/2007
Title:
BUS CONTROL SYSTEM
83
Patent #:
Issue Dt:
05/07/2013
Application #:
11697106
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
10/09/2008
Title:
FIRST INTER-LAYER DIELECTRIC STACK FOR NON-VOLATILE MEMORY
84
Patent #:
Issue Dt:
06/30/2009
Application #:
11718396
Filing Dt:
05/02/2007
Publication #:
Pub Dt:
05/15/2008
Title:
FLIP CHIP AND WIRE BOND SEMICONDUCTOR PACKAGE
85
Patent #:
Issue Dt:
03/19/2013
Application #:
11719015
Filing Dt:
05/10/2007
Publication #:
Pub Dt:
08/07/2008
Title:
Apparatus and Method for Controlling Voltage and Frequency Using Multiple Reference Circuits
86
Patent #:
Issue Dt:
02/19/2013
Application #:
11719883
Filing Dt:
05/18/2009
Publication #:
Pub Dt:
12/03/2009
Title:
INTEGRATED CIRCUIT AND A METHOD FOR SECURE TESTING
87
Patent #:
Issue Dt:
06/17/2014
Application #:
11719924
Filing Dt:
09/18/2009
Publication #:
Pub Dt:
01/28/2010
Title:
INTEGRATED CIRCUIT AND A METHOD FOR TESTING A MULTI-TAP INTEGRATED CIRCUIT
88
Patent #:
Issue Dt:
06/08/2010
Application #:
11720127
Filing Dt:
12/06/2007
Publication #:
Pub Dt:
06/05/2008
Title:
METHOD AND SYSTEM FOR IMPROVING THE MANUFACTURABILITY OF INTEGRATED CIRCUITS
89
Patent #:
Issue Dt:
09/13/2011
Application #:
11720129
Filing Dt:
08/11/2008
Publication #:
Pub Dt:
01/01/2009
Title:
APPARATUS AND METHOD FOR REDUCING POWER CONSUMPTION USING SELECTIVE POWER GATING
90
Patent #:
Issue Dt:
09/13/2011
Application #:
11721651
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
04/29/2010
Title:
APPARATUS AND METHOD FOR DETECTING AN END POINT OF AN INFORMATION FRAME
91
Patent #:
Issue Dt:
11/23/2010
Application #:
11721656
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
05/07/2009
Title:
FREQUENCY GENERATION IN A WIRELESS COMMUNICATION UNIT
92
Patent #:
Issue Dt:
08/02/2011
Application #:
11722293
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
11/12/2009
Title:
WIRELESS COMMUNICATION UNIT AND POWER CONTROL SYSTEM THEREOF
93
Patent #:
Issue Dt:
09/18/2012
Application #:
11722295
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
10/29/2009
Title:
BROADCASTING OF TEXTUAL AND MULTIMEDIA INFORMATION
94
Patent #:
Issue Dt:
09/06/2011
Application #:
11722296
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
01/14/2010
Title:
POWER CONTROL SYSTEM FOR A WIRELESS COMMUNICATION UNIT
95
Patent #:
Issue Dt:
11/09/2010
Application #:
11732594
Filing Dt:
04/04/2007
Publication #:
Pub Dt:
10/09/2008
Title:
NOVEL INTERCONNECT FOR CHIP LEVEL POWER DISTRIBUTION
96
Patent #:
Issue Dt:
05/03/2011
Application #:
11733063
Filing Dt:
04/09/2007
Publication #:
Pub Dt:
10/09/2008
Title:
INTEGRATED PASSIVE DEVICE WITH A HIGH RESISTIVITY SUBSTRATE AND METHOD FOR FORMING THE SAME
97
Patent #:
Issue Dt:
05/26/2009
Application #:
11733079
Filing Dt:
04/09/2007
Publication #:
Pub Dt:
12/06/2007
Title:
SYSTEM AND METHOD FOR REDUCING CURRENT IN A DEVICE DURING TESTING
98
Patent #:
NONE
Issue Dt:
Application #:
11733519
Filing Dt:
04/10/2007
Publication #:
Pub Dt:
10/16/2008
Title:
Void-free contact plug
99
Patent #:
Issue Dt:
02/23/2010
Application #:
11733610
Filing Dt:
04/10/2007
Publication #:
Pub Dt:
10/16/2008
Title:
DISCRETE DITHERED FREQUENCY PULSE WIDTH MODULATION
100
Patent #:
Issue Dt:
11/24/2015
Application #:
11733978
Filing Dt:
04/11/2007
Publication #:
Pub Dt:
10/16/2008
Title:
Techniques for Tracing Processes in a Multi-Threaded Processor
Assignor
1
Exec Dt:
12/07/2015
Assignee
1
6501 WILLIAM CANNON DRIVE WEST
AUSTIN, TEXAS 78735
Correspondence name and address
IP RESEARCH PLUS, INC.
21 TADCASTER CIRCLE
ATTN: PENELOPE J.A. AGODOA
WALDORF, MD 20602

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