skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:037486/0517   Pages: 404
Recorded: 01/12/2016
Attorney Dkt #:F160353
Conveyance: ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS
Total properties: 6067
Page 58 of 61
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
1
Patent #:
Issue Dt:
10/06/2015
Application #:
13607735
Filing Dt:
09/09/2012
Publication #:
Pub Dt:
10/31/2013
Title:
POWER ADAPTER AND ELECTRICAL CONNECTOR THEREFOR
2
Patent #:
Issue Dt:
05/27/2014
Application #:
13607736
Filing Dt:
09/09/2012
Publication #:
Pub Dt:
11/07/2013
Title:
SYSTEM ON CHIP AND CONTROL MODULE THEREFOR
3
Patent #:
Issue Dt:
07/02/2013
Application #:
13607787
Filing Dt:
09/09/2012
Title:
METHOD OF DESIGNING INTEGRATED CIRCUIT THAT ACCOUNTS FOR DEVICE AGING
4
Patent #:
Issue Dt:
06/03/2014
Application #:
13607810
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
10/03/2013
Title:
TIMIMG CONTROL IN SYNCHRONOUS MEMORY DATA TRANSFER
5
Patent #:
Issue Dt:
02/04/2014
Application #:
13607812
Filing Dt:
09/10/2012
Publication #:
Pub Dt:
09/12/2013
Title:
OSCILLATOR CIRCUIT
6
Patent #:
Issue Dt:
06/24/2014
Application #:
13609281
Filing Dt:
09/11/2012
Publication #:
Pub Dt:
11/14/2013
Title:
POWER MOSFET STRUCTURE AND METHOD
7
Patent #:
Issue Dt:
02/04/2014
Application #:
13609282
Filing Dt:
09/11/2012
Publication #:
Pub Dt:
01/30/2014
Title:
COMPARATOR AND RELAXATION OSCILLATOR EMPLOYING SAME
8
Patent #:
Issue Dt:
05/27/2014
Application #:
13609283
Filing Dt:
09/11/2012
Publication #:
Pub Dt:
11/14/2013
Title:
RECONFIGURABLE INTEGRATED CIRCUIT
9
Patent #:
Issue Dt:
12/13/2016
Application #:
13610488
Filing Dt:
09/11/2012
Publication #:
Pub Dt:
03/13/2014
Title:
MICROELECTRONIC PACKAGES HAVING TRENCH VIAS AND METHODS FOR THE MANUFACTURE THEREOF
10
Patent #:
Issue Dt:
03/22/2016
Application #:
13610901
Filing Dt:
09/12/2012
Publication #:
Pub Dt:
03/13/2014
Title:
POWER MOSFET CURRENT SENSE STRUCTURE AND METHOD
11
Patent #:
Issue Dt:
08/04/2015
Application #:
13611076
Filing Dt:
09/12/2012
Publication #:
Pub Dt:
03/13/2014
Title:
TECHNIQUES FOR REDUCING INDUCTANCE IN THROUGH-DIE VIAS OF AN ELECTRONIC ASSEMBLY
12
Patent #:
Issue Dt:
03/08/2016
Application #:
13611793
Filing Dt:
09/12/2012
Publication #:
Pub Dt:
03/13/2014
Title:
SEMICONDUCTOR DEVICES WITH IMPEDANCE MATCHING-CIRCUITS
13
Patent #:
Issue Dt:
06/14/2016
Application #:
13612231
Filing Dt:
09/12/2012
Publication #:
Pub Dt:
11/21/2013
Title:
METHODS OF MANUFACTURING TRENCH SEMICONDUCTOR DEVICES WITH EDGE TERMINATION STRUCTURES
14
Patent #:
Issue Dt:
04/30/2013
Application #:
13612466
Filing Dt:
09/12/2012
Publication #:
Pub Dt:
01/10/2013
Title:
MULTI-VOLTAGE ELECTROSTATIC DISCHARGE PROTECTION
15
Patent #:
Issue Dt:
01/21/2014
Application #:
13613614
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
01/10/2013
Title:
TRANSISTORS WITH IMMERSED CONTACTS
16
Patent #:
Issue Dt:
09/10/2013
Application #:
13613630
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
01/17/2013
Title:
METHODS FOR TESTING A MEMORY EMBEDDED IN AN INTEGRATED CIRCUIT
17
Patent #:
Issue Dt:
06/06/2017
Application #:
13613979
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
03/13/2014
Title:
HIGH POWER SEMICONDUCTOR PACKAGE SUBSYSTEMS
18
Patent #:
NONE
Issue Dt:
Application #:
13614448
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
03/13/2014
Title:
METHOD AND SYSTEM FOR CALIBRATING AN INERTIAL SENSOR
19
Patent #:
Issue Dt:
12/09/2014
Application #:
13614722
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
01/10/2013
Title:
LDMOS WITH ENHANCED SAFE OPERATING AREA (SOA) AND METHOD THEREFOR
20
Patent #:
Issue Dt:
08/26/2014
Application #:
13614850
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
03/13/2014
Title:
QUIESCENT CURRENT DETERMINATION USING IN-PACKAGE VOLTAGE MEASUREMENTS
21
Patent #:
Issue Dt:
07/14/2015
Application #:
13616169
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
03/20/2014
Title:
NON-VOLATILE MEMORY (NVM) WITH ADAPTIVE WRITE OPERATIONS
22
Patent #:
Issue Dt:
11/25/2014
Application #:
13616206
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
03/20/2014
Title:
NVM WITH CHARGE PUMP AND METHOD THEREFOR
23
Patent #:
Issue Dt:
07/12/2016
Application #:
13616922
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
03/20/2014
Title:
SYSTEMS AND METHODS FOR CODE PROTECTION IN NON-VOLATILE MEMORY SYSTEMS
24
Patent #:
Issue Dt:
12/30/2014
Application #:
13617851
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
03/20/2014
Title:
Thermally Enhanced Package with Lid Heat Spreader
25
Patent #:
Issue Dt:
10/13/2015
Application #:
13618185
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
03/20/2014
Title:
MATRIX LID HEATSPREADER FOR FLIP CHIP PACKAGE
26
Patent #:
Issue Dt:
02/24/2015
Application #:
13624232
Filing Dt:
09/21/2012
Publication #:
Pub Dt:
03/27/2014
Title:
METHOD AND APPARATUS FOR MULTI-CHIP STRUCTURE SEMICONDUCTOR PACKAGE
27
Patent #:
NONE
Issue Dt:
Application #:
13627127
Filing Dt:
09/26/2012
Publication #:
Pub Dt:
01/24/2013
Title:
POLYURETHANE FOAMS MADE WITH ALKOXYLATED VEGETABLE OIL HYDROXYLATE
28
Patent #:
Issue Dt:
12/08/2015
Application #:
13627333
Filing Dt:
09/26/2012
Publication #:
Pub Dt:
03/27/2014
Title:
PHASE LOCKED LOOP WITH BURN-IN MODE
29
Patent #:
Issue Dt:
08/25/2015
Application #:
13628814
Filing Dt:
09/27/2012
Publication #:
Pub Dt:
03/27/2014
Title:
THERMAL SENSOR SYSTEM AND METHOD BASED ON CURRENT RATIO
30
Patent #:
Issue Dt:
04/19/2016
Application #:
13628939
Filing Dt:
09/27/2012
Publication #:
Pub Dt:
03/27/2014
Title:
THERMAL SENSOR SYSTEM AND METHOD BASED ON CURRENT RATIO
31
Patent #:
Issue Dt:
10/15/2013
Application #:
13629643
Filing Dt:
09/28/2012
Title:
PHASE LOCKED LOOP WITH POWER SUPPLY CONTROL
32
Patent #:
Issue Dt:
03/17/2015
Application #:
13630346
Filing Dt:
09/28/2012
Publication #:
Pub Dt:
04/03/2014
Title:
Techniques for Utilizing Translation Lookaside Buffer Entry Numbers to Improve Processor Performance
33
Patent #:
Issue Dt:
04/22/2014
Application #:
13630996
Filing Dt:
09/28/2012
Publication #:
Pub Dt:
04/03/2014
Title:
METHOD AND APPARATUS TO IMPROVE RELIABILITY OF VIAS
34
Patent #:
Issue Dt:
07/12/2016
Application #:
13632549
Filing Dt:
10/01/2012
Publication #:
Pub Dt:
04/03/2014
Title:
Method and System for Automatically Controlling the Insertion of Control Word in CPRI Daisy Chain Configuration
35
Patent #:
Issue Dt:
05/26/2015
Application #:
13632616
Filing Dt:
10/01/2012
Publication #:
Pub Dt:
04/03/2014
Title:
Multiply and Accumulate Feedback
36
Patent #:
Issue Dt:
10/07/2014
Application #:
13633124
Filing Dt:
10/01/2012
Publication #:
Pub Dt:
04/03/2014
Title:
SPLIT GATE FLASH CELL
37
Patent #:
NONE
Issue Dt:
Application #:
13634716
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
01/17/2013
Title:
POWER GATING CONTROL MODULE, INTEGRATED CIRCUIT DEVICE, SIGNAL PROCESSING SYSTEM, ELECTRONIC DEVICE, AND METHOD THEREFOR
38
Patent #:
Issue Dt:
11/25/2014
Application #:
13634726
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
02/14/2013
Title:
INTEGRATED CIRCUIT DEVICE, CALIBRATION MODULE, AND METHOD THEREFOR
39
Patent #:
Issue Dt:
12/03/2013
Application #:
13634730
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
03/28/2013
Title:
ELECTRONIC CIRCUIT AND METHOD FOR STATE RETENTION POWER GATING
40
Patent #:
Issue Dt:
08/25/2015
Application #:
13634755
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
04/18/2013
Title:
MEMORY UNIT, INFORMATION PROCESSING DEVICE, AND METHOD
41
Patent #:
Issue Dt:
03/10/2015
Application #:
13634760
Filing Dt:
09/13/2012
Publication #:
Pub Dt:
03/28/2013
Title:
METHOD FOR PROVIDING DATA PROTECTION FOR DATA STORED WITHIN A MEMORY ELEMENT AND INTEGRATED CIRCUIT DEVICE THEREFOR
42
Patent #:
NONE
Issue Dt:
Application #:
13634992
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
01/03/2013
Title:
INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND METHOD FOR CONFIGURING A SIGNAL PATH FOR A TIMING SENSITIVE SIGNAL
43
Patent #:
Issue Dt:
09/22/2015
Application #:
13634999
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
05/23/2013
Title:
DEVICE AND METHOD FOR SELECTIVE REDUCED POWER MODE IN VOLATILE MEMORY UNITS
44
Patent #:
Issue Dt:
06/23/2015
Application #:
13635006
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
06/13/2013
Title:
INTEGRATED CIRCUIT DEVICE AND METHOD FOR GENERATING A TUNING SIGNAL FOR CALIBRATING A VOLTAGE CONTROLLED OSCILLATOR
45
Patent #:
Issue Dt:
10/14/2014
Application #:
13635166
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
01/31/2013
Title:
VOLTAGE LEVEL SHIFTER, DECOUPLER FOR A VOLTAGE LEVEL SHIFTER, AND VOLTAGE SHIFTING METHOD
46
Patent #:
Issue Dt:
06/10/2014
Application #:
13635186
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
01/31/2013
Title:
VOLTAGE LEVEL SHIFTER HAVING A FIRST OPERATING MODE AND A SECOND OPERATING MODE
47
Patent #:
NONE
Issue Dt:
Application #:
13635205
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
01/17/2013
Title:
MULTI-CHANNEL SNIFFER SYSTEM AND METHOD FOR MULTI-CHANNEL SNIFFER SYNCHRONIZATION
48
Patent #:
NONE
Issue Dt:
Application #:
13635214
Filing Dt:
09/14/2012
Publication #:
Pub Dt:
01/24/2013
Title:
AUDIO COMMUNICATION DEVICE, METHOD FOR OUTPUTTING AN AUDIO SIGNAL, AND COMMUNICATION SYSTEM
49
Patent #:
NONE
Issue Dt:
Application #:
13643358
Filing Dt:
10/25/2012
Publication #:
Pub Dt:
02/28/2013
Title:
INTEGRATED CIRCUIT DEVICE, SIGNAL PROCESSING SYSTEM AND METHOD FOR MANAGING POWER RESOURCES OF A SIGNAL PROCESSING SYSTEM
50
Patent #:
Issue Dt:
02/24/2015
Application #:
13645050
Filing Dt:
10/04/2012
Publication #:
Pub Dt:
04/10/2014
Title:
OPPORTUNISTIC CACHE REPLACEMENT POLICY
51
Patent #:
Issue Dt:
02/03/2015
Application #:
13647951
Filing Dt:
10/09/2012
Publication #:
Pub Dt:
04/10/2014
Title:
LATENT SLOW BIT DETECTION FOR NON-VOLATILE MEMORY
52
Patent #:
Issue Dt:
01/13/2015
Application #:
13648501
Filing Dt:
10/10/2012
Publication #:
Pub Dt:
04/10/2014
Title:
COMPILER OPTIMIZED SAFETY MECHANISM
53
Patent #:
Issue Dt:
02/24/2015
Application #:
13649461
Filing Dt:
10/11/2012
Publication #:
Pub Dt:
04/17/2014
Title:
Method and System for Low Power Transmission and Data Alignment
54
Patent #:
Issue Dt:
10/28/2014
Application #:
13650138
Filing Dt:
10/12/2012
Publication #:
Pub Dt:
04/17/2014
Title:
TIMING EVENT GENERATION CIRCUIT FOR MOBILE COMMUNICATION DEVICE
55
Patent #:
Issue Dt:
11/11/2014
Application #:
13650141
Filing Dt:
10/12/2012
Publication #:
Pub Dt:
04/17/2014
Title:
PROCESSOR SWITCHABLE BETWEEN TEST AND DEBUG MODES
56
Patent #:
Issue Dt:
09/16/2014
Application #:
13650872
Filing Dt:
10/12/2012
Publication #:
Pub Dt:
04/17/2014
Title:
CHIP-LEVEL HUMIDITY PROTECTION
57
Patent #:
Issue Dt:
03/18/2014
Application #:
13653155
Filing Dt:
10/16/2012
Title:
ELECTRONIC CIRCUITS WITH VARIABLE ATTENUATORS AND METHODS OF THEIR OPERATION
58
Patent #:
Issue Dt:
04/07/2015
Application #:
13656073
Filing Dt:
10/19/2012
Publication #:
Pub Dt:
04/24/2014
Title:
FLEXIBLE CONTROL MECHANISM FOR STORE GATHERING IN A WRITE BUFFER
59
Patent #:
Issue Dt:
06/16/2015
Application #:
13656103
Filing Dt:
10/19/2012
Publication #:
Pub Dt:
04/24/2014
Title:
RESURF HIGH VOLTAGE DIODE
60
Patent #:
Issue Dt:
05/26/2015
Application #:
13656122
Filing Dt:
10/19/2012
Publication #:
Pub Dt:
04/24/2014
Title:
HIGH VOLTAGE DIODE
61
Patent #:
Issue Dt:
11/18/2014
Application #:
13656253
Filing Dt:
10/19/2012
Publication #:
Pub Dt:
04/24/2014
Title:
DYNAMICALLY BIASED OUTPUT STRUCTURE
62
Patent #:
Issue Dt:
02/18/2014
Application #:
13656551
Filing Dt:
10/19/2012
Title:
AMPLIFIER CALIBRATION
63
Patent #:
Issue Dt:
02/03/2015
Application #:
13657250
Filing Dt:
10/22/2012
Publication #:
Pub Dt:
04/24/2014
Title:
PACKAGING FOR SEMICONDUCTOR SENSOR DEVICES AND METHODS
64
Patent #:
Issue Dt:
07/01/2014
Application #:
13660243
Filing Dt:
10/25/2012
Publication #:
Pub Dt:
05/01/2014
Title:
PACKAGED INTEGRATED CIRCUIT HAVING LARGE SOLDER PADS AND METHOD FOR FORMING
65
Patent #:
Issue Dt:
11/26/2013
Application #:
13661131
Filing Dt:
10/26/2012
Title:
VIA PLACEMENT AND ELECTRONIC CIRCUIT DESIGN PROCESSING METHOD AND ELECTRONIC CIRCUIT DESIGN UTILIZING SAME
66
Patent #:
Issue Dt:
08/18/2015
Application #:
13661157
Filing Dt:
10/26/2012
Publication #:
Pub Dt:
05/01/2014
Title:
METHOD OF MAKING A LOGIC TRANSISTOR AND A NON-VOLATILE MEMORY (NVM) CELL
67
Patent #:
Issue Dt:
01/28/2014
Application #:
13661377
Filing Dt:
10/26/2012
Title:
METHODS AND STRUCTURES FOR CAPPING A STRUCTURE WITH A PROTECTIVE COATING
68
Patent #:
Issue Dt:
12/16/2014
Application #:
13661861
Filing Dt:
10/26/2012
Publication #:
Pub Dt:
05/01/2014
Title:
SRAM WITH IMPROVED WRITE OPERATION
69
Patent #:
Issue Dt:
09/16/2014
Application #:
13663462
Filing Dt:
10/29/2012
Publication #:
Pub Dt:
05/01/2014
Title:
SEMICONDUCTOR DEVICE WITH THERMAL DISSIPATION LEAD FRAME
70
Patent #:
Issue Dt:
03/03/2015
Application #:
13663636
Filing Dt:
10/30/2012
Publication #:
Pub Dt:
05/01/2014
Title:
CONTROL GATE WORD LINE DRIVER CIRCUIT FOR MULTIGATE MEMORY
71
Patent #:
Issue Dt:
07/07/2015
Application #:
13663991
Filing Dt:
10/30/2012
Publication #:
Pub Dt:
05/01/2014
Title:
PRODUCTION-TEST DIE TEMPERATURE MEASUREMENT
72
Patent #:
Issue Dt:
12/15/2015
Application #:
13663998
Filing Dt:
10/30/2012
Publication #:
Pub Dt:
05/01/2014
Title:
SENSOR SINGLE TRACK TRIM USING STATIONARY HARDWARE AND FIELDS
73
Patent #:
Issue Dt:
05/03/2016
Application #:
13664565
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
SYSTEM AND METHOD FOR ASSIGNING A MESSAGE
74
Patent #:
Issue Dt:
06/17/2014
Application #:
13665256
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
SYSTEMS AND METHODS FOR DETERMINING AGING DAMAGE FOR SEMICONDUCTOR DEVICES
75
Patent #:
Issue Dt:
11/11/2014
Application #:
13665518
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
GATE DRIVER WITH DESATURATION DETECTION AND ACTIVE CLAMPING
76
Patent #:
Issue Dt:
07/08/2014
Application #:
13665665
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
LDMOS Device with Minority Carrier Shunt Region
77
Patent #:
Issue Dt:
07/15/2014
Application #:
13665840
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
METHODS AND INTEGRATED CIRCUIT PACKAGE FOR SENSING FLUID PROPERTIES
78
Patent #:
Issue Dt:
08/02/2016
Application #:
13665864
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
METHOD AND APPARATUS FOR A TUNABLE DRIVER CIRCUIT
79
Patent #:
NONE
Issue Dt:
Application #:
13665902
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
LCD DRIVER VERIFICATION SYSTEM
80
Patent #:
Issue Dt:
07/08/2014
Application #:
13665903
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
RELAXATION OSCILLATOR
81
Patent #:
NONE
Issue Dt:
Application #:
13665906
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
MEMORY CONTROLLER FOR MEMORY DEVICE
82
Patent #:
Issue Dt:
01/20/2015
Application #:
13665917
Filing Dt:
10/31/2012
Publication #:
Pub Dt:
05/01/2014
Title:
MEMORY DEVICE REDUNDANCY MANAGEMENT SYSTEM
83
Patent #:
Issue Dt:
02/04/2014
Application #:
13665921
Filing Dt:
10/31/2012
Title:
SYSTEM FOR GENERATING GATED CLOCK SIGNALS
84
Patent #:
Issue Dt:
07/21/2015
Application #:
13666289
Filing Dt:
11/01/2012
Publication #:
Pub Dt:
05/01/2014
Title:
Vector NCO and Twiddle Factor Generator
85
Patent #:
Issue Dt:
09/30/2014
Application #:
13668496
Filing Dt:
11/05/2012
Publication #:
Pub Dt:
05/08/2014
Title:
DELAY COMPENSATED CONTINUOUS TIME SIGMA DELTA ANALOG-TO-DIGITAL CONVERTER
86
Patent #:
Issue Dt:
03/14/2017
Application #:
13668951
Filing Dt:
11/05/2012
Publication #:
Pub Dt:
05/08/2014
Title:
HARDWARE-BASED MEMORY INITIALIZATION
87
Patent #:
Issue Dt:
09/22/2015
Application #:
13671503
Filing Dt:
11/07/2012
Publication #:
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICE AND DRIVER CIRCUIT WITH AN ACTIVE DEVICE AND ISOLATION STRUCTURE INTERCONNECTED THROUGH A DIODE CIRCUIT, AND METHOD OF MANUFACTURE THEREOF
88
Patent #:
Issue Dt:
07/11/2017
Application #:
13671506
Filing Dt:
11/07/2012
Publication #:
Pub Dt:
01/02/2014
Title:
SEMICONDUCTOR DEVICE AND DRIVER CIRCUIT WITH AN ACTIVE DEVICE AND ISOLATION STRUCTURE INTERCONNECTED THROUGH A RESISTOR CIRCUIT, AND METHOD OF MANUFACTURE THEREOF
89
Patent #:
Issue Dt:
04/28/2015
Application #:
13671623
Filing Dt:
11/08/2012
Publication #:
Pub Dt:
05/08/2014
Title:
PROTECTION DEVICE AND RELATED FABRICATION METHODS
90
Patent #:
Issue Dt:
04/08/2014
Application #:
13671951
Filing Dt:
11/08/2012
Publication #:
Pub Dt:
03/14/2013
Title:
OFFSET ERROR AUTOMATIC CALIBRATION INTEGRATED CIRCUIT
91
Patent #:
Issue Dt:
06/30/2015
Application #:
13673212
Filing Dt:
11/09/2012
Publication #:
Pub Dt:
05/15/2014
Title:
WETTABLE LEAD ENDS ON A FLAT-PACK NO-LEAD MICROELECTRONIC PACKAGE
92
Patent #:
Issue Dt:
12/29/2015
Application #:
13674367
Filing Dt:
11/12/2012
Publication #:
Pub Dt:
05/15/2014
Title:
PROGRAMMING A NON-VOLATILE MEMORY (NVM) SYSTEM HAVING ERROR CORRECTION CODE (ECC)
93
Patent #:
Issue Dt:
10/28/2014
Application #:
13675008
Filing Dt:
11/13/2012
Publication #:
Pub Dt:
05/15/2014
Title:
TRACE ROUTING WITHIN A SEMICONDUCTOR PACKAGE SUBSTRATE
94
Patent #:
Issue Dt:
01/05/2016
Application #:
13677800
Filing Dt:
11/15/2012
Publication #:
Pub Dt:
05/15/2014
Title:
INTEGRATED CIRCUIT WITH DEGRADATION MONITORING
95
Patent #:
Issue Dt:
03/17/2015
Application #:
13678117
Filing Dt:
11/15/2012
Publication #:
Pub Dt:
05/15/2014
Title:
TEMPERATURE DEPENDENT TIMER CIRCUIT
96
Patent #:
Issue Dt:
09/15/2015
Application #:
13678789
Filing Dt:
11/16/2012
Publication #:
Pub Dt:
05/22/2014
Title:
TABLE MODEL CIRCUIT SIMULATION ACCELERATION USING MODEL CACHING
97
Patent #:
Issue Dt:
07/14/2015
Application #:
13679481
Filing Dt:
11/16/2012
Publication #:
Pub Dt:
05/22/2014
Title:
DYNAMIC READ SCHEME FOR HIGH RELIABILITY HIGH PERFORMANCE FLASH MEMORY
98
Patent #:
Issue Dt:
04/19/2016
Application #:
13679515
Filing Dt:
11/16/2012
Publication #:
Pub Dt:
05/22/2014
Title:
NON-VOLATILE MEMORY ROBUST START-UP USING ANALOG-TO-DIGITAL CONVERTER
99
Patent #:
NONE
Issue Dt:
Application #:
13681401
Filing Dt:
11/19/2012
Publication #:
Pub Dt:
01/23/2014
Title:
SEMICONDUCTOR WAFER DICING METHOD
100
Patent #:
Issue Dt:
01/13/2015
Application #:
13681406
Filing Dt:
11/19/2012
Publication #:
Pub Dt:
01/30/2014
Title:
SYSTEM AND METHOD FOR PERFORMING SCAN TEST
Assignor
1
Exec Dt:
12/07/2015
Assignee
1
1300 THAMES STREET, 4TH FLOOR
BALTIMORE, MARYLAND 21231
Correspondence name and address
DARLENA BARI STARK
1025 VERMONT AVE NW, SUITE 1130
NATIONAL CORPORATE RESEARCH, LTD.
WASHINGTON, DC 20005

Search Results as of: 05/22/2024 05:51 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT