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Reel/Frame:037518/0292   Pages: 358
Recorded: 01/13/2016
Attorney Dkt #:F160353
Conveyance: ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS
Total properties: 6031
Page 48 of 61
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61
1
Patent #:
8639884
Issue Dt:
01/28/2014
Application #:
13037013
Filing Dt:
02/28/2011
Publication #:
US20120221796
Pub Dt:
08/30/2012
Title:
SYSTEMS AND METHODS FOR CONFIGURING LOAD/STORE EXECUTION UNITS
2
Patent #:
8178950
Issue Dt:
05/15/2012
Application #:
13037032
Filing Dt:
02/28/2011
Publication #:
US20110151659
Pub Dt:
06/23/2011
Title:
MULTILAYERED THROUGH A VIA
3
Patent #:
8775699
Issue Dt:
07/08/2014
Application #:
13038054
Filing Dt:
03/01/2011
Publication #:
US20120226841
Pub Dt:
09/06/2012
Title:
READ STACKING FOR DATA PROCESSOR INTERFACE
4
Patent #:
8586474
Issue Dt:
11/19/2013
Application #:
13040797
Filing Dt:
03/04/2011
Publication #:
US20110151663
Pub Dt:
06/23/2011
Title:
METHOD TO FORM A VIA
5
Patent #:
8344481
Issue Dt:
01/01/2013
Application #:
13041531
Filing Dt:
03/07/2011
Publication #:
US20110147893
Pub Dt:
06/23/2011
Title:
BIPOLAR TRANSISTORS WITH HUMP REGIONS
6
Patent #:
8592878
Issue Dt:
11/26/2013
Application #:
13042948
Filing Dt:
03/08/2011
Publication #:
US20110156051
Pub Dt:
06/30/2011
Title:
SEMICONDUCTOR DEVICES WITH LOW LEAKAGE SCHOTTKY CONTACTS
7
Patent #:
8922227
Issue Dt:
12/30/2014
Application #:
13043075
Filing Dt:
03/08/2011
Publication #:
US20120229153
Pub Dt:
09/13/2012
Title:
SYSTEMS AND METHODS FOR DETECTING SURFACE CHARGE
8
Patent #:
8283207
Issue Dt:
10/09/2012
Application #:
13043094
Filing Dt:
03/08/2011
Publication #:
US20110156266
Pub Dt:
06/30/2011
Title:
METHODS FOR FORMING THROUGH-SUBSTRATE CONDUCTOR FILLED VIAS, AND ELECTRONIC ASSEMBLIES FORMED USING SUCH METHODS
9
Patent #:
8537625
Issue Dt:
09/17/2013
Application #:
13045294
Filing Dt:
03/10/2011
Publication #:
US20120230126
Pub Dt:
09/13/2012
Title:
MEMORY VOLTAGE REGULATOR WITH LEAKAGE CURRENT VOLTAGE CONTROL
10
Patent #:
8677205
Issue Dt:
03/18/2014
Application #:
13045307
Filing Dt:
03/10/2011
Publication #:
US20120233498
Pub Dt:
09/13/2012
Title:
HIERARCHICAL ERROR CORRECTION FOR LARGE MEMORIES
11
Patent #:
8378725
Issue Dt:
02/19/2013
Application #:
13046789
Filing Dt:
03/14/2011
Publication #:
US20120235718
Pub Dt:
09/20/2012
Title:
ADAPTIVE BANDWIDTH PHASE-LOCKED LOOP
12
Patent #:
8645785
Issue Dt:
02/04/2014
Application #:
13046815
Filing Dt:
03/14/2011
Publication #:
US20120240000
Pub Dt:
09/20/2012
Title:
METHOD OF RE-ORDERING RECEIVED DATA BLOCKS IN HYBRID AUTOMATIC REPEAT REQUEST TELECOMMUNICATION SYSTEM
13
Patent #:
8489404
Issue Dt:
07/16/2013
Application #:
13047800
Filing Dt:
03/15/2011
Publication #:
US20110246205
Pub Dt:
10/06/2011
Title:
METHOD FOR DETECTING AUDIO SIGNAL TRANSIENT AND TIME-SCALE MODIFICATION BASED ON SAME
14
Patent #:
8569992
Issue Dt:
10/29/2013
Application #:
13047801
Filing Dt:
03/15/2011
Publication #:
US20110291604
Pub Dt:
12/01/2011
Title:
STEPPER MOTOR CONTROLLER AND METHOD FOR CONTROLLING SAME
15
Patent #:
8415779
Issue Dt:
04/09/2013
Application #:
13047803
Filing Dt:
03/15/2011
Publication #:
US20110248390
Pub Dt:
10/13/2011
Title:
LEAD FRAME FOR SEMICONDUCTOR PACKAGE
16
Patent #:
8198937
Issue Dt:
06/12/2012
Application #:
13048113
Filing Dt:
03/15/2011
Title:
SWITCHED-CAPACITOR AMPLIFIER CIRCUIT
17
Patent #:
8330231
Issue Dt:
12/11/2012
Application #:
13048976
Filing Dt:
03/16/2011
Publication #:
US20110163360
Pub Dt:
07/07/2011
Title:
A TRANSISTOR HAVING GATE DIELECTRIC PROTECTION AND STRUCTURE
18
Patent #:
8355294
Issue Dt:
01/15/2013
Application #:
13050932
Filing Dt:
03/18/2011
Publication #:
US20120239961
Pub Dt:
09/20/2012
Title:
SYNCHRONOUS DATA PROCESSING SYSTEM FOR RELIABLE TRANSFER OF DATA IRRESPECTIVE OF PROPAGATION DELAYS AND PROCESS, VOLTAGE AND TEMPERATURE (PVT) VARIATIONS
19
Patent #:
8321649
Issue Dt:
11/27/2012
Application #:
13050948
Filing Dt:
03/18/2011
Publication #:
US20120239900
Pub Dt:
09/20/2012
Title:
MEMORY CONTROLLER ADDRESS AND DATA PIN MULTIPLEXING
20
Patent #:
9106179
Issue Dt:
08/11/2015
Application #:
13051611
Filing Dt:
03/18/2011
Publication #:
US20120235758
Pub Dt:
09/20/2012
Title:
VOLTAGE-CONTROLLED OSCILLATORS AND RELATED SYSTEMS
21
Patent #:
8163615
Issue Dt:
04/24/2012
Application #:
13052529
Filing Dt:
03/21/2011
Title:
SPLIT-GATE NON-VOLATILE MEMORY CELL HAVING IMPROVED OVERLAP TOLERANCE AND METHOD THEREFOR
22
Patent #:
8432214
Issue Dt:
04/30/2013
Application #:
13052891
Filing Dt:
03/21/2011
Publication #:
US20120242398
Pub Dt:
09/27/2012
Title:
PROGRAMMABLE TEMPERATURE SENSING CIRCUIT FOR AN INTEGRATED CIRCUIT
23
Patent #:
8566672
Issue Dt:
10/22/2013
Application #:
13053962
Filing Dt:
03/22/2011
Publication #:
US20120246542
Pub Dt:
09/27/2012
Title:
SELECTIVE CHECKBIT MODIFICATION FOR ERROR CORRECTION
24
Patent #:
8531197
Issue Dt:
09/10/2013
Application #:
13054122
Filing Dt:
01/14/2011
Publication #:
US20110121818
Pub Dt:
05/26/2011
Title:
INTEGRATED CIRCUIT DIE, AN INTEGRATED CIRCUIT PACKAGE AND A METHOD FOR CONNECTING AN INTEGRATED CIRCUIT DIE TO AN EXTERNAL DEVICE
25
Patent #:
8731492
Issue Dt:
05/20/2014
Application #:
13054124
Filing Dt:
01/14/2011
Publication #:
US20110124303
Pub Dt:
05/26/2011
Title:
SYSTEM FOR MONITORING AND CONTROLLING THE POWER OF A RADIO FREQUENCY (RF) SIGNAL IN A SHORT-RANGE RF TRANSMITTER
26
Patent #:
9329919
Issue Dt:
05/03/2016
Application #:
13054344
Filing Dt:
01/14/2011
Publication #:
US20110126082
Pub Dt:
05/26/2011
Title:
MICRO CONTROLLER UNIT INCLUDING AN ERROR INDICATOR MODULE
27
Patent #:
8711981
Issue Dt:
04/29/2014
Application #:
13054358
Filing Dt:
01/14/2011
Publication #:
US20110122936
Pub Dt:
05/26/2011
Title:
INTEGRATED TESTING CIRCUITRY FOR HIGH-FREQUENCY RECEIVER INTEGRATED CIRCUITS
28
Patent #:
8478219
Issue Dt:
07/02/2013
Application #:
13055474
Filing Dt:
01/24/2011
Publication #:
US20110124309
Pub Dt:
05/26/2011
Title:
HETERODYNE RECEIVER
29
Patent #:
8644791
Issue Dt:
02/04/2014
Application #:
13055968
Filing Dt:
01/26/2011
Publication #:
US20110125945
Pub Dt:
05/26/2011
Title:
COMMUNICATIONS MODULE APPARATUS, INTEGRATED CIRCUIT AND METHOD OF COMMUNICATING DATA
30
Patent #:
8639468
Issue Dt:
01/28/2014
Application #:
13056322
Filing Dt:
01/28/2011
Publication #:
US20110131004
Pub Dt:
06/02/2011
Title:
DIE TEMPERATURE ESTIMATOR
31
Patent #:
8193828
Issue Dt:
06/05/2012
Application #:
13056334
Filing Dt:
01/28/2011
Publication #:
US20110121858
Pub Dt:
05/26/2011
Title:
BUFFER APPARATUS, INTEGRATED CIRCUIT AND METHOD OF REDUCING A PORTION OF AN OSCILLATION OF AN OUTPUT SIGNAL
32
Patent #:
8948387
Issue Dt:
02/03/2015
Application #:
13057384
Filing Dt:
02/03/2011
Publication #:
US20110142236
Pub Dt:
06/16/2011
Title:
SECURITY KEY GENERATOR
33
Patent #:
8463207
Issue Dt:
06/11/2013
Application #:
13058025
Filing Dt:
02/08/2011
Publication #:
US20110136452
Pub Dt:
06/09/2011
Title:
WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD OF POWER CONTROL OF A POWER AMPLIFIER THEREFOR
34
Patent #:
8872502
Issue Dt:
10/28/2014
Application #:
13058350
Filing Dt:
02/10/2011
Publication #:
US20110133709
Pub Dt:
06/09/2011
Title:
VOLTAGE REGULATOR WITH LOW AND HIGH POWER MODES
35
Patent #:
8612657
Issue Dt:
12/17/2013
Application #:
13059084
Filing Dt:
02/15/2011
Publication #:
US20110138090
Pub Dt:
06/09/2011
Title:
SYSTEM AND METHOD FOR COMMUNICATING ON AN ELECTRICAL BUS
36
Patent #:
8630593
Issue Dt:
01/14/2014
Application #:
13059085
Filing Dt:
02/15/2011
Publication #:
US20110151804
Pub Dt:
06/23/2011
Title:
SEMICONDUCTOR DEVICE, WIRELESS COMMUNICATION DEVICE AND METHOD FOR GENERATING A SYNTHESIZED FREQUENCY SIGNAL
37
Patent #:
8543860
Issue Dt:
09/24/2013
Application #:
13059246
Filing Dt:
02/16/2011
Publication #:
US20110145625
Pub Dt:
06/16/2011
Title:
MULTI-CORE CLOCKING SYSTEM WITH INTERLOCKED 'ANTI-FREEZE' MECHANISM
38
Patent #:
8463193
Issue Dt:
06/11/2013
Application #:
13060081
Filing Dt:
02/22/2011
Publication #:
US20110143688
Pub Dt:
06/16/2011
Title:
CALIBRATION APPARATUS AND METHOD OF CALIBRATING A COMMUNICATIONS TERMINAL
39
Patent #:
8526539
Issue Dt:
09/03/2013
Application #:
13060170
Filing Dt:
02/22/2011
Publication #:
US20110150141
Pub Dt:
06/23/2011
Title:
COMPUTATIONAL GENERATION OF NARROW-BANDWIDTH DIGITAL SIGNALS
40
Patent #:
8369804
Issue Dt:
02/05/2013
Application #:
13060549
Filing Dt:
02/24/2011
Publication #:
US20110159826
Pub Dt:
06/30/2011
Title:
WIRELESS COMMUNICATION UNIT, SEMICONDUCTOR DEVICE AND POWER CONTROL METHOD THEREFOR
41
Patent #:
8675685
Issue Dt:
03/18/2014
Application #:
13061626
Filing Dt:
03/01/2011
Publication #:
US20110164624
Pub Dt:
07/07/2011
Title:
METHOD AND APPARATUS FOR TRANSMITTING DATA
42
Patent #:
8707079
Issue Dt:
04/22/2014
Application #:
13061967
Filing Dt:
03/03/2011
Publication #:
US20110167185
Pub Dt:
07/07/2011
Title:
METHOD AND APPARATUS FOR TRANSMITTING DATA
43
Patent #:
8611460
Issue Dt:
12/17/2013
Application #:
13062958
Filing Dt:
03/09/2011
Publication #:
US20110261903
Pub Dt:
10/27/2011
Title:
WIRELESS COMMUNICATION UNIT, INTEGRATED CIRCUIT AND METHOD OF POWER CONTROL OF A POWER AMPLIFIER THEREFOR
44
Patent #:
8384437
Issue Dt:
02/26/2013
Application #:
13062961
Filing Dt:
03/09/2011
Publication #:
US20110156752
Pub Dt:
06/30/2011
Title:
METHOD AND APPARATUS FOR GATING A CLOCK SIGNAL
45
Patent #:
8638821
Issue Dt:
01/28/2014
Application #:
13063214
Filing Dt:
03/10/2011
Publication #:
US20110164626
Pub Dt:
07/07/2011
Title:
METHOD FOR ADJUSTING TIME SLOTS IN A COMMUNICATION NETWORK
46
Patent #:
8564419
Issue Dt:
10/22/2013
Application #:
13063679
Filing Dt:
03/11/2011
Publication #:
US20110158303
Pub Dt:
06/30/2011
Title:
WAKE-UP CONTROL SYSTEM AND METHOD FOR CONTROLLING RECEIVER WAKE-UP
47
Patent #:
8937478
Issue Dt:
01/20/2015
Application #:
13068335
Filing Dt:
05/09/2011
Publication #:
US20110279126
Pub Dt:
11/17/2011
Title:
ELECTROSTATIC OCCUPANT DETECTION SYSTEM
48
Patent #:
8513734
Issue Dt:
08/20/2013
Application #:
13069158
Filing Dt:
03/22/2011
Publication #:
US20110169078
Pub Dt:
07/14/2011
Title:
SWITCH MODE CONVERTER EMPLOYING DUAL GATE MOS TRANSISTOR
49
Patent #:
9112060
Issue Dt:
08/18/2015
Application #:
13070049
Filing Dt:
03/23/2011
Publication #:
US20120241909
Pub Dt:
09/27/2012
Title:
Low-Leakage, High-Capacitance Capacitor Structures and Method of Making
50
Patent #:
8531194
Issue Dt:
09/10/2013
Application #:
13071025
Filing Dt:
03/24/2011
Publication #:
US20120242380
Pub Dt:
09/27/2012
Title:
SELECTABLE THRESHOLD RESET CIRCUIT
51
Patent #:
8458541
Issue Dt:
06/04/2013
Application #:
13071512
Filing Dt:
03/25/2011
Publication #:
US20120246531
Pub Dt:
09/27/2012
Title:
SYSTEM AND METHOD FOR DEBUGGING SCAN CHAINS
52
Patent #:
8373460
Issue Dt:
02/12/2013
Application #:
13072818
Filing Dt:
03/28/2011
Publication #:
US20120249198
Pub Dt:
10/04/2012
Title:
DUAL LOOP PHASE LOCKED LOOP WITH LOW VOLTAGE-CONTROLLED OSCILLATOR GAIN
53
Patent #:
8611162
Issue Dt:
12/17/2013
Application #:
13075768
Filing Dt:
03/30/2011
Publication #:
US20120250430
Pub Dt:
10/04/2012
Title:
CIRCUIT FOR PREVENTING A DUMMY READ IN A MEMORY
54
Patent #:
8344798
Issue Dt:
01/01/2013
Application #:
13075844
Filing Dt:
03/30/2011
Publication #:
US20120249239
Pub Dt:
10/04/2012
Title:
CORRELATED-DOUBLE-SAMPLING SWITCHED-CAPACITOR GAIN STAGES, SYSTEMS IMPLEMENTING THE GAIN STAGES, AND METHODS OF THEIR OPERATION
55
Patent #:
8400339
Issue Dt:
03/19/2013
Application #:
13075956
Filing Dt:
03/30/2011
Publication #:
US20120249237
Pub Dt:
10/04/2012
Title:
CORRELATED-LEVEL-SHIFTING AND CORRELATED-DOUBLE-SAMPLING SWITCHED-CAPACITOR GAIN STAGES, SYSTEMS IMPLEMENTING THE GAIN STAGES, AND METHODS OF THEIR OPERATION
56
Patent #:
8343842
Issue Dt:
01/01/2013
Application #:
13077434
Filing Dt:
03/31/2011
Publication #:
US20110179394
Pub Dt:
07/21/2011
Title:
METHOD FOR REDUCING PLASMA DISCHARGE DAMAGE DURING PROCESSING
57
Patent #:
8564044
Issue Dt:
10/22/2013
Application #:
13077491
Filing Dt:
03/31/2011
Publication #:
US20120248523
Pub Dt:
10/04/2012
Title:
NON-VOLATILE MEMORY AND LOGIC CIRCUIT PROCESS INTEGRATION
58
Patent #:
8389365
Issue Dt:
03/05/2013
Application #:
13077501
Filing Dt:
03/31/2011
Publication #:
US20120252171
Pub Dt:
10/04/2012
Title:
NON-VOLATILE MEMORY AND LOGIC CIRCUIT PROCESS INTEGRATION
59
Patent #:
8415217
Issue Dt:
04/09/2013
Application #:
13077563
Filing Dt:
03/31/2011
Publication #:
US20120252178
Pub Dt:
10/04/2012
Title:
PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A CAPACITOR
60
Patent #:
8426263
Issue Dt:
04/23/2013
Application #:
13077569
Filing Dt:
03/31/2011
Publication #:
US20120252179
Pub Dt:
10/04/2012
Title:
PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET)
61
Patent #:
8420480
Issue Dt:
04/16/2013
Application #:
13077581
Filing Dt:
03/31/2011
Publication #:
US20120252177
Pub Dt:
10/04/2012
Title:
PATTERNING A GATE STACK OF A NON-VOLATILE MEMORY (NVM) WITH FORMATION OF A GATE EDGE DIODE
62
Patent #:
8701460
Issue Dt:
04/22/2014
Application #:
13077963
Filing Dt:
03/31/2011
Publication #:
US20120247175
Pub Dt:
10/04/2012
Title:
METHOD AND SYSTEM TO COMPENSATE FOR TEMPERATURE AND PRESSURE IN PIEZO RESISTIVE DEVICES
63
Patent #:
8514785
Issue Dt:
08/20/2013
Application #:
13079030
Filing Dt:
04/04/2011
Publication #:
US20120250614
Pub Dt:
10/04/2012
Title:
COMMON RF INTERFACE FOR SEPARATING AND MIXING WIRELESS SIGNALS
64
Patent #:
8477052
Issue Dt:
07/02/2013
Application #:
13079818
Filing Dt:
04/05/2011
Publication #:
US20120256774
Pub Dt:
10/11/2012
Title:
METHOD AND APPARATUS FOR SELF-TEST OF SUCCESSIVE APPROXIMATION REGISTER (SAR) A/D CONVERTER
65
Patent #:
8799607
Issue Dt:
08/05/2014
Application #:
13080944
Filing Dt:
04/06/2011
Publication #:
US20120096215
Pub Dt:
04/19/2012
Title:
MEMORY CONTROLLER AND METHOD FOR ACCESSING A PLURALITY OF NON-VOLATILE MEMORY ARRAYS
66
Patent #:
8921155
Issue Dt:
12/30/2014
Application #:
13085217
Filing Dt:
04/12/2011
Publication #:
US20120261636
Pub Dt:
10/18/2012
Title:
RESISTIVE RANDOM ACCESS MEMORY (RAM) CELL AND METHOD FOR FORMING
67
Patent #:
8329543
Issue Dt:
12/11/2012
Application #:
13085230
Filing Dt:
04/12/2011
Publication #:
US20120264277
Pub Dt:
10/18/2012
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING NANOCRYSTAL
68
Patent #:
8329544
Issue Dt:
12/11/2012
Application #:
13085238
Filing Dt:
04/12/2011
Publication #:
US20120264282
Pub Dt:
10/18/2012
Title:
METHOD FOR FORMING A SEMICONDUCTOR DEVICE HAVING NANOCRYSTALS
69
Patent #:
8643123
Issue Dt:
02/04/2014
Application #:
13085533
Filing Dt:
04/13/2011
Publication #:
US20120261769
Pub Dt:
10/18/2012
Title:
METHOD OF MAKING A SEMICONDUCTOR STRUCTURE USEFUL IN MAKING A SPLIT GATE NON-VOLATILE MEMORY CELL
70
Patent #:
8309410
Issue Dt:
11/13/2012
Application #:
13088071
Filing Dt:
04/15/2011
Publication #:
US20110195556
Pub Dt:
08/11/2011
Title:
POWER MOSFET WITH A GATE STRUCTURE OF DIFFERENT MATERIAL
71
Patent #:
8709848
Issue Dt:
04/29/2014
Application #:
13088100
Filing Dt:
04/15/2011
Publication #:
US20120264249
Pub Dt:
10/18/2012
Title:
METHOD FOR ETCHED CAVITY DEVICES
72
Patent #:
8993451
Issue Dt:
03/31/2015
Application #:
13088106
Filing Dt:
04/15/2011
Publication #:
US20120264307
Pub Dt:
10/18/2012
Title:
ETCHING TRENCHES IN A SUBSTRATE
73
Patent #:
8610222
Issue Dt:
12/17/2013
Application #:
13088579
Filing Dt:
04/18/2011
Publication #:
US20120262026
Pub Dt:
10/18/2012
Title:
MEMS DEVICE WITH CENTRAL ANCHOR FOR STRESS ISOLATION
74
Patent #:
9208036
Issue Dt:
12/08/2015
Application #:
13090056
Filing Dt:
04/19/2011
Publication #:
US20120272006
Pub Dt:
10/25/2012
Title:
DYNAMIC LOCKSTEP CACHE MEMORY REPLACEMENT LOGIC
75
Patent #:
9086977
Issue Dt:
07/21/2015
Application #:
13090057
Filing Dt:
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Assignor
1
CITIBANK, N.A.
Exec Dt:
12/07/2015
Assignee
1
MORGAN STANLEY SENIOR FUNDING, INC.
1300 THAMES STREET, 4TH FLOOR
BALTIMORE, MARYLAND 21231
Correspondence name and address
JOANNA MCCALL
1025 VERMONT AVE NW, SUITE 1130
NATIONAL CORPORATE RESEARCH, LTD
WASHINGTON, DC 20005

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