skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:037526/0143   Pages: 22
Recorded: 01/19/2016
Conveyance: MERGER (SEE DOCUMENT FOR DETAILS).
Total properties: 10
1
Patent #:
Issue Dt:
07/01/2008
Application #:
10535370
Filing Dt:
05/18/2005
Publication #:
Pub Dt:
02/02/2006
Title:
CIRCUIT ARRANGEMENT WITH NON-VOLATILE MEMORY MODULE AND METHOD OF EN-/DECRYPTING DATA IN THE NON-VOLATILE MEMORY MODULE
2
Patent #:
Issue Dt:
06/19/2007
Application #:
10536302
Filing Dt:
05/19/2005
Publication #:
Pub Dt:
01/19/2006
Title:
CIRCUIT ARRANGEMENT WITH NON-VOLATILE MEMORY MODULE AND METHOD FOR REGISTETING LIGHT- ATTACKS ON THE NON-VOLATILE MEMORY MODULE
3
Patent #:
Issue Dt:
12/29/2009
Application #:
10537517
Filing Dt:
06/03/2005
Publication #:
Pub Dt:
05/11/2006
Title:
ADDRESS ENCRYPTION METHOD FOR FLASH MEMORIES
4
Patent #:
Issue Dt:
06/05/2007
Application #:
10538574
Filing Dt:
06/15/2005
Publication #:
Pub Dt:
06/01/2006
Title:
TEMPERATURE COMPENSATED R-C OSCILLATOR
5
Patent #:
Issue Dt:
08/26/2008
Application #:
10555258
Filing Dt:
11/01/2005
Publication #:
Pub Dt:
02/08/2007
Title:
METHOD FOR TEMPORAL SYNCHRONIZATION OF CLOCKS
6
Patent #:
Issue Dt:
03/03/2009
Application #:
10559208
Filing Dt:
12/06/2005
Publication #:
Pub Dt:
06/08/2006
Title:
REAL-TIME ADAPTIVE CONTROL FOR BEST IC PERFORMANCE
7
Patent #:
Issue Dt:
03/25/2008
Application #:
10596450
Filing Dt:
06/14/2006
Publication #:
Pub Dt:
05/10/2007
Title:
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED WITH SUCH A METHOD
8
Patent #:
Issue Dt:
02/09/2010
Application #:
11573346
Filing Dt:
01/30/2008
Publication #:
Pub Dt:
07/17/2008
Title:
DUAL GATE CMOS FABRICATION
9
Patent #:
Issue Dt:
04/10/2012
Application #:
12125737
Filing Dt:
05/22/2008
Publication #:
Pub Dt:
05/21/2009
Title:
CIRCUIT ARRANGEMENT WITH NON-VOLATILE MEMORY MODULE AND METHOD FOR EN-/DECRYPTING DATA IN THE NON-VOLATILE MEMORY MODULE
10
Patent #:
Issue Dt:
02/09/2010
Application #:
12293241
Filing Dt:
09/16/2008
Publication #:
Pub Dt:
04/02/2009
Title:
ELECTRONIC DEVICE AND INTEGRATED CIRCUIT
Assignor
1
Exec Dt:
08/26/2015
Assignee
1
160 GREENTREE DRIVE
SUITE 101
DOVER, DELAWARE 19904
Correspondence name and address
FOLEY & LARDNER LLP
150 EAST GILMAN STREET
VEREX PLAZA
MADISON, WI 53703

Search Results as of: 05/21/2024 03:35 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT