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Reel/Frame:037558/0711   Pages: 101
Recorded: 01/19/2016
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 1256
Page 6 of 13
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13
1
Patent #:
Issue Dt:
09/06/2005
Application #:
10020379
Filing Dt:
12/13/2001
Publication #:
Pub Dt:
06/19/2003
Title:
CAPACITOR CANCELLATION METHOD AND APPARATUS
2
Patent #:
Issue Dt:
01/09/2007
Application #:
10020491
Filing Dt:
12/11/2001
Publication #:
Pub Dt:
12/12/2002
Title:
AUTOMATIC LOAD BALANCING IN SWITCH FABRICS
3
Patent #:
Issue Dt:
03/07/2006
Application #:
10021744
Filing Dt:
12/05/2001
Publication #:
Pub Dt:
06/13/2002
Title:
FLOOR PLAN FOR SCALABLE MULTIPLE LEVEL TAB ORIENTED INTERCONNECT ARCHITECTURE
4
Patent #:
Issue Dt:
07/13/2004
Application #:
10024661
Filing Dt:
12/13/2001
Title:
PROGRAMMABLE MULTI-STANDARD I/O ARCHITECTURE FOR FPGAS
5
Patent #:
Issue Dt:
01/24/2006
Application #:
10041888
Filing Dt:
01/07/2002
Publication #:
Pub Dt:
07/10/2003
Title:
SCALABLE CLOCK DISTRIBUTION FOR MULTIPLE CRU ON THE SAME CHIP
6
Patent #:
Issue Dt:
10/21/2003
Application #:
10042600
Filing Dt:
01/09/2002
Title:
CONTROLLER FOR SWITCH MODE POWER SUPPLY
7
Patent #:
Issue Dt:
09/20/2005
Application #:
10044413
Filing Dt:
10/24/2001
Publication #:
Pub Dt:
04/24/2003
Title:
LOW-DENSITY PARITY CHECK FORWARD ERROR CORRECTION
8
Patent #:
Issue Dt:
03/02/2004
Application #:
10047166
Filing Dt:
01/14/2002
Publication #:
Pub Dt:
05/23/2002
Title:
HIGH SPEED CROSS POINT SWITCH ROUTING CIRCUIT WITH WORD-SYNCHRONOUS SERIAL BACK PLANE
9
Patent #:
Issue Dt:
06/01/2004
Application #:
10061951
Filing Dt:
01/31/2002
Title:
TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
10
Patent #:
Issue Dt:
08/26/2003
Application #:
10061955
Filing Dt:
01/31/2002
Title:
TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
11
Patent #:
Issue Dt:
03/02/2004
Application #:
10066398
Filing Dt:
01/30/2002
Title:
TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
12
Patent #:
Issue Dt:
09/16/2008
Application #:
10066539
Filing Dt:
01/30/2002
Title:
TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
13
Patent #:
Issue Dt:
10/17/2006
Application #:
10066982
Filing Dt:
02/01/2002
Publication #:
Pub Dt:
08/15/2002
Title:
RZ RECOVERY
14
Patent #:
Issue Dt:
07/06/2004
Application #:
10068778
Filing Dt:
02/05/2002
Publication #:
Pub Dt:
05/22/2003
Title:
MONOLITHIC SURFACE MOUNT OPTOELECTRONIC DEVICE AND METHOD FOR FABRICATING THE DEVICE
15
Patent #:
Issue Dt:
05/08/2007
Application #:
10068780
Filing Dt:
02/06/2002
Publication #:
Pub Dt:
11/28/2002
Title:
CURRENT SENSING ECHO CANCELLATION DEVICE
16
Patent #:
Issue Dt:
11/22/2005
Application #:
10071262
Filing Dt:
02/07/2002
Title:
USER AVAILABLE BODY SCAN CHAIN
17
Patent #:
Issue Dt:
10/05/2004
Application #:
10074106
Filing Dt:
02/12/2002
Publication #:
Pub Dt:
06/20/2002
Title:
HIGH SPEED CROSS POINT SWITCH ROUTING CIRCUIT WITH WORD-SYNCHRONOUS SERIAL BACK PLANE
18
Patent #:
Issue Dt:
03/11/2003
Application #:
10077188
Filing Dt:
02/15/2002
Title:
METHOD AND APPARATUS OF MEMORY CLEARING WITH MONITORING MEMORY CELLS
19
Patent #:
Issue Dt:
11/14/2006
Application #:
10077189
Filing Dt:
02/15/2002
Title:
FREEWAY ROUTING SYSTEM FOR A GATE ARRAY
20
Patent #:
Issue Dt:
05/04/2004
Application #:
10077190
Filing Dt:
02/15/2002
Title:
ROUTING STRUCTURES FOR A TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
21
Patent #:
Issue Dt:
09/16/2003
Application #:
10080932
Filing Dt:
02/22/2002
Publication #:
Pub Dt:
10/24/2002
Title:
CLASS D AMPLIFIER WITH PASSIVE RC NETWORK
22
Patent #:
Issue Dt:
02/03/2009
Application #:
10081152
Filing Dt:
02/25/2002
Publication #:
Pub Dt:
11/14/2002
Title:
METHOD AND APPARATUS FOR SCHEDULING DATA ON A MEDIUM
23
Patent #:
NONE
Issue Dt:
Application #:
10085164
Filing Dt:
02/26/2002
Publication #:
Pub Dt:
09/05/2002
Title:
Encapsulated die package with improved parasitic and thermal performance
24
Patent #:
Issue Dt:
06/12/2007
Application #:
10096442
Filing Dt:
03/11/2002
Publication #:
Pub Dt:
10/17/2002
Title:
TIME BASED PACKET SCHEDULING AND SORTING SYSTEM
25
Patent #:
Issue Dt:
01/27/2004
Application #:
10096739
Filing Dt:
03/12/2002
Publication #:
Pub Dt:
07/18/2002
Title:
METHOD OF CONTROLLING THE TURN OFF CHARACTERISTICS OF A VCSEL DIODE
26
Patent #:
Issue Dt:
01/27/2004
Application #:
10096995
Filing Dt:
03/12/2002
Publication #:
Pub Dt:
09/18/2003
Title:
COMPOUND SEMICONDUCTOR PROTECTION DEVICE FOR LOW VOLTAGE AND HIGH SPEED DATA LINES
27
Patent #:
Issue Dt:
07/22/2003
Application #:
10117875
Filing Dt:
04/05/2002
Publication #:
Pub Dt:
11/07/2002
Title:
ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
28
Patent #:
Issue Dt:
08/12/2003
Application #:
10136614
Filing Dt:
12/21/2001
Publication #:
Pub Dt:
12/05/2002
Title:
SWITCHING REGULATOR WITH TRANSIENT RECOVERY CIRCUIT
29
Patent #:
Issue Dt:
08/17/2004
Application #:
10137729
Filing Dt:
05/01/2002
Title:
THREE INPUT FIELD PROGRAMMABLE GATE ARRAY LOGIC CIRCUIT CONFIGURABLE AS A THREE INPUT LOOK UP TABLE, A D-LATCH OR A D FLIP-FLOP
30
Patent #:
Issue Dt:
01/16/2007
Application #:
10138496
Filing Dt:
05/06/2002
Publication #:
Pub Dt:
02/20/2003
Title:
DATA SWITCHING SYSTEM
31
Patent #:
Issue Dt:
08/30/2011
Application #:
10139338
Filing Dt:
05/07/2002
Publication #:
Pub Dt:
11/21/2002
Title:
A SYSTEM AND A METHOD FOR MAINTAINING QUALITY OF SERVICE THROUGH A CONGESTED NETWORK
32
Patent #:
Issue Dt:
02/28/2006
Application #:
10140611
Filing Dt:
05/07/2002
Publication #:
Pub Dt:
01/09/2003
Title:
DOWNLOAD BOOSTER FOR ADSL TRANSMISSION
33
Patent #:
Issue Dt:
08/10/2004
Application #:
10143721
Filing Dt:
05/09/2002
Title:
METHOD AND APPARATUS FOR A FLEXIBLE CHARGEPUMP SCHEME FOR FIELD-PROGRAMMABLE GATE ARRAYS
34
Patent #:
Issue Dt:
07/27/2004
Application #:
10145412
Filing Dt:
05/12/2002
Publication #:
Pub Dt:
11/13/2003
Title:
PRECISE PHASE DETECTOR
35
Patent #:
Issue Dt:
02/11/2003
Application #:
10147197
Filing Dt:
05/15/2002
Title:
ANTIFUSE PROGRAMMABLE RESISTOR
36
Patent #:
Issue Dt:
08/02/2005
Application #:
10150531
Filing Dt:
05/17/2002
Publication #:
Pub Dt:
12/12/2002
Title:
CONTROL TECHNIQUES AND DEVICES FOR AN OPTICAL SWITCH ARRAY
37
Patent #:
Issue Dt:
03/30/2004
Application #:
10157777
Filing Dt:
05/28/2002
Title:
ANTIFUSE INCORPORATING TANTALUM NITRIDE BARRIER LAYER
38
Patent #:
Issue Dt:
05/06/2003
Application #:
10159648
Filing Dt:
05/29/2002
Title:
DUAL-MIXER LOSS OF SIGNAL DETECTION CIRCUIT
39
Patent #:
Issue Dt:
05/10/2005
Application #:
10163096
Filing Dt:
06/04/2002
Title:
FIELD-PROGRAMMABLE GATE ARRAY LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER UTILIZING TWO COMPLIMENTARY OUTPUT BUFFERS
40
Patent #:
Issue Dt:
12/12/2006
Application #:
10163251
Filing Dt:
06/05/2002
Publication #:
Pub Dt:
10/16/2003
Title:
USING A COMMON LINK FIELD KEY
41
Patent #:
Issue Dt:
07/20/2004
Application #:
10216332
Filing Dt:
08/08/2002
Title:
METHOD AND APPARATUS FOR BOOTSTRAPPING A PROGRAMMABLE ANTIFUSE CIRCUIT
42
Patent #:
Issue Dt:
02/01/2005
Application #:
10222341
Filing Dt:
08/16/2002
Publication #:
Pub Dt:
09/11/2003
Title:
MULTIPLE ELEMENT CONTROLLED OPTICAL COUPLING
43
Patent #:
Issue Dt:
09/23/2003
Application #:
10231320
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
01/09/2003
Title:
METHOD AND APPARATUS FOR UNIVERSAL PROGRAM CONTROLLED BUS ARCHITECTURE
44
Patent #:
Issue Dt:
04/13/2004
Application #:
10231655
Filing Dt:
08/28/2002
Title:
ANTIFUSE MEMORY CELL AND ANTIFUSE MEMORY CELL ARRAY
45
Patent #:
Issue Dt:
05/27/2003
Application #:
10231708
Filing Dt:
08/28/2002
Title:
ANTIFUSE MEMORY CELL AND ANTIFUSE MEMORY CELL ARRAY
46
Patent #:
Issue Dt:
11/25/2003
Application #:
10234653
Filing Dt:
09/03/2002
Publication #:
Pub Dt:
03/27/2003
Title:
METHOD AND APPARATUS FOR CONTROLLING MINIMUM BRIGHTNESS OF A FLUORESCENT LAMP
47
Patent #:
Issue Dt:
10/07/2008
Application #:
10235245
Filing Dt:
09/03/2002
Title:
APPARATUS FOR INTERFACING AND TESTING A PHASE LOCKED LOOP IN A FIELD PROGRAMMABLE GATE ARRAY
48
Patent #:
Issue Dt:
10/04/2005
Application #:
10237992
Filing Dt:
09/09/2002
Publication #:
Pub Dt:
12/04/2003
Title:
SERIAL DATA INTERFACE
49
Patent #:
Issue Dt:
06/21/2005
Application #:
10246094
Filing Dt:
09/17/2002
Publication #:
Pub Dt:
08/28/2003
Title:
PROGRAMMABLE MULTI-STANDARD I/O ARCHITECTURE FOR FPGAS
50
Patent #:
Issue Dt:
09/09/2003
Application #:
10246095
Filing Dt:
09/17/2002
Publication #:
Pub Dt:
01/23/2003
Title:
PROGRAMMABLE MULTI-STANDARD I/O ARCHITECTURE FOR FPGAS
51
Patent #:
Issue Dt:
12/05/2006
Application #:
10247114
Filing Dt:
09/18/2002
Title:
SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGA
52
Patent #:
Issue Dt:
09/06/2011
Application #:
10261126
Filing Dt:
09/30/2002
Publication #:
Pub Dt:
03/27/2003
Title:
METHOD AND APPARATUS FOR ACCESSING VARIABLE SIZED BLOCKS OF DATA
53
Patent #:
Issue Dt:
03/09/2004
Application #:
10261362
Filing Dt:
09/30/2002
Publication #:
Pub Dt:
09/18/2003
Title:
METHODS FOR FABRICATING A COMPOUND SEMICONDUCTOR PROTECTION DEVICE FOR LOW VOLTAGE AND HIGH SPEED DATA LINES
54
Patent #:
Issue Dt:
01/20/2004
Application #:
10263066
Filing Dt:
10/01/2002
Title:
DETECTION OF FREQUENCY DIFFERENCES BETWEEN SIGNALS
55
Patent #:
Issue Dt:
06/15/2004
Application #:
10264288
Filing Dt:
10/02/2002
Title:
CARRY CHAIN FOR USE BETWEEN LOGIC MODULES IN A FIELD PROGRAMMABLE GATE ARRAY
56
Patent #:
Issue Dt:
04/26/2005
Application #:
10267917
Filing Dt:
10/08/2002
Title:
PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE (FPGA) AND A METHOD FOR PROGRAMMING AND TESTING AN ANTIFUSE FPGA
57
Patent #:
Issue Dt:
12/16/2003
Application #:
10268274
Filing Dt:
10/09/2002
Publication #:
Pub Dt:
02/20/2003
Title:
POWER MOS DEVICE WITH ASYMMETRICAL CHANNEL STRUCTURE FOR ENHANCED LINEAR OPERATION CAPABILITY
58
Patent #:
Issue Dt:
03/09/2004
Application #:
10269364
Filing Dt:
10/11/2002
Publication #:
Pub Dt:
03/06/2003
Title:
ARCHITECTURE AND INTERCONNECT SCHEME FOR PROGRAMMABLE LOGIC CIRCUITS
59
Patent #:
Issue Dt:
12/21/2004
Application #:
10282398
Filing Dt:
10/29/2002
Publication #:
Pub Dt:
04/29/2004
Title:
ADJUSTMENT OF A CLOCK DUTY CYCLE
60
Patent #:
Issue Dt:
05/02/2006
Application #:
10284057
Filing Dt:
10/30/2002
Publication #:
Pub Dt:
04/03/2003
Title:
ASYMMETRIC DIGITAL SUBSCRIBER LINE METHODS SUITABLE FOR LONG SUBSCRIBER LOOPS
61
Patent #:
Issue Dt:
05/24/2005
Application #:
10288778
Filing Dt:
11/05/2002
Publication #:
Pub Dt:
06/26/2003
Title:
BLOCK LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY
62
Patent #:
Issue Dt:
04/27/2004
Application #:
10293895
Filing Dt:
11/12/2002
Title:
FIELD PROGRAMMABLE GATE ARRAY ARCHITECTURE INCLUDING A BUFFER MODULE AND A METHOD OF DISTRIBUTING BUFFER MODULES IN A FIELD PROGRAMMABLE GATE ARRAY
63
Patent #:
Issue Dt:
01/11/2005
Application #:
10294227
Filing Dt:
11/14/2002
Publication #:
Pub Dt:
06/19/2003
Title:
GLOBAL POSITIONING SYSTEM INTERFERENCE DETECTION
64
Patent #:
Issue Dt:
06/12/2007
Application #:
10295276
Filing Dt:
11/15/2002
Publication #:
Pub Dt:
05/20/2004
Title:
FAST LOCKING CLOCK AND DATA RECOVERY UNIT
65
Patent #:
Issue Dt:
02/14/2006
Application #:
10308458
Filing Dt:
12/02/2002
Publication #:
Pub Dt:
07/31/2003
Title:
APPARATUS AND METHOD FOR INTER-CHIP OR CHIP-TO-SUBSTRATE CONNECTION WITH A SUB-CARRIER
66
Patent #:
Issue Dt:
12/18/2007
Application #:
10318281
Filing Dt:
12/11/2002
Title:
APPARATUS AND METHOD FOR INITIALIZING AN INTEGRATED CIRCUIT DEVICE AND ACTIVATING A FUNCTION OF THE DEVICE ONCE AN INPUT POWER SUPPLY HAS REACHED A THRESHOLD VOLTAGE
67
Patent #:
Issue Dt:
06/03/2008
Application #:
10320312
Filing Dt:
12/16/2002
Title:
DISTRIBUTION OF SYNCHRONIZATION IN AN ETHERNET LOCAL AREA NETWORK ENVIRONMENT
68
Patent #:
Issue Dt:
09/20/2005
Application #:
10323613
Filing Dt:
12/18/2002
Title:
MULTI-LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY HAVING TRANSMITTERS AND RECEIVERS
69
Patent #:
Issue Dt:
04/27/2004
Application #:
10327675
Filing Dt:
12/20/2002
Title:
PROGRAMMING METHODS FOR AN AMORPHOUS CARBON METAL-TO-METAL ANTIFUSE
70
Patent #:
Issue Dt:
05/10/2005
Application #:
10330672
Filing Dt:
12/27/2002
Title:
REPEATABLE BLOCK PRODUCING A NON-UNIFORM ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY HAVING SEGMENTED TRACKS
71
Patent #:
Issue Dt:
11/15/2005
Application #:
10331144
Filing Dt:
12/27/2002
Title:
AMORPHOUS CARBON METAL-TO-METAL ANTIFUSE WITH ADHESION PROMOTING LAYERS
72
Patent #:
Issue Dt:
08/10/2004
Application #:
10334338
Filing Dt:
12/30/2002
Title:
FIELD PROGRAMMABLE GATE ARRAY FREEWAY ARCHITECTURE
73
Patent #:
Issue Dt:
08/10/2004
Application #:
10334339
Filing Dt:
12/30/2002
Title:
FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
74
Patent #:
Issue Dt:
08/10/2004
Application #:
10334340
Filing Dt:
12/30/2002
Title:
INTRA-TILE BUFFER SYSTEM FOR A FIELD PROGRAMMABLE GATE ARRAY
75
Patent #:
Issue Dt:
10/05/2004
Application #:
10334393
Filing Dt:
12/30/2002
Title:
INTER-TILE BUFFER SYSTEM FOR A FIELD PROGRAMMABLE GATE ARRAY
76
Patent #:
Issue Dt:
01/04/2005
Application #:
10335234
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAY
77
Patent #:
Issue Dt:
01/03/2006
Application #:
10339040
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
08/21/2003
Title:
SILICON CARBIDE SEMICONDUCTOR DEVICES WITH A REGROWN CONTACT LAYER
78
Patent #:
Issue Dt:
04/24/2007
Application #:
10339800
Filing Dt:
01/10/2003
Title:
SPRAY COATING APPARATUS AND FIXTURES
79
Patent #:
Issue Dt:
03/16/2004
Application #:
10345600
Filing Dt:
01/16/2003
Publication #:
Pub Dt:
06/12/2003
Title:
CLOCK RECOVERY OR DETECTION OF RAPID PHASE TRANSIENTS
80
Patent #:
Issue Dt:
02/09/2010
Application #:
10349576
Filing Dt:
01/23/2003
Publication #:
Pub Dt:
08/14/2003
Title:
SUPPORTING SYNCHRONIZATION STATUS MESSAGES ON BUILDING INTEGRATED TIMING SUPPLY SYNCHRONIZATION SUPPLY UNIT REMOTE SHELVES
81
Patent #:
Issue Dt:
08/03/2004
Application #:
10351099
Filing Dt:
01/22/2003
Title:
CYCLIC REDUNDANCY CHECKING OF A FIELD PROGRAMMABLE GATE ARRAY HAVING AN SRAM MEMORY ARCHITECTURE
82
Patent #:
Issue Dt:
07/06/2004
Application #:
10351602
Filing Dt:
01/24/2003
Publication #:
Pub Dt:
02/12/2004
Title:
DISTRIBUTED LEVEL-SHIFTING NETWORK FOR CASCADING BROADBAND AMPLIFIERS
83
Patent #:
Issue Dt:
09/06/2005
Application #:
10352314
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
07/31/2003
Title:
SPLIT-GATE POWER MODULE AND METHOD FOR SUPPRESSING OSCILLATION THEREIN
84
Patent #:
Issue Dt:
07/20/2004
Application #:
10360662
Filing Dt:
02/07/2003
Publication #:
Pub Dt:
08/21/2003
Title:
METHOD OF FABRICATING SELF-ALIGNED SILICON CARBIDE SEMICONDUCTOR DEVICES
85
Patent #:
Issue Dt:
03/29/2005
Application #:
10364075
Filing Dt:
02/10/2003
Publication #:
Pub Dt:
08/12/2004
Title:
SELF-ALIGNED BIPOLAR TRANSISTOR
86
Patent #:
Issue Dt:
05/24/2005
Application #:
10382748
Filing Dt:
03/05/2003
Publication #:
Pub Dt:
09/11/2003
Title:
CHARGE PUMP REGULATOR WITH LOAD CURRENT CONTROL
87
Patent #:
Issue Dt:
02/20/2007
Application #:
10384296
Filing Dt:
03/07/2003
Publication #:
Pub Dt:
09/09/2004
Title:
METHOD AND APPARATUS FOR A SINGLE POWER SUPPLY FOR DUAL POWER MODE
88
Patent #:
Issue Dt:
09/26/2006
Application #:
10384299
Filing Dt:
03/07/2003
Publication #:
Pub Dt:
09/09/2004
Title:
METHOD AND APPARATUS FOR A DIFFERENTIAL FEEDBACK IN AN ACTIVE IMPEDENCE FEEDBACK CIRCUIT
89
Patent #:
Issue Dt:
10/18/2005
Application #:
10384300
Filing Dt:
03/07/2003
Publication #:
Pub Dt:
09/09/2004
Title:
METHOD AND APPARATUS FOR PHANTOM BATTERY FEED
90
Patent #:
Issue Dt:
08/21/2007
Application #:
10384302
Filing Dt:
03/07/2003
Publication #:
Pub Dt:
09/09/2004
Title:
UNBALANCED SLIC WITH A BUILT-IN RING CIRCUIT
91
Patent #:
Issue Dt:
08/07/2007
Application #:
10384304
Filing Dt:
03/07/2003
Publication #:
Pub Dt:
09/09/2004
Title:
METHOD AND APPARATUS FOR AN ACTIVE IMPEDANCE FEEDBACK
92
Patent #:
Issue Dt:
03/22/2005
Application #:
10400326
Filing Dt:
03/26/2003
Publication #:
Pub Dt:
09/30/2004
Title:
SHORTED LAMP DETECTION IN BACKLIGHT SYSTEM
93
Patent #:
Issue Dt:
07/27/2004
Application #:
10405860
Filing Dt:
04/01/2003
Publication #:
Pub Dt:
11/06/2003
Title:
METAL-TO-METAL ANTIFUSE EMPLOYING CARBON-CONTAINING ANTIFUSE MATERIAL
94
Patent #:
Issue Dt:
10/12/2004
Application #:
10406064
Filing Dt:
04/02/2003
Publication #:
Pub Dt:
11/27/2003
Title:
PSEUDO-DIFFERENTIAL TRANSIMPEDANCE AMPLIFIER
95
Patent #:
Issue Dt:
08/31/2004
Application #:
10406071
Filing Dt:
04/02/2003
Publication #:
Pub Dt:
11/27/2003
Title:
TRANSIMPEDANCE AMPLIFIER WITH SELECTIVE DC COMPENSATION
96
Patent #:
Issue Dt:
09/28/2004
Application #:
10406860
Filing Dt:
04/04/2003
Title:
SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGA
97
Patent #:
Issue Dt:
09/21/2004
Application #:
10411627
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/30/2003
Title:
HIGH DENSITY ANTIFUSE BASED PARTITIONED FPGA ARCHITECTURE
98
Patent #:
Issue Dt:
10/10/2006
Application #:
10411993
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/14/2004
Title:
ON-CHIP CALIBRATED SOURCE TERMINATION FOR VOLTAGE MODE DRIVER AND METHOD OF CALIBRATION THEREOF
99
Patent #:
Issue Dt:
08/24/2004
Application #:
10412975
Filing Dt:
04/11/2003
Publication #:
Pub Dt:
10/23/2003
Title:
METHOD AND APPARATUS FOR UNIVERSAL PROGRAM CONTROLLED BUS ARCHITECTURE
100
Patent #:
Issue Dt:
11/15/2005
Application #:
10424549
Filing Dt:
04/25/2003
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND APPARATUS FOR AUTO-INTERLEAVING SYNCHRONIZATION IN A MULTIPHASE SWITCHING POWER CONVERTER
Assignor
1
Exec Dt:
01/15/2016
Assignees
1
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
2
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
3
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
4
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
5
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
6
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
7
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
Correspondence name and address
ELAINE CARRERA, LEGAL ASSISTANT
80 PINE STREET
C/O CAHILL GORDON & REINDEL LLP
NEW YORK, NY 10005

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