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Reel/Frame:037558/0711   Pages: 101
Recorded: 01/19/2016
Conveyance: RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
Total properties: 1256
Page 9 of 13
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13
1
Patent #:
Issue Dt:
12/22/2009
Application #:
11451652
Filing Dt:
06/12/2006
Publication #:
Pub Dt:
02/15/2007
Title:
ADAPTIVE PLAY-OUT BUFFERS AND CLOCK OPERATION IN PACKET NETWORKS
2
Patent #:
Issue Dt:
02/22/2011
Application #:
11451653
Filing Dt:
06/12/2006
Publication #:
Pub Dt:
02/22/2007
Title:
ADAPTIVE PLAY-OUT BUFFERS AND ADAPTIVE CLOCK OPERATION IN PACKET NETWORKS
3
Patent #:
Issue Dt:
06/10/2008
Application #:
11460055
Filing Dt:
07/26/2006
Publication #:
Pub Dt:
11/16/2006
Title:
NON-VOLATILE MEMORY ARCHITECTURE FOR PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP
4
Patent #:
Issue Dt:
11/10/2009
Application #:
11463846
Filing Dt:
08/10/2006
Title:
FLASH-BASED FPGA WITH SECURE REPROGRAMMING
5
Patent #:
Issue Dt:
10/09/2007
Application #:
11465530
Filing Dt:
08/18/2006
Title:
MIXED-SIGNAL SYSTEM-ON-A-CHIP ANALOG SIGNAL DIRECT INTERCONNECTION THROUGH PROGRAMMABLE LOGIC CONTROL
6
Patent #:
Issue Dt:
08/19/2008
Application #:
11465899
Filing Dt:
08/21/2006
Publication #:
Pub Dt:
12/14/2006
Title:
NON-VOLATILE MEMORY CONFIGURATION SCHEME FOR VOLATILE-MEMORY-BASED PROGRAMMABLE CIRCUITS IN AN FPGA
7
Patent #:
Issue Dt:
03/22/2011
Application #:
11467279
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
12/21/2006
Title:
POWER-UP AND POWER-DOWN CIRCUIT FOR SYSTEM-ON-A-CHIP INTEGRATED CIRCUIT
8
Patent #:
Issue Dt:
10/21/2008
Application #:
11467475
Filing Dt:
08/25/2006
Publication #:
Pub Dt:
12/21/2006
Title:
VOLTAGE-AND TEMPERATURE-COMPENSATED RC OSCILLATOR CIRCUIT
9
Patent #:
Issue Dt:
07/22/2008
Application #:
11484243
Filing Dt:
07/10/2006
Title:
DEGLITCHING CIRCUITS FOR A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY BASED PROGRAMMABLE ARCHITECTURE
10
Patent #:
Issue Dt:
03/06/2007
Application #:
11484244
Filing Dt:
07/10/2006
Title:
FLASH/DYNAMIC RANDOM ACCESS MEMORY FIELD PROGRAMMABLE GATE ARRAY
11
Patent #:
Issue Dt:
12/22/2009
Application #:
11508361
Filing Dt:
08/22/2006
Publication #:
Pub Dt:
02/28/2008
Title:
MAINTAINING FILTERING DATABASE CONSISTENCY
12
Patent #:
Issue Dt:
01/12/2010
Application #:
11526324
Filing Dt:
09/25/2006
Publication #:
Pub Dt:
01/18/2007
Title:
FULL-BRIDGE AND HALF-BRIDGE COMPATIBLE DRIVER TIMING SCHEDULE FOR DIRECT DRIVE BACKLIGHT SYSTEM
13
Patent #:
Issue Dt:
10/07/2008
Application #:
11531375
Filing Dt:
09/13/2006
Title:
MULTI-LEVEL ROUTING ARCHITECTURE IN A FIELD PROGRAMMABLE GATE ARRAY HAVING TRANSMITTERS AND RECEIVERS
14
Patent #:
Issue Dt:
09/11/2007
Application #:
11532757
Filing Dt:
09/18/2006
Title:
PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE (FPGA) AND A METHOD FOR PROGRAMMING AND TESTING AN ANTIFUSE FPGA
15
Patent #:
Issue Dt:
08/25/2009
Application #:
11536581
Filing Dt:
09/28/2006
Publication #:
Pub Dt:
04/05/2007
Title:
SELF ALIGNED PROCESS FOR BJT FABRICATION
16
Patent #:
Issue Dt:
06/22/2010
Application #:
11542090
Filing Dt:
09/29/2006
Publication #:
Pub Dt:
04/03/2008
Title:
PLASTIC SURFACE MOUNT LARGE AREA POWER DEVICE
17
Patent #:
Issue Dt:
05/27/2008
Application #:
11548199
Filing Dt:
10/10/2006
Title:
FIELD-PROGRAMMABLE GATE ARRAY LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER UTILIZING TWO COMPLIMENTARY OUTPUT BUFFERS
18
Patent #:
Issue Dt:
06/02/2009
Application #:
11550336
Filing Dt:
10/17/2006
Title:
CYCLIC REDUNDANCY CHECKING OF A FIELD PROGRAMMABLE GATE ARRAY HAVING AN SRAM MEMORY ARCHITECTURE
19
Patent #:
Issue Dt:
09/09/2008
Application #:
11551857
Filing Dt:
10/23/2006
Publication #:
Pub Dt:
03/01/2007
Title:
SYSTEM-ON-A-CHIP INTEGRATED CIRCUIT INCLUDING DUAL-FUNCTION ANALOG AND DIGITAL INPUTS
20
Patent #:
Issue Dt:
01/22/2008
Application #:
11551973
Filing Dt:
10/23/2006
Publication #:
Pub Dt:
03/01/2007
Title:
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
21
Patent #:
Issue Dt:
01/27/2009
Application #:
11552482
Filing Dt:
10/24/2006
Title:
METHOD AND APPARATUS OF MEMORY CLEARING WITH MONITORING RAM MEMORY CELLS IN A FIELD PROGRAMMABLE GATED ARRAY
22
Patent #:
Issue Dt:
02/19/2008
Application #:
11555168
Filing Dt:
10/31/2006
Publication #:
Pub Dt:
09/13/2007
Title:
HIGH-SPEED DATA INTERFACE FOR CONNECTING NETWORK DEVICES
23
Patent #:
Issue Dt:
01/27/2009
Application #:
11561695
Filing Dt:
11/20/2006
Title:
DELAY LOCKED LOOP FOR AN FPGA ARCHITECTURE
24
Patent #:
Issue Dt:
03/11/2008
Application #:
11561705
Filing Dt:
11/20/2006
Publication #:
Pub Dt:
04/05/2007
Title:
TILEABLE FIELD-PROGRAMMABLE GATE ARRAY ARCHITECTURE
25
Patent #:
Issue Dt:
08/19/2008
Application #:
11562049
Filing Dt:
11/21/2006
Title:
INTEGRATED MULTI-FUNCTION ANALOG CIRCUIT INCLUDING VOLTAGE, CURRENT, AND TEMPERATURE MONITOR AND GATE-DRIVER CIRCUIT BLOCKS
26
Patent #:
Issue Dt:
09/22/2009
Application #:
11567625
Filing Dt:
12/06/2006
Publication #:
Pub Dt:
04/26/2007
Title:
METHOD FOR ERASING PROGRAMMABLE INTERCONNECT CELLS FOR FIELD PROGRAMMABLE GATE ARRAYS USING REVERSE BIAS VOLTAGE
27
Patent #:
Issue Dt:
08/19/2008
Application #:
11600002
Filing Dt:
11/15/2006
Title:
VOLTAGE REGULATION LOOP WITH VARIABLE GAIN CONTROL FOR INVERTER CIRCUIT
28
Patent #:
Issue Dt:
07/15/2008
Application #:
11612771
Filing Dt:
12/19/2006
Title:
MIXED SIGNAL SYSTEM-ON-A-CHIP INTEGRATED SIMULTANEOUS MULTIPLE SAMPLE/HOLD CIRCUITS AND EMBEDDED ANALOG COMPARATORS
29
Patent #:
Issue Dt:
03/02/2010
Application #:
11614897
Filing Dt:
12/21/2006
Publication #:
Pub Dt:
05/03/2007
Title:
DESIGN AND FABRICATION OF RUGGED FRED, POWER MOSFET OR IGBT
30
Patent #:
Issue Dt:
10/30/2007
Application #:
11617559
Filing Dt:
12/28/2006
Publication #:
Pub Dt:
05/10/2007
Title:
APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAY
31
Patent #:
Issue Dt:
03/03/2009
Application #:
11619547
Filing Dt:
01/03/2007
Publication #:
Pub Dt:
05/10/2007
Title:
FLASH/DYNAMIC RANDOM ACCESS MEMORY FIELD PROGRAMMABLE GATE ARRAY
32
Patent #:
Issue Dt:
01/03/2012
Application #:
11621426
Filing Dt:
01/09/2007
Publication #:
Pub Dt:
07/10/2008
Title:
METHOD AND APPARATUS FOR POWER-MODE CONTROL
33
Patent #:
Issue Dt:
02/05/2008
Application #:
11621863
Filing Dt:
01/10/2007
Publication #:
Pub Dt:
05/17/2007
Title:
OPTICAL ISOLATOR DEVICE, AND METHOD OF MAKING SAME
34
Patent #:
Issue Dt:
11/22/2011
Application #:
11669882
Filing Dt:
01/31/2007
Publication #:
Pub Dt:
02/28/2008
Title:
ENHANCED CLOCK CONTROL IN PACKET NETWORKS
35
Patent #:
Issue Dt:
08/11/2009
Application #:
11673422
Filing Dt:
02/09/2007
Publication #:
Pub Dt:
09/27/2007
Title:
SYSTEM AND METHOD FOR IM3 REDUCTION AND CANCELLATION IN AMPLIFIERS
36
Patent #:
Issue Dt:
04/29/2008
Application #:
11676188
Filing Dt:
02/16/2007
Publication #:
Pub Dt:
06/21/2007
Title:
RADIATION TOLERANT SRAM BIT
37
Patent #:
Issue Dt:
09/07/2010
Application #:
11676312
Filing Dt:
02/19/2007
Publication #:
Pub Dt:
08/23/2007
Title:
THERMAL LIMITED BACKLIGHT DRIVER
38
Patent #:
Issue Dt:
06/10/2008
Application #:
11677432
Filing Dt:
02/21/2007
Title:
DEDICATED INPUT/OUTPUT FIRST IN/FIRST OUT MODULE FOR A FIELD PROGRAMMABLE GATE ARRAY
39
Patent #:
Issue Dt:
01/27/2009
Application #:
11677441
Filing Dt:
02/21/2007
Title:
LOW-CAPACITANCE INPUT/OUTPUT AND ELECTROSTATIC DISCHARGE CIRCUIT FOR PROTECTING AN INTEGRATED CIRCUIT FROM ELECTROSTATIC DISCHARGE
40
Patent #:
Issue Dt:
06/24/2008
Application #:
11679046
Filing Dt:
02/26/2007
Publication #:
Pub Dt:
06/14/2007
Title:
OPTICAL AND TEMPERATURE FEEDBACKS TO CONTROL DISPLAY BRIGHTNESS
41
Patent #:
Issue Dt:
04/28/2009
Application #:
11682242
Filing Dt:
03/05/2007
Publication #:
Pub Dt:
06/28/2007
Title:
SPLIT PHASE INVERTERS FOR CCFL BACKLIGHT SYSTEM
42
Patent #:
Issue Dt:
10/28/2008
Application #:
11688688
Filing Dt:
03/20/2007
Publication #:
Pub Dt:
08/09/2007
Title:
SRAM BUS ARCHITECTURE AND INTERCONNECT TO AN FPGA
43
Patent #:
Issue Dt:
07/01/2008
Application #:
11692717
Filing Dt:
03/28/2007
Publication #:
Pub Dt:
07/19/2007
Title:
FIELD PROGRAMMABLE GATE ARRAY LONG LINE ROUTING NETWORK
44
Patent #:
Issue Dt:
05/18/2010
Application #:
11695992
Filing Dt:
04/03/2007
Publication #:
Pub Dt:
08/09/2007
Title:
INTEGRATED CIRCUIT WAFER WITH INTER-DIE METAL INTERCONNECT LINES TRAVERSING SCRIBE-LINE BOUNDARIES
45
Patent #:
Issue Dt:
10/14/2014
Application #:
11723394
Filing Dt:
03/19/2007
Publication #:
Pub Dt:
09/27/2007
Title:
TIMING SOURCE
46
Patent #:
Issue Dt:
11/15/2011
Application #:
11728624
Filing Dt:
03/27/2007
Publication #:
Pub Dt:
10/02/2008
Title:
INTEGRATED CIRCUIT WITH FLEXIBLE PLANER LEADS
47
Patent #:
Issue Dt:
07/01/2008
Application #:
11737030
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
08/09/2007
Title:
SYNCHRONOUS FIRST-IN/FIRST-OUT BLOCK MEMORY FOR A FIELD PROGRAMMABLE GATE ARRAY
48
Patent #:
Issue Dt:
11/11/2008
Application #:
11737172
Filing Dt:
04/19/2007
Publication #:
Pub Dt:
10/25/2007
Title:
CHARGE LIMITED HIGH VOLTAGE SWITCH CIRCUITS
49
Patent #:
Issue Dt:
03/13/2012
Application #:
11740332
Filing Dt:
04/26/2007
Publication #:
Pub Dt:
11/15/2007
Title:
AUTOMATIC GAIN CONTROL FOR MOBILE MICROPHONE
50
Patent #:
Issue Dt:
08/05/2008
Application #:
11740458
Filing Dt:
04/26/2007
Publication #:
Pub Dt:
08/16/2007
Title:
SRAM CELL CONTROLLED BY FLASH MEMORY CELL
51
Patent #:
Issue Dt:
12/15/2009
Application #:
11745134
Filing Dt:
05/07/2007
Publication #:
Pub Dt:
09/06/2007
Title:
SYSTEM FOR SIGNAL ROUTING LINE AGGREGATION IN A FIELD-PROGRAMMABLE GATE ARRAY
52
Patent #:
Issue Dt:
06/10/2008
Application #:
11748865
Filing Dt:
05/15/2007
Publication #:
Pub Dt:
09/13/2007
Title:
BLOCK SYMMETRIZATION IN A FIELD PROGRAMMABLE GATE ARRAY
53
Patent #:
Issue Dt:
05/28/2013
Application #:
11749666
Filing Dt:
05/16/2007
Publication #:
Pub Dt:
11/22/2007
Title:
NETWORK TIME PROTOCOL PRECISION TIMESTAMPING SERVICE
54
Patent #:
Issue Dt:
03/11/2008
Application #:
11750650
Filing Dt:
05/18/2007
Publication #:
Pub Dt:
09/20/2007
Title:
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
55
Patent #:
Issue Dt:
09/15/2009
Application #:
11762451
Filing Dt:
06/13/2007
Publication #:
Pub Dt:
10/04/2007
Title:
NON-VOLATILE PROGRAMMABLE MEMORY CELL FOR PROGRAMMABLE LOGIC ARRAY
56
Patent #:
Issue Dt:
07/15/2008
Application #:
11769169
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
12/06/2007
Title:
CIRCUIT AND METHOD FOR SUPPLYING PROGRAMMING POTENTIAL AT VOLTAGES LARGER THAN BVDSS OF PROGRAMMING TRANSISTORS
57
Patent #:
Issue Dt:
10/20/2009
Application #:
11772249
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
02/28/2008
Title:
CONTROLLED BLEEDER FOR POWER SUPPLY
58
Patent #:
Issue Dt:
08/04/2009
Application #:
11773611
Filing Dt:
07/05/2007
Publication #:
Pub Dt:
05/29/2008
Title:
STRIKING AND OPEN LAMP REGULATION FOR CCFL CONTROLLER
59
Patent #:
Issue Dt:
11/04/2008
Application #:
11774676
Filing Dt:
07/09/2007
Publication #:
Pub Dt:
11/01/2007
Title:
PROGRAMMABLE SYSTEM ON A CHIP FOR TEMPERATURE MONITORING AND CONTROL
60
Patent #:
Issue Dt:
07/20/2010
Application #:
11778093
Filing Dt:
07/16/2007
Publication #:
Pub Dt:
01/31/2008
Title:
COLOR CONTROL FOR SCANNING BACKLIGHT
61
Patent #:
NONE
Issue Dt:
Application #:
11789455
Filing Dt:
04/23/2007
Publication #:
Pub Dt:
11/15/2007
Title:
Spray coating apparatus and fixtures
62
Patent #:
Issue Dt:
05/03/2011
Application #:
11829335
Filing Dt:
07/27/2007
Publication #:
Pub Dt:
01/29/2009
Title:
ERROR-DETECTING AND CORRECTING FPGA ARCHITECTURE
63
Patent #:
Issue Dt:
07/07/2009
Application #:
11830685
Filing Dt:
07/30/2007
Publication #:
Pub Dt:
11/22/2007
Title:
PRIMARY SIDE CURRENT BALANCING SCHEME FOR MULTIPLE CCF LAMP OPERATION
64
Patent #:
Issue Dt:
05/12/2009
Application #:
11833833
Filing Dt:
08/03/2007
Publication #:
Pub Dt:
02/14/2008
Title:
ADDRESS TRANSITION DETECTOR FOR FAST FLASH MEMORY DEVICE
65
Patent #:
Issue Dt:
07/03/2012
Application #:
11835886
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
MILLIMETER WAVE IMAGING METHOD AND SYSTEM TO DETECT CONCEALED OBJECTS
66
Patent #:
Issue Dt:
01/18/2011
Application #:
11835905
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
MULTIPLE CAMERA IMAGING METHOD AND SYSTEM FOR DETECTING CONCEALED OBJECTS
67
Patent #:
Issue Dt:
10/13/2009
Application #:
11835930
Filing Dt:
08/08/2007
Publication #:
Pub Dt:
02/12/2009
Title:
BROADBAND ENERGY ILLUMINATOR
68
Patent #:
Issue Dt:
06/16/2009
Application #:
11837700
Filing Dt:
08/13/2007
Publication #:
Pub Dt:
01/31/2008
Title:
PARALLEL PROGRAMMABLE ANTIFUSE FIELD PROGRAMMABLE GATE ARRAY DEVICE (FPGA) AND A METHOD FOR PROGRAMMING AND TESTING AN ANTIFUSE FPGA
69
Patent #:
Issue Dt:
08/25/2009
Application #:
11843575
Filing Dt:
08/22/2007
Publication #:
Pub Dt:
12/13/2007
Title:
ARCHITECTURE FOR ROUTING RESOURCES IN A FIELD PROGRAMMABLE GATE ARRAY
70
Patent #:
Issue Dt:
03/02/2010
Application #:
11844569
Filing Dt:
08/24/2007
Title:
APPARATUS AND METHOD FOR INITIALIZING AN INTEGRATED CIRCUIT DEVICE AND ACTIVATING A FUNCTION OF THE DEVICE ONCE AN INPUT POWER SUPPLY HAS REACHED A THRESHOLD VOLTAGE
71
Patent #:
Issue Dt:
09/16/2008
Application #:
11844581
Filing Dt:
08/24/2007
Title:
APPARATUS AND METHOD FOR INITIALIZING AN INTEGRATED CIRCUIT DEVICE AND ACTIVATING A FUNCTION OF THE DEVICE ONCE AN INPUT POWER SUPPLY HAS REACHED A THRESHOLD VOLTAGE
72
Patent #:
Issue Dt:
08/05/2008
Application #:
11855974
Filing Dt:
09/14/2007
Title:
FPGA ARCHITECTURE HAVING TWO-LEVEL CLUSTER INPUT INTERCONNECT SCHEME WITHOUT BANDWIDTH LIMITATION
73
Patent #:
Issue Dt:
02/17/2009
Application #:
11858322
Filing Dt:
09/20/2007
Publication #:
Pub Dt:
01/10/2008
Title:
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
74
Patent #:
Issue Dt:
02/24/2009
Application #:
11858330
Filing Dt:
09/20/2007
Publication #:
Pub Dt:
01/10/2008
Title:
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
75
Patent #:
Issue Dt:
05/26/2009
Application #:
11858341
Filing Dt:
09/20/2007
Publication #:
Pub Dt:
01/10/2008
Title:
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
76
Patent #:
Issue Dt:
06/30/2009
Application #:
11859073
Filing Dt:
09/21/2007
Title:
NONVOLATILE MEMORY INTEGRATED CIRCUIT HAVING ASSEMBLY BUFFER AND BIT-LINE DRIVER, AND METHOD OF OPERATION THEREOF
77
Patent #:
Issue Dt:
10/28/2008
Application #:
11859497
Filing Dt:
09/21/2007
Publication #:
Pub Dt:
01/10/2008
Title:
APPARATUS AND METHOD OF ERROR DETECTION AND CORRECTION IN A RADIATION-HARDENED STATIC RANDOM ACCESS MEMORY FIELD-PROGRAMMABLE GATE ARRAY
78
Patent #:
Issue Dt:
08/11/2009
Application #:
11861504
Filing Dt:
09/26/2007
Title:
VOLATILE DATA STORAGE IN A NON-VOLATILE MEMORY CELL ARRAY
79
Patent #:
Issue Dt:
01/11/2011
Application #:
11866262
Filing Dt:
10/02/2007
Publication #:
Pub Dt:
04/10/2008
Title:
METHOD AND APPARATUS TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN A PWM-BASED VOLTAGE REGULATOR
80
Patent #:
Issue Dt:
08/12/2008
Application #:
11868229
Filing Dt:
10/05/2007
Publication #:
Pub Dt:
01/31/2008
Title:
APPARATUS AND METHOD FOR STRIKING A FLUORESCENT LAMP
81
Patent #:
Issue Dt:
09/30/2008
Application #:
11868694
Filing Dt:
10/08/2007
Publication #:
Pub Dt:
01/31/2008
Title:
NON-VOLATILE MEMORY CELLS IN A FIELD PROGRAMMABLE GATE ARRAY
82
Patent #:
Issue Dt:
03/10/2009
Application #:
11871741
Filing Dt:
10/12/2007
Publication #:
Pub Dt:
02/07/2008
Title:
CLOCK-GENERATOR ARCHITECTURE FOR A PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP
83
Patent #:
Issue Dt:
05/26/2009
Application #:
11927237
Filing Dt:
10/29/2007
Title:
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
84
Patent #:
Issue Dt:
01/06/2009
Application #:
11927265
Filing Dt:
10/29/2007
Title:
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
85
Patent #:
Issue Dt:
08/11/2009
Application #:
11927282
Filing Dt:
10/29/2007
Title:
NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
86
Patent #:
Issue Dt:
11/10/2009
Application #:
11928428
Filing Dt:
10/30/2007
Title:
PROGRAMMABLE LOGIC DEVICE ADAPTED TO ENTER A LOW-POWER MODE
87
Patent #:
Issue Dt:
02/08/2011
Application #:
11928445
Filing Dt:
10/30/2007
Title:
PROGRAMMABLE LOGIC DEVICE ADAPTED TO ENTER A LOW-POWER MODE
88
Patent #:
Issue Dt:
10/28/2008
Application #:
11929287
Filing Dt:
10/30/2007
Title:
NON-VOLATILE LOOK-UP TABLE FOR AN FPGA
89
Patent #:
Issue Dt:
11/03/2009
Application #:
11931772
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
02/28/2008
Title:
PROGRAMMABLE SYSTEM ON A CHIP
90
Patent #:
Issue Dt:
02/03/2009
Application #:
11932462
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
05/29/2008
Title:
PROGRAMMABLE SYSTEM ON A CHIP
91
Patent #:
Issue Dt:
09/02/2008
Application #:
11932661
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
04/24/2008
Title:
PROGRAMMABLE SYSTEM ON A CHIP FOR POWER-SUPPLY VOLTAGE AND CURRENT MONITORING AND CONTROL
92
Patent #:
Issue Dt:
02/17/2009
Application #:
11932710
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
02/28/2008
Title:
PROGRAMMABLE SYSTEM ON A CHIP FOR POWER-SUPPLY VOLTAGE AND CURRENT MONITORING AND CONTROL
93
Patent #:
Issue Dt:
02/17/2009
Application #:
11932778
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
03/13/2008
Title:
PROGRAMMABLE SYSTEM ON A CHIP FOR POWER-SUPPLY VOLTAGE AND CURRENT MONITORING AND CONTROL
94
Patent #:
Issue Dt:
08/25/2009
Application #:
11932807
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
12/18/2008
Title:
CLOCK-GENERATOR ARCHITECTURE FOR A PROGRAMMABLE-LOGIC-BASED SYSTEM ON A CHIP
95
Patent #:
Issue Dt:
04/21/2009
Application #:
11932901
Filing Dt:
10/31/2007
Publication #:
Pub Dt:
02/28/2008
Title:
INTEGRATED CIRCUIT INCLUDING PROGRAMMABLE LOGIC AND EXTERNAL-DEVICE CHIP-ENABLE OVERRIDE CONTROL
96
Patent #:
Issue Dt:
02/22/2011
Application #:
11934798
Filing Dt:
11/05/2007
Publication #:
Pub Dt:
05/15/2008
Title:
REDUCED GUARD BAND FOR POWER OVER ETHERNET
97
Patent #:
Issue Dt:
07/14/2009
Application #:
11937693
Filing Dt:
11/09/2007
Publication #:
Pub Dt:
03/13/2008
Title:
BALANCING TRANSFORMERS FOR MULTI-LAMP OPERATION
98
Patent #:
Issue Dt:
05/25/2010
Application #:
11942572
Filing Dt:
11/19/2007
Publication #:
Pub Dt:
02/19/2009
Title:
METHOD FOR PRODUCING SHOCK AND TAMPER RESISTANT MICROELECTRONIC DEVICES
99
Patent #:
Issue Dt:
06/15/2010
Application #:
11943569
Filing Dt:
11/20/2007
Publication #:
Pub Dt:
10/23/2008
Title:
METHOD AND APPARATUS FOR IMPROVED HIGH-SPEED ADAPTIVE EQUALIZATION
100
Patent #:
Issue Dt:
12/14/2010
Application #:
11955477
Filing Dt:
12/13/2007
Publication #:
Pub Dt:
06/18/2009
Title:
USING A TRIANGULAR WAVEFORM TO SYNCHRONIZE THE OPERATION OF AN ELECTRONIC CIRCUIT
Assignor
1
Exec Dt:
01/15/2016
Assignees
1
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
2
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
3
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
4
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
5
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
6
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
7
ONE ENTERPRISE
ALISO VIEJO, CALIFORNIA 92656
Correspondence name and address
ELAINE CARRERA, LEGAL ASSISTANT
80 PINE STREET
C/O CAHILL GORDON & REINDEL LLP
NEW YORK, NY 10005

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