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Reel/Frame:037808/0001   Pages: 1020
Recorded: 02/11/2016
Attorney Dkt #:040981-0094
Conveyance: PATENT SECURITY AGREEMENT
Total properties: 11687
Page 103 of 117
Pages: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117
1
Patent #:
8923382
Issue Dt:
12/30/2014
Application #:
13422403
Filing Dt:
03/16/2012
Publication #:
US20130243070
Pub Dt:
09/19/2013
Title:
TAP ADAPTATION WITH A FULLY UNROLLED DECISION FEEDBACK EQUALIZER
2
Patent #:
8982941
Issue Dt:
03/17/2015
Application #:
13422450
Filing Dt:
03/16/2012
Publication #:
US20130243071
Pub Dt:
09/19/2013
Title:
PREDICTIVE SELECTION IN A FULLY UNROLLED DECISION FEEDBACK EQUALIZER
3
Patent #:
8321755
Issue Dt:
11/27/2012
Application #:
13422742
Filing Dt:
03/16/2012
Publication #:
US20120173950
Pub Dt:
07/05/2012
Title:
SYSTEMS AND METHODS FOR EFFICIENT DATA STORAGE
4
Patent #:
8977937
Issue Dt:
03/10/2015
Application #:
13422986
Filing Dt:
03/16/2012
Publication #:
US20130246877
Pub Dt:
09/19/2013
Title:
Systems and Methods for Compression Driven Variable Rate Decoding in a Data Processing System
5
Patent #:
8429586
Issue Dt:
04/23/2013
Application #:
13424747
Filing Dt:
03/20/2012
Publication #:
US20120175683
Pub Dt:
07/12/2012
Title:
BASIC CELL ARCHITECTURE FOR STRUCTURED ASICS
6
Patent #:
8699550
Issue Dt:
04/15/2014
Application #:
13425467
Filing Dt:
03/21/2012
Publication #:
US20130251007
Pub Dt:
09/26/2013
Title:
PHASE ALIGNMENT BETWEEN PHASE-SKEWED CLOCK DOMAINS
7
Patent #:
NONE
Issue Dt:
Application #:
13425698
Filing Dt:
03/21/2012
Publication #:
US20130254457
Pub Dt:
09/26/2013
Title:
METHODS AND STRUCTURE FOR RAPID OFFLOADING OF CACHED DATA IN A VOLATILE CACHE MEMORY OF A STORAGE CONTROLLER TO A NONVOLATILE MEMORY
8
Patent #:
9043684
Issue Dt:
05/26/2015
Application #:
13426693
Filing Dt:
03/22/2012
Publication #:
US20130254623
Pub Dt:
09/26/2013
Title:
SYSTEMS AND METHODS FOR VARIABLE REDUNDANCY DATA PROTECTION
9
Patent #:
9230596
Issue Dt:
01/05/2016
Application #:
13426714
Filing Dt:
03/22/2012
Publication #:
US20130254616
Pub Dt:
09/26/2013
Title:
Systems and Methods for Variable Rate Coding in a Data Processing System
10
Patent #:
8949704
Issue Dt:
02/03/2015
Application #:
13426722
Filing Dt:
03/22/2012
Publication #:
US20130254619
Pub Dt:
09/26/2013
Title:
Systems and Methods for Mis-Correction Correction in a Data Processing System
11
Patent #:
8536921
Issue Dt:
09/17/2013
Application #:
13428155
Filing Dt:
03/23/2012
Publication #:
US20130069703
Pub Dt:
03/21/2013
Title:
UNIFORM-FOOTPRINT PROGRAMMABLE-SKEW MULTI-STAGE DELAY CELL
12
Patent #:
8592233
Issue Dt:
11/26/2013
Application #:
13428378
Filing Dt:
03/23/2012
Publication #:
US20130023072
Pub Dt:
01/24/2013
Title:
Substrate For Integrated Modules
13
Patent #:
8673121
Issue Dt:
03/18/2014
Application #:
13428474
Filing Dt:
03/23/2012
Publication #:
US20120177816
Pub Dt:
07/12/2012
Title:
METHOD OF FABRICATING PIEZOELECTRIC MATERIALS WITH OPPOSITE C-AXIS ORIENTATIONS
14
Patent #:
8648445
Issue Dt:
02/11/2014
Application #:
13428540
Filing Dt:
03/23/2012
Publication #:
US20120175702
Pub Dt:
07/12/2012
Title:
METAL-OXIDE-SEMICONDUCTOR DEVICE HAVING TRENCHED DIFFUSION REGION AND METHOD OF FORMING SAME
15
Patent #:
9158359
Issue Dt:
10/13/2015
Application #:
13428862
Filing Dt:
03/23/2012
Publication #:
US20130249290
Pub Dt:
09/26/2013
Title:
Adaptive Voltage Scaling Using a Serial Interface
16
Patent #:
9210674
Issue Dt:
12/08/2015
Application #:
13429606
Filing Dt:
03/26/2012
Publication #:
US20130250850
Pub Dt:
09/26/2013
Title:
BASE STATION TIMING CONTROL USING SYNCHRONOUS TRANSPORT SIGNALS
17
Patent #:
8711645
Issue Dt:
04/29/2014
Application #:
13431614
Filing Dt:
03/27/2012
Publication #:
US20130258786
Pub Dt:
10/03/2013
Title:
VICTIM PORT-BASED DESIGN FOR TEST AREA OVERHEAD REDUCTION IN MULTIPORT LATCH-BASED MEMORIES
18
Patent #:
8984222
Issue Dt:
03/17/2015
Application #:
13432131
Filing Dt:
03/28/2012
Publication #:
US20130067161
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR TASK MANAGEMENT IN STORAGE CONTROLLERS OF A CLUSTERED STORAGE SYSTEM
19
Patent #:
8839030
Issue Dt:
09/16/2014
Application #:
13432138
Filing Dt:
03/28/2012
Publication #:
US20130067274
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR RESUMING BACKGROUND TASKS IN A CLUSTERED STORAGE ENVIRONMENT
20
Patent #:
8793443
Issue Dt:
07/29/2014
Application #:
13432150
Filing Dt:
03/28/2012
Publication #:
US20130067172
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR IMPROVED BUFFER ALLOCATION IN A STORAGE CONTROLLER
21
Patent #:
9134913
Issue Dt:
09/15/2015
Application #:
13432213
Filing Dt:
03/28/2012
Publication #:
US20130067125
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR IMPROVED PROCESSING OF I/O REQUESTS IN FAST PATH CIRCUITS OF A STORAGE CONTROLLER IN A CLUSTERED STORAGE SYSTEM
22
Patent #:
8621603
Issue Dt:
12/31/2013
Application #:
13432220
Filing Dt:
03/28/2012
Publication #:
US20130067569
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR MANAGING VISIBILITY OF DEVICES IN A CLUSTERED STORAGE SYSTEM
23
Patent #:
8898385
Issue Dt:
11/25/2014
Application #:
13432223
Filing Dt:
03/28/2012
Publication #:
US20130067162
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR LOAD BALANCING OF BACKGROUND TASKS BETWEEN STORAGE CONTROLLERS IN A CLUSTERED STORAGE ENVIRONMENT
24
Patent #:
8806124
Issue Dt:
08/12/2014
Application #:
13432225
Filing Dt:
03/28/2012
Publication #:
US20130067163
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR TRANSFERRING OWNERSHIP OF A LOGICAL VOLUME BY TRANSFER OF NATIVE-FORMAT METADATA IN A CLUSTERED STORAGE ENVIRONMENT
25
Patent #:
8751741
Issue Dt:
06/10/2014
Application #:
13432232
Filing Dt:
03/28/2012
Publication #:
US20130067164
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR IMPLEMENTING LOGICAL DEVICE CONSISTENCY IN A CLUSTERED STORAGE SYSTEM
26
Patent #:
9052829
Issue Dt:
06/09/2015
Application #:
13432238
Filing Dt:
03/28/2012
Publication #:
US20130067123
Pub Dt:
03/14/2013
Title:
METHODS AND STRUCTURE FOR IMPROVED I/O SHIPPING IN A CLUSTERED STORAGE SYSTEM
27
Patent #:
NONE
Issue Dt:
Application #:
13432394
Filing Dt:
03/28/2012
Publication #:
US20130019053
Pub Dt:
01/17/2013
Title:
FLASH CONTROLLER HARDWARE ARCHITECTURE FOR FLASH DEVICES
28
Patent #:
8671376
Issue Dt:
03/11/2014
Application #:
13432398
Filing Dt:
03/28/2012
Publication #:
US20130263073
Pub Dt:
10/03/2013
Title:
COMPUTER SYSTEM AND METHOD FOR PERFORMING A ROUTING SUPPLY AND DEMAND ANALYSIS DURING THE FLOOR PLANNING STAGE OF AN INTEGRATED CIRCUIT DESIGN PROCESS
29
Patent #:
NONE
Issue Dt:
Application #:
13433637
Filing Dt:
03/29/2012
Publication #:
US20130258794
Pub Dt:
10/03/2013
Title:
MEMORY DEVICE HAVING CONTROL CIRCUITRY FOR SENSE AMPLIFIER REACTION TIME TRACKING
30
Patent #:
8825724
Issue Dt:
09/02/2014
Application #:
13433851
Filing Dt:
03/29/2012
Publication #:
US20130262533
Pub Dt:
10/03/2013
Title:
FILE SYSTEM HINTING
31
Patent #:
8680928
Issue Dt:
03/25/2014
Application #:
13433957
Filing Dt:
03/29/2012
Publication #:
US20130257545
Pub Dt:
10/03/2013
Title:
POWER AMPLIFIER INCLUDING VARIABLE CAPACITOR CIRCUIT
32
Patent #:
8868517
Issue Dt:
10/21/2014
Application #:
13434346
Filing Dt:
03/29/2012
Publication #:
US20130262398
Pub Dt:
10/03/2013
Title:
SCATTER GATHER LIST FOR DATA INTEGRITY
33
Patent #:
8775888
Issue Dt:
07/08/2014
Application #:
13434940
Filing Dt:
03/30/2012
Publication #:
US20130262945
Pub Dt:
10/03/2013
Title:
METHODS AND STRUCTURE FOR CORRELATING MULTIPLE TEST OUTPUTS OF AN INTEGRATED CIRCUIT ACQUIRED DURING SEPARATE INSTANCES OF AN EVENT
34
Patent #:
8745457
Issue Dt:
06/03/2014
Application #:
13434954
Filing Dt:
03/30/2012
Publication #:
US20130257512
Pub Dt:
10/03/2013
Title:
METHODS AND STRUCTURE FOR UTILIZING EXTERNAL INTERFACES USED DURING NORMAL OPERATION OF A CIRCUIT TO OUTPUT TEST SIGNALS
35
Patent #:
8738979
Issue Dt:
05/27/2014
Application #:
13434962
Filing Dt:
03/30/2012
Publication #:
US20130262946
Pub Dt:
10/03/2013
Title:
METHODS AND STRUCTURE FOR CORRELATION OF TEST SIGNALS ROUTED USING DIFFERENT SIGNALING PATHWAYS
36
Patent #:
8924779
Issue Dt:
12/30/2014
Application #:
13435613
Filing Dt:
03/30/2012
Publication #:
US20130262918
Pub Dt:
10/03/2013
Title:
Proxy Responder for Handling Anomalies in a Hardware System
37
Patent #:
9253276
Issue Dt:
02/02/2016
Application #:
13436073
Filing Dt:
03/30/2012
Publication #:
US20130259062
Pub Dt:
10/03/2013
Title:
MULTI-PROTOCOL BRIDGE WITH INTEGRATED PERFORMANCE ACCELERATING CACHE
38
Patent #:
8698567
Issue Dt:
04/15/2014
Application #:
13437662
Filing Dt:
04/02/2012
Publication #:
US20130257497
Pub Dt:
10/03/2013
Title:
PHASE-LOCKED LOOP CALIBRATION SYSTEM AND METHOD
39
Patent #:
8966466
Issue Dt:
02/24/2015
Application #:
13438876
Filing Dt:
04/04/2012
Publication #:
US20130268922
Pub Dt:
10/10/2013
Title:
SYSTEM FOR PERFORMING FIRMWARE UPDATES ON A NUMBER OF DRIVES IN AN ARRAY WITH MINIMUM INTERRUPTION TO DRIVE I/O OPERATIONS
40
Patent #:
8572543
Issue Dt:
10/29/2013
Application #:
13442099
Filing Dt:
04/09/2012
Publication #:
US20120198407
Pub Dt:
08/02/2012
Title:
AUTOMATION OF TIE CELL INSERTION, OPTIMIZATION AND REPLACEMENT BY SCAN FLIP-FLOPS TO INCREASE FAULT COVERAGE
41
Patent #:
8761236
Issue Dt:
06/24/2014
Application #:
13444928
Filing Dt:
04/12/2012
Publication #:
US20120195354
Pub Dt:
08/02/2012
Title:
Serial Protocol for Agile Sample Rate Switching
42
Patent #:
8588004
Issue Dt:
11/19/2013
Application #:
13445270
Filing Dt:
04/12/2012
Publication #:
US20130272076
Pub Dt:
10/17/2013
Title:
MEMORY DEVICE HAVING MULTI-PORT MEMORY CELL WITH EXPANDABLE PORT CONFIGURATION
43
Patent #:
NONE
Issue Dt:
Application #:
13445848
Filing Dt:
04/12/2012
Publication #:
US20130275717
Pub Dt:
10/17/2013
Title:
DATA PROCESSING SYSTEM WITH MULTIPLE DATA DECODERS
44
Patent #:
8826105
Issue Dt:
09/02/2014
Application #:
13445858
Filing Dt:
04/12/2012
Publication #:
US20130275986
Pub Dt:
10/17/2013
Title:
Data Processing System with Out of Order Transfer
45
Patent #:
8873182
Issue Dt:
10/28/2014
Application #:
13445878
Filing Dt:
04/12/2012
Publication #:
US20130235484
Pub Dt:
09/12/2013
Title:
MULTI-PATH DATA PROCESSING SYSTEM
46
Patent #:
9128717
Issue Dt:
09/08/2015
Application #:
13446111
Filing Dt:
04/13/2012
Publication #:
US20130232360
Pub Dt:
09/05/2013
Title:
Data Processing System with Thermal Control
47
Patent #:
NONE
Issue Dt:
Application #:
13447490
Filing Dt:
04/16/2012
Publication #:
US20130275083
Pub Dt:
10/17/2013
Title:
APPARATUS AND METHOD FOR MEASURING THICKNESS OF PRINTED CIRCUIT BOARD
48
Patent #:
8705196
Issue Dt:
04/22/2014
Application #:
13447741
Filing Dt:
04/16/2012
Publication #:
US20130271867
Pub Dt:
10/17/2013
Title:
STORAGE DEVICE HAVING DEGAUSS CIRCUITRY WITH SEPARATE CONTROL OF DEGAUSS SIGNAL STEADY STATE AND OVERSHOOT PORTIONS
49
Patent #:
8832393
Issue Dt:
09/09/2014
Application #:
13449684
Filing Dt:
04/18/2012
Publication #:
US20130282995
Pub Dt:
10/24/2013
Title:
ALIGNMENT FOR MULTIPLE FIFO POINTERS
50
Patent #:
9335942
Issue Dt:
05/10/2016
Application #:
13450118
Filing Dt:
04/18/2012
Publication #:
US20130282978
Pub Dt:
10/24/2013
Title:
METHODS AND STRUCTURE FOR LUN MASKING IN A SWITCHING DEVICE
51
Patent #:
8487795
Issue Dt:
07/16/2013
Application #:
13450204
Filing Dt:
04/18/2012
Title:
TIME-INTERLEAVED TRACK-AND-HOLD CIRCUIT USING DISTRIBUTED GLOBAL SINE-WAVE CLOCK
52
Patent #:
9472695
Issue Dt:
10/18/2016
Application #:
13450279
Filing Dt:
04/18/2012
Publication #:
US20130279842
Pub Dt:
10/24/2013
Title:
OPTO-COUPLER AND METHOD OF MANUFACTURING THE SAME
53
Patent #:
8782487
Issue Dt:
07/15/2014
Application #:
13450289
Filing Dt:
04/18/2012
Publication #:
US20130283114
Pub Dt:
10/24/2013
Title:
SYSTEMS AND METHODS FOR LOCATING AND CORRECTING DECODER MIS-CORRECTIONS
54
Patent #:
8416666
Issue Dt:
04/09/2013
Application #:
13452645
Filing Dt:
04/20/2012
Title:
SYSTEMS AND METHODS FOR LOCAL ITERATION DETERMINATION DURING DELAY PROCESSING
55
Patent #:
9129653
Issue Dt:
09/08/2015
Application #:
13452722
Filing Dt:
04/20/2012
Publication #:
US20130283107
Pub Dt:
10/24/2013
Title:
SYSTEMS AND METHODS FOR CALIBRATION COASTING IN A DATA PROCESSING SYSTEM
56
Patent #:
8782488
Issue Dt:
07/15/2014
Application #:
13452733
Filing Dt:
04/20/2012
Publication #:
US20130283113
Pub Dt:
10/24/2013
Title:
Systems and Methods for Back Step Data Decoding
57
Patent #:
8645888
Issue Dt:
02/04/2014
Application #:
13453289
Filing Dt:
04/23/2012
Publication #:
US20120210287
Pub Dt:
08/16/2012
Title:
CIRCUIT TIMING ANALYSIS INCORPORATING THE EFFECTS OF TEMPERATURE INVERSION
58
Patent #:
8918576
Issue Dt:
12/23/2014
Application #:
13454310
Filing Dt:
04/24/2012
Publication #:
US20130282950
Pub Dt:
10/24/2013
Title:
SELECTIVELY PLACING DATA IN THERMALLY CONSTRAINED MEMORY SYSTEMS TO DYNAMICALLY ADAPT TO CHANGING ENVIRONMENTAL CONDITIONS
59
Patent #:
8667196
Issue Dt:
03/04/2014
Application #:
13455744
Filing Dt:
04/25/2012
Publication #:
US20130290582
Pub Dt:
10/31/2013
Title:
Interconnect Congestion Reduction for Memory-Mapped Peripherals
60
Patent #:
8595408
Issue Dt:
11/26/2013
Application #:
13455749
Filing Dt:
04/25/2012
Publication #:
US20130290570
Pub Dt:
10/31/2013
Title:
METHODS AND STRUCTURE FOR IDENTIFYING SUPPORT FOR SUPER-STANDARD FEATURES IN COMMUNICATIONS BETWEEN SERIAL ATTACHED SCSI DEVICES
61
Patent #:
8583840
Issue Dt:
11/12/2013
Application #:
13455826
Filing Dt:
04/25/2012
Publication #:
US20130290571
Pub Dt:
10/31/2013
Title:
METHODS AND STRUCTURE FOR DETERMINING MAPPING INFORMATION INCONSISTENCIES IN I/O REQUESTS GENERATED FOR FAST PATH CIRCUITS OF A STORAGE CONTROLLER
62
Patent #:
NONE
Issue Dt:
Application #:
13456338
Filing Dt:
04/26/2012
Publication #:
US20130290601
Pub Dt:
10/31/2013
Title:
LINUX I/O SCHEDULER FOR SOLID-STATE DRIVES
63
Patent #:
NONE
Issue Dt:
Application #:
13456419
Filing Dt:
04/26/2012
Publication #:
US20130286705
Pub Dt:
10/31/2013
Title:
LOW POWER CONTENT ADDRESSABLE MEMORY HITLINE PRECHARGE AND SENSING CIRCUIT
64
Patent #:
8543890
Issue Dt:
09/24/2013
Application #:
13457275
Filing Dt:
04/26/2012
Publication #:
US20120215948
Pub Dt:
08/23/2012
Title:
SUPPORTING GLOBAL INPUT/OUTPUT INTERCONNECT FEATURES ON PORTS OF A MIDPOINT DEVICE
65
Patent #:
8762815
Issue Dt:
06/24/2014
Application #:
13459282
Filing Dt:
04/30/2012
Publication #:
US20130290806
Pub Dt:
10/31/2013
Title:
Systems and Methods for Data Decoder State Preservation During Extended Delay Processing
66
Patent #:
8819521
Issue Dt:
08/26/2014
Application #:
13459289
Filing Dt:
04/30/2012
Publication #:
US20130290798
Pub Dt:
10/31/2013
Title:
Systems and Methods for Short Media Defect Detection Using Non-Binary Coded Information
67
Patent #:
9009405
Issue Dt:
04/14/2015
Application #:
13459311
Filing Dt:
04/30/2012
Publication #:
US20130290626
Pub Dt:
10/31/2013
Title:
METHODS AND SYSTEMS FOR INSTANTANEOUS ONLINE CAPACITY EXPANSION
68
Patent #:
8751884
Issue Dt:
06/10/2014
Application #:
13459424
Filing Dt:
04/30/2012
Publication #:
US20130290799
Pub Dt:
10/31/2013
Title:
SCAN TEST CIRCUITRY WITH SELECTABLE TRANSITION LAUNCH MODE
69
Patent #:
8901606
Issue Dt:
12/02/2014
Application #:
13459864
Filing Dt:
04/30/2012
Publication #:
US20130285119
Pub Dt:
10/31/2013
Title:
PSEUDOMORPHIC HIGH ELECTRON MOBILITY TRANSISTOR (PHEMT) COMPRISING LOW TEMPERATURE BUFFER LAYER
70
Patent #:
8737549
Issue Dt:
05/27/2014
Application #:
13459871
Filing Dt:
04/30/2012
Publication #:
US20130287088
Pub Dt:
10/31/2013
Title:
Receiver Having Limiter-Enhanced Data Eye Openings
71
Patent #:
8830612
Issue Dt:
09/09/2014
Application #:
13460204
Filing Dt:
04/30/2012
Publication #:
US20130083418
Pub Dt:
04/04/2013
Title:
HARDWARE-BASED INTER-TRACK INTERFERENCE MITIGATION IN MAGNETIC RECORDING SYSTEMS WITH READ CHANNEL STORAGE OF CANCELATION DATA
72
Patent #:
8981864
Issue Dt:
03/17/2015
Application #:
13460243
Filing Dt:
04/30/2012
Publication #:
US20130285769
Pub Dt:
10/31/2013
Title:
MULTI-LAYER INTEGRATED TRANSMISSION LINE CIRCUITS HAVING A METAL ROUTING LAYER THAT REDUCES DIELECTRIC LOSSES
73
Patent #:
9070684
Issue Dt:
06/30/2015
Application #:
13460291
Filing Dt:
04/30/2012
Publication #:
US20130285219
Pub Dt:
10/31/2013
Title:
INTEGRATED CIRCUIT POWER GRID WITH IMPROVED ROUTING RESOURCES AND BYPASS CAPACITANCE
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8473890
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06/25/2013
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13460605
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04/30/2012
Publication #:
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Pub Dt:
11/01/2012
Title:
TIMING ERROR SAMPLING GENERATOR AND A METHOD OF TIMING TESTING
75
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9048958
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06/02/2015
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13460833
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04/30/2012
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Pub Dt:
10/31/2013
Title:
HIGH-SPEED OPTICAL FIBER LINK AND A METHOD FOR COMMUNICATING OPTICAL DATA SIGNALS
76
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8332681
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12/11/2012
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13461358
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05/01/2012
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Pub Dt:
08/23/2012
Title:
AUTOMATIC REFERENCE FREQUENCY COMPENSATION
77
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8774197
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07/08/2014
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13462927
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Pub Dt:
08/30/2012
Title:
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8775897
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07/08/2014
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13465214
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Pub Dt:
11/07/2013
Title:
DATA PROCESSING SYSTEM WITH FAILURE RECOVERY
79
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08/11/2015
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13466162
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Pub Dt:
11/14/2013
Title:
METHODS AND SYSTEMS FOR PERFORMING VISION-AIDED PASSIVE ALIGNMENT DURING THE ASSEMBLY OF AN OPTICAL COMMUNICATIONS MODULE
80
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8756355
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06/17/2014
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13466347
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05/08/2012
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Pub Dt:
11/14/2013
Title:
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8607180
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12/10/2013
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11/14/2013
Title:
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82
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NONE
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13468124
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05/10/2012
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Pub Dt:
11/14/2013
Title:
METHODS AND STRUCTURE FOR IMPROVED AND DYNAMIC ZONING IN SERIAL ATTACHED SCSI EXPANDERS
83
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11/14/2013
Title:
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84
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05/11/2012
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11/14/2013
Title:
METHOD FOR BROADCAST PROCESSING WITH REDUCED REDUNDANCY
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01/01/2013
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13469179
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08/30/2012
Title:
SYSTEMS AND METHODS FOR DIAGNOSTIC MONITORING OF OPTICAL MODULATION AMPLITUDE AT AN OPTICAL RECEIVER USING AUTOMATIC GAIN CONTROL
86
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12/25/2012
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METHOD FOR DETECTING SHORT BURST ERRORS IN LDPC SYSTEM
87
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05/14/2012
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11/14/2013
Title:
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88
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09/03/2013
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13471659
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05/15/2012
Title:
BOOTSTRAP SWITCH CIRCUIT WITH OVER-VOLTAGE PREVENTION
89
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11/21/2013
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LIGHT EMITTING DEVICE WITH DARK LAYER
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8565048
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10/22/2013
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13472448
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05/15/2012
Title:
UNIPOLAR CURRENT DRIVER
91
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8854121
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11/21/2013
Title:
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13472780
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09/06/2012
Title:
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8483780
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07/09/2013
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13472940
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09/20/2012
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SYSTEM AND METHOD FOR CONSERVING BATTERY POWER IN A MOBILE STATION
94
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8830771
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13474029
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11/21/2013
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MEMORY DEVICE HAVING CONTROL CIRCUITRY CONFIGURED FOR CLOCK-BASED WRITE SELF-TIME TRACKING
95
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8611385
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13474068
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Title:
OPTICAL SOURCE DRIVER CIRCUIT WITH CONTROLLABLE TERMINATION
96
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8612826
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13474660
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11/21/2013
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SYSTEMS AND METHODS FOR NON-BINARY LDPC ENCODING
97
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8775898
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13474664
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05/17/2012
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11/21/2013
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SYSTEMS AND METHODS FOR HARDWARE FLEXIBLE LOW DENSITY PARITY CHECK CONVERSION
98
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8736998
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13474668
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11/21/2013
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8525707
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13474672
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05/17/2012
Title:
SYSTEMS AND METHODS FOR DUAL BINARY AND NON-BINARY DECODING PROCESSING
100
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NONE
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13474770
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05/18/2012
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US20130311696
Pub Dt:
11/21/2013
Title:
STORAGE PROCESSOR FOR EFFICIENT SCALING OF SOLID STATE STORAGE
Assignor
1
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Exec Dt:
02/01/2016
Assignee
1
BANK OF AMERICA, N.A., AS COLLATERAL AGENT
101 N TRYON ST.
CHARLOTTE, NORTH CAROLINA 28255
Correspondence name and address
LATHAM & WATKINS LLP
650 TOWN CENTER DRIVE, SUITE 2000
COSTA MESA, CA 92626

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