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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 103 of 181
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1
Patent #:
8239636
Issue Dt:
08/07/2012
Application #:
11460371
Filing Dt:
07/27/2006
Publication #:
US20060259716
Pub Dt:
11/16/2006
Title:
BIT INVERSION IN MEMORY DEVICES
2
Patent #:
7687329
Issue Dt:
03/30/2010
Application #:
11460391
Filing Dt:
07/27/2006
Publication #:
US20060258063
Pub Dt:
11/16/2006
Title:
GETTERING OF SILICON ON INSULATOR USING RELAXED SILICON GERMANIUM EPITAXIAL PROXIMITY LAYERS
3
Patent #:
7646102
Issue Dt:
01/12/2010
Application #:
11460435
Filing Dt:
07/27/2006
Publication #:
US20060261493
Pub Dt:
11/23/2006
Title:
WAFER LEVEL PRE-PACKAGED FLIP CHIP SYSTEMS
4
Patent #:
7808112
Issue Dt:
10/05/2010
Application #:
11460445
Filing Dt:
07/27/2006
Publication #:
US20060255475
Pub Dt:
11/16/2006
Title:
WAFER LEVEL PRE-PACKAGED FLIP CHIP SYSTEM
5
Patent #:
7646644
Issue Dt:
01/12/2010
Application #:
11460531
Filing Dt:
07/27/2006
Publication #:
US20070036014
Pub Dt:
02/15/2007
Title:
NONVOLATILE MEMORY DEVICE WITH MULTIPLE REFERENCES AND CORRESPONDING CONTROL METHOD
6
Patent #:
7937576
Issue Dt:
05/03/2011
Application #:
11460777
Filing Dt:
07/28/2006
Publication #:
US20070038852
Pub Dt:
02/15/2007
Title:
CONFIGURATION OF A MULTILEVEL FLASH MEMORY DEVICE
7
Patent #:
7566620
Issue Dt:
07/28/2009
Application #:
11461246
Filing Dt:
07/31/2006
Publication #:
US20070018223
Pub Dt:
01/25/2007
Title:
DRAM INCLUDING A VERTICAL SURROUND GATE TRANSISTOR
8
Patent #:
7564088
Issue Dt:
07/21/2009
Application #:
11461666
Filing Dt:
08/01/2006
Title:
HIGH-DENSITY SINGLE TRANSISTOR VERTICAL MEMORY GAIN CELL
9
Patent #:
7346725
Issue Dt:
03/18/2008
Application #:
11462264
Filing Dt:
08/03/2006
Publication #:
US20060265541
Pub Dt:
11/23/2006
Title:
METHOD AND APPARATUS FOR GENERATING TRAFFIC IN AN ELECTRONIC BRIDGE VIA A LOCAL CONTROLLER
10
Patent #:
7510954
Issue Dt:
03/31/2009
Application #:
11462617
Filing Dt:
08/04/2006
Title:
MEMORY ARRAY WITH SURROUNDING GATE ACCESS TRANSISTORS AND CAPACITORS WITH GLOBAL AND STAGGERED LOCAL BIT LINES
11
Patent #:
7706160
Issue Dt:
04/27/2010
Application #:
11463260
Filing Dt:
08/08/2006
Publication #:
US20080037301
Pub Dt:
02/14/2008
Title:
HIGH VOLTAGE GENERATOR OF THE DAC-CONTROLLED TYPE
12
Patent #:
7372723
Issue Dt:
05/13/2008
Application #:
11464049
Filing Dt:
08/11/2006
Title:
STATE SAVE-ON-POWER-DOWN USING GMR NON-VOLATILE ELEMENTS
13
Patent #:
7498759
Issue Dt:
03/03/2009
Application #:
11465262
Filing Dt:
08/17/2006
Publication #:
US20080042608
Pub Dt:
02/21/2008
Title:
SEMICONDUCTOR WAFER PROCESSING ACCELEROMETER
14
Patent #:
7692210
Issue Dt:
04/06/2010
Application #:
11466309
Filing Dt:
08/22/2006
Publication #:
US20060278894
Pub Dt:
12/14/2006
Title:
INTERMESHED GUARD BANDS FOR MULTIPLE VOLTAGE SUPPLY STRUCTURES ON AN INTEGRATED CIRCUIT, AND METHODS OF MAKING SAME
15
Patent #:
7567475
Issue Dt:
07/28/2009
Application #:
11469754
Filing Dt:
09/01/2006
Publication #:
US20070103973
Pub Dt:
05/10/2007
Title:
MEMORY ARCHITECTURE
16
Patent #:
7514366
Issue Dt:
04/07/2009
Application #:
11470150
Filing Dt:
09/05/2006
Publication #:
US20070004131
Pub Dt:
01/04/2007
Title:
METHODS FOR FORMING SHALLOW TRENCH ISOLATION
17
Patent #:
7372096
Issue Dt:
05/13/2008
Application #:
11471007
Filing Dt:
06/20/2006
Publication #:
US20060234450
Pub Dt:
10/19/2006
Title:
PROGRAMMABLE ARRAY LOGIC OR MEMORY WITH P-CHANNEL DEVICES AND ASYMMETRICAL TUNNEL BARRIERS
18
Patent #:
7391072
Issue Dt:
06/24/2008
Application #:
11471008
Filing Dt:
06/20/2006
Publication #:
US20060231886
Pub Dt:
10/19/2006
Title:
PROGRAMMABLE ARRAY LOGIC OR MEMORY WITH P-CHANNEL DEVICES AND ASYMMETRICAL TUNNEL BARRIERS
19
Patent #:
7270917
Issue Dt:
09/18/2007
Application #:
11471012
Filing Dt:
06/20/2006
Publication #:
US20060240340
Pub Dt:
10/26/2006
Title:
PREVENTION OF PHOTORESIST SCUMMING
20
Patent #:
7372097
Issue Dt:
05/13/2008
Application #:
11471348
Filing Dt:
06/20/2006
Publication #:
US20060237768
Pub Dt:
10/26/2006
Title:
PROGRAMMABLE ARRAY LOGIC OR MEMORY WITH P-CHANNEL DEVICES AND ASYMMETRICAL TUNNEL BARRIERS
21
Patent #:
7268603
Issue Dt:
09/11/2007
Application #:
11471354
Filing Dt:
06/20/2006
Publication #:
US20060232312
Pub Dt:
10/19/2006
Title:
METHOD AND APPARATUS FOR REDUCING DUTY CYCLE DISTORTION OF AN OUTPUT SIGNAL
22
Patent #:
7977190
Issue Dt:
07/12/2011
Application #:
11471772
Filing Dt:
06/21/2006
Publication #:
US20070296015
Pub Dt:
12/27/2007
Title:
MEMORY DEVICES HAVING REDUCED INTERFERENCE BETWEEN FLOATING GATES AND METHODS OF FABRICATING SUCH DEVICES
23
Patent #:
7611971
Issue Dt:
11/03/2009
Application #:
11472009
Filing Dt:
06/21/2006
Publication #:
US20060240646
Pub Dt:
10/26/2006
Title:
METHOD OF REMOVING RESIDUAL CONTAMINANTS FROM AN ENVIRONMENT
24
Patent #:
7745942
Issue Dt:
06/29/2010
Application #:
11472010
Filing Dt:
06/21/2006
Publication #:
US20070296090
Pub Dt:
12/27/2007
Title:
DIE PACKAGE AND PROBE CARD STRUCTURES AND FABRICATION METHODS
25
Patent #:
7366051
Issue Dt:
04/29/2008
Application #:
11472107
Filing Dt:
06/20/2006
Publication #:
US20060239110
Pub Dt:
10/26/2006
Title:
WORD LINE DRIVER CIRCUITRY AND METHODS FOR USING THE SAME
26
Patent #:
7435536
Issue Dt:
10/14/2008
Application #:
11472130
Filing Dt:
06/20/2006
Publication #:
US20060240362
Pub Dt:
10/26/2006
Title:
METHOD TO ALIGN MASK PATTERNS
27
Patent #:
7646016
Issue Dt:
01/12/2010
Application #:
11472435
Filing Dt:
06/22/2006
Publication #:
US20060237755
Pub Dt:
10/26/2006
Title:
METHOD FOR AUTOMATED TESTING OF THE MODULATION TRANSFER FUNCTION IN IMAGE SENSORS
28
Patent #:
7497958
Issue Dt:
03/03/2009
Application #:
11472598
Filing Dt:
06/21/2006
Publication #:
US20070048630
Pub Dt:
03/01/2007
Title:
METHODS OF FORMING CAPACITORS
29
Patent #:
7544989
Issue Dt:
06/09/2009
Application #:
11472617
Filing Dt:
06/22/2006
Publication #:
US20060245255
Pub Dt:
11/02/2006
Title:
HIGH DENSITY STEPPED, NON-PLANAR FLASH MEMORY
30
Patent #:
7802157
Issue Dt:
09/21/2010
Application #:
11472618
Filing Dt:
06/22/2006
Publication #:
US20080052573
Pub Dt:
02/28/2008
Title:
TEST MODE FOR MULTI-CHIP INTEGRATED CIRCUIT PACKAGES
31
Patent #:
7263022
Issue Dt:
08/28/2007
Application #:
11472670
Filing Dt:
06/22/2006
Publication #:
US20060239099
Pub Dt:
10/26/2006
Title:
NO-PRECHARGE FAMOS CELL AND LATCH CIRCUIT IN A MEMORY DEVICE
32
Patent #:
8686489
Issue Dt:
04/01/2014
Application #:
11472785
Filing Dt:
06/22/2006
Publication #:
US20060246664
Pub Dt:
11/02/2006
Title:
MEMORY WITH METAL-INSULATOR-METAL TUNNELING PROGRAM AND ERASE
33
Patent #:
7550341
Issue Dt:
06/23/2009
Application #:
11472899
Filing Dt:
06/22/2006
Publication #:
US20060237776
Pub Dt:
10/26/2006
Title:
HIGH DENSITY STEPPED, NON-PLANAR FLASH MEMORY
34
Patent #:
7326917
Issue Dt:
02/05/2008
Application #:
11472934
Filing Dt:
06/22/2006
Publication #:
US20070295894
Pub Dt:
12/27/2007
Title:
WEAR MONITOR FOR TURBO-MACHINE
35
Patent #:
7557048
Issue Dt:
07/07/2009
Application #:
11472950
Filing Dt:
06/21/2006
Publication #:
US20060240637
Pub Dt:
10/26/2006
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
36
Patent #:
7190608
Issue Dt:
03/13/2007
Application #:
11473308
Filing Dt:
06/23/2006
Publication #:
US20060285381
Pub Dt:
12/21/2006
Title:
SENSING OF RESISTANCE VARIABLE MEMORY DEVICES
37
Patent #:
7526709
Issue Dt:
04/28/2009
Application #:
11473309
Filing Dt:
06/23/2006
Publication #:
US20070168777
Pub Dt:
07/19/2007
Title:
ERROR DETECTION AND CORRECTION IN A CAM
38
Patent #:
8300930
Issue Dt:
10/30/2012
Application #:
11473310
Filing Dt:
06/23/2006
Publication #:
US20070008417
Pub Dt:
01/11/2007
Title:
METHOD FOR STATISTICAL ANALYSIS OF IMAGES FOR AUTOMATIC WHITE BALANCE OF COLOR CHANNEL GAINS FOR IMAGE SENSORS
39
Patent #:
7240148
Issue Dt:
07/03/2007
Application #:
11473311
Filing Dt:
06/23/2006
Publication #:
US20060294296
Pub Dt:
12/28/2006
Title:
PARITY-SCANNING AND REFRESH IN DYNAMIC MEMORY DEVICES
40
Patent #:
7372751
Issue Dt:
05/13/2008
Application #:
11473465
Filing Dt:
06/23/2006
Publication #:
US20060239074
Pub Dt:
10/26/2006
Title:
USING REDUNDANT MEMORY FOR EXTRA FEATURES
41
Patent #:
7269083
Issue Dt:
09/11/2007
Application #:
11473466
Filing Dt:
06/23/2006
Publication #:
US20060239091
Pub Dt:
10/26/2006
Title:
USING REDUNDANT MEMORY FOR EXTRA FEATURES
42
Patent #:
7432600
Issue Dt:
10/07/2008
Application #:
11473731
Filing Dt:
06/23/2006
Publication #:
US20060237833
Pub Dt:
10/26/2006
Title:
SYSTEM HAVING SEMICONDUCTOR COMPONENT WITH MULTIPLE STACKED DICE
43
Patent #:
7208368
Issue Dt:
04/24/2007
Application #:
11473857
Filing Dt:
06/23/2006
Publication #:
US20060246677
Pub Dt:
11/02/2006
Title:
METHODS OF FORMING SPACED CONDUCTIVE REGIONS, AND METHODS OF FORMING CAPACITOR CONSTRUCTIONS
44
Patent #:
7546416
Issue Dt:
06/09/2009
Application #:
11474436
Filing Dt:
06/26/2006
Publication #:
US20070300012
Pub Dt:
12/27/2007
Title:
METHOD FOR SUBSTANTIALLY UNINTERRUPTED CACHE READOUT
45
Patent #:
7485513
Issue Dt:
02/03/2009
Application #:
11475312
Filing Dt:
06/27/2006
Publication #:
US20060240653
Pub Dt:
10/26/2006
Title:
ONE-DEVICE NON-VOLATILE RANDOM ACCESS MEMORY CELL
46
Patent #:
7569915
Issue Dt:
08/04/2009
Application #:
11475376
Filing Dt:
06/26/2006
Publication #:
US20060237823
Pub Dt:
10/26/2006
Title:
SHIELDING ARRANGEMENT TO PROTECT A CIRCUIT FROM STRAY MAGNETIC FIELDS
47
Patent #:
7453152
Issue Dt:
11/18/2008
Application #:
11475585
Filing Dt:
06/27/2006
Publication #:
US20060240221
Pub Dt:
10/26/2006
Title:
Device having reduced chemical mechanical planarization
48
Patent #:
7485504
Issue Dt:
02/03/2009
Application #:
11475595
Filing Dt:
06/27/2006
Publication #:
US20060246680
Pub Dt:
11/02/2006
Title:
STABLE PD-SOI DEVICES AND METHODS
49
Patent #:
7994595
Issue Dt:
08/09/2011
Application #:
11475798
Filing Dt:
06/27/2006
Publication #:
US20060244105
Pub Dt:
11/02/2006
Title:
STRAINED SEMICONDUCTOR BY FULL WAFER BONDING
50
Patent #:
7248498
Issue Dt:
07/24/2007
Application #:
11476016
Filing Dt:
06/28/2006
Publication #:
US20060245227
Pub Dt:
11/02/2006
Title:
SERIAL TRANSISTOR-CELL ARRAY ARCHITECTURE
51
Patent #:
7459336
Issue Dt:
12/02/2008
Application #:
11476017
Filing Dt:
06/28/2006
Publication #:
US20060246696
Pub Dt:
11/02/2006
Title:
METHOD OF FORMING A CHALCOGENIDE MATERIAL CONTAINING DEVICE
52
Patent #:
7696011
Issue Dt:
04/13/2010
Application #:
11476467
Filing Dt:
06/28/2006
Publication #:
US20060246626
Pub Dt:
11/02/2006
Title:
METHODS FOR APPLYING FRONT SIDE AND EDGE PROTECTION MATERIAL TO ELECTRONIC DEVICES AT THE WAFER LEVEL, DEVICES MADE BY THE METHODS, AND SYSTEMS INCLUDING THE DEVICES
53
Patent #:
7547850
Issue Dt:
06/16/2009
Application #:
11476471
Filing Dt:
06/28/2006
Publication #:
US20060243483
Pub Dt:
11/02/2006
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES WITH COMPLIANT SPRING CONTACT STRUCTURES
54
Patent #:
7512170
Issue Dt:
03/31/2009
Application #:
11476918
Filing Dt:
06/29/2006
Publication #:
US20070036196
Pub Dt:
02/15/2007
Title:
METHOD OF FORMING MIRRORS BY SURFACE TRANSFORMATION OF EMPTY SPACES IN SOLID STATE MATERIALS
55
Patent #:
7433250
Issue Dt:
10/07/2008
Application #:
11477164
Filing Dt:
06/28/2006
Publication #:
US20060245282
Pub Dt:
11/02/2006
Title:
SENSE AMPLIFIER CIRCUIT
56
Patent #:
7288954
Issue Dt:
10/30/2007
Application #:
11477217
Filing Dt:
06/29/2006
Publication #:
US20060244475
Pub Dt:
11/02/2006
Title:
COMPLIANT CONTACT PIN TEST ASSEMBLY AND METHODS THEREOF
57
Patent #:
7728350
Issue Dt:
06/01/2010
Application #:
11477249
Filing Dt:
06/28/2006
Publication #:
US20060244007
Pub Dt:
11/02/2006
Title:
MEMORY CELL WITH NEGATIVE DIFFERENTIAL RESISTANCE
58
Patent #:
7368399
Issue Dt:
05/06/2008
Application #:
11477287
Filing Dt:
06/28/2006
Publication #:
US20060246734
Pub Dt:
11/02/2006
Title:
METHODS OF FORMING PATTERNED PHOTORESIST LAYERS OVER SEMICONDUCTOR SUBSTRATES
59
Patent #:
7660144
Issue Dt:
02/09/2010
Application #:
11477315
Filing Dt:
06/28/2006
Publication #:
US20060245244
Pub Dt:
11/02/2006
Title:
HIGH-PERFORMANCE ONE-TRANSISTOR MEMORY CELL
60
Patent #:
7968402
Issue Dt:
06/28/2011
Application #:
11477685
Filing Dt:
06/28/2006
Publication #:
US20060246653
Pub Dt:
11/02/2006
Title:
METHOD FOR FORMING A HIGH-PERFORMANCE ONE-TRANSISTOR MEMORY CELL
61
Patent #:
7517786
Issue Dt:
04/14/2009
Application #:
11477956
Filing Dt:
06/28/2006
Publication #:
US20060246705
Pub Dt:
11/02/2006
Title:
METHODS OF FORMING WIRE BONDS FOR SEMICONDUCTOR CONSTRUCTIONS
62
Patent #:
7528435
Issue Dt:
05/05/2009
Application #:
11477958
Filing Dt:
06/28/2006
Publication #:
US20060244092
Pub Dt:
11/02/2006
Title:
SEMICONDUCTOR CONSTRUCTIONS
63
Patent #:
7477542
Issue Dt:
01/13/2009
Application #:
11478256
Filing Dt:
06/29/2006
Publication #:
US20060245256
Pub Dt:
11/02/2006
Title:
SPLIT GATE FLASH MEMORY CELL WITH BALLISTIC INJECTION
64
Patent #:
8152918
Issue Dt:
04/10/2012
Application #:
11478401
Filing Dt:
06/29/2006
Publication #:
US20060243196
Pub Dt:
11/02/2006
Title:
METHODS FOR EPITAXIAL SILICON GROWTH
65
Patent #:
7923308
Issue Dt:
04/12/2011
Application #:
11478715
Filing Dt:
06/30/2006
Publication #:
US20060246697
Pub Dt:
11/02/2006
Title:
METHODS OF FORMING CONDUCTIVE CONTACTS TO SOURCE/DRAIN REGIONS AND METHODS OF FORMING LOCAL INTERCONNECTS
66
Patent #:
7596729
Issue Dt:
09/29/2009
Application #:
11479848
Filing Dt:
06/30/2006
Publication #:
US20080005630
Pub Dt:
01/03/2008
Title:
MEMORY DEVICE TESTING SYSTEM AND METHOD USING COMPRESSED FAIL DATA
67
Patent #:
7248499
Issue Dt:
07/24/2007
Application #:
11480127
Filing Dt:
06/30/2006
Publication #:
US20060250845
Pub Dt:
11/09/2006
Title:
LAYOUT FOR NAND FLASH MEMORY ARRAY HAVING REDUCED WORD LINE IMPEDANCE
68
Patent #:
7615871
Issue Dt:
11/10/2009
Application #:
11480755
Filing Dt:
06/30/2006
Publication #:
US20070018337
Pub Dt:
01/25/2007
Title:
METHOD AND APPARATUS FOR ATTACHING MICROELECTRONIC SUBSTRATES AND SUPPORT MEMBERS
69
Patent #:
7985698
Issue Dt:
07/26/2011
Application #:
11481493
Filing Dt:
07/05/2006
Publication #:
US20060252277
Pub Dt:
11/09/2006
Title:
METHODS OF FORMING PATTERNED PHOTORESIST LAYERS OVER SEMICONDUCTOR SUBSTRATES
70
Patent #:
7263017
Issue Dt:
08/28/2007
Application #:
11481957
Filing Dt:
07/07/2006
Publication #:
US20060250872
Pub Dt:
11/09/2006
Title:
AC SENSING FOR A RESISTIVE MEMORY
71
Patent #:
7804115
Issue Dt:
09/28/2010
Application #:
11482244
Filing Dt:
07/07/2006
Publication #:
US20060269699
Pub Dt:
11/30/2006
Title:
SEMICONDUCTOR CONSTRUCTIONS HAVING ANTIREFLECTIVE PORTIONS
72
Patent #:
7304380
Issue Dt:
12/04/2007
Application #:
11482308
Filing Dt:
07/07/2006
Publication #:
US20060249837
Pub Dt:
11/09/2006
Title:
INTEGRATED CIRCUIT COOLING AND INSULATING DEVICE AND METHOD
73
Patent #:
7586331
Issue Dt:
09/08/2009
Application #:
11482524
Filing Dt:
07/07/2006
Publication #:
US20070040562
Pub Dt:
02/22/2007
Title:
SELF-ADAPTIVE OUTPUT BUFFER BASED ON CHARGE SHARING
74
Patent #:
7626269
Issue Dt:
12/01/2009
Application #:
11483002
Filing Dt:
07/06/2006
Publication #:
US20080006931
Pub Dt:
01/10/2008
Title:
SEMICONDUCTOR CONSTRUCTIONS AND ASSEMBLIES, AND ELECTRONIC SYSTEMS
75
Patent #:
7622321
Issue Dt:
11/24/2009
Application #:
11483202
Filing Dt:
07/10/2006
Publication #:
US20070018211
Pub Dt:
01/25/2007
Title:
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Title:
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Assignor
1
MICRON TECHNOLOGY, INC.
Exec Dt:
04/26/2016
Assignee
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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