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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
12/02/2008
Application #:
11765062
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
PROGRAMMING A MEMORY WITH VARYING BITS PER CELL
2
Patent #:
Issue Dt:
08/10/2010
Application #:
11765145
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/27/2007
Title:
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A DOPED SILICON FILM
3
Patent #:
Issue Dt:
12/20/2011
Application #:
11765232
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
CROSSLINKABLE GRAFT POLYMER NON-PREFERENTIALLY WETTED BY POLYSTYRENE AND POLYETHYLENE OXIDE
4
Patent #:
Issue Dt:
12/14/2010
Application #:
11765287
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
USB DEVICE COMMUNICATION APPARATUS, SYSTEMS, AND METHODS
5
Patent #:
Issue Dt:
11/08/2011
Application #:
11765354
Filing Dt:
06/19/2007
Publication #:
Pub Dt:
12/25/2008
Title:
METHODS AND SYSTEMS FOR IMAGING AND CUTTING SEMICONDUCTOR WAFERS AND OTHER SEMICONDUCTOR WORKPIECES
6
Patent #:
Issue Dt:
04/14/2009
Application #:
11765738
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
10/18/2007
Title:
INTELLIGENT BINNING FOR ELECTRICALLY REPAIRABLE SEMICONDUCTOR CHIPS
7
Patent #:
Issue Dt:
06/17/2014
Application #:
11765768
Filing Dt:
06/20/2007
Publication #:
Pub Dt:
12/25/2008
Title:
CHARGE DISSIPATION OF CAVITIES
8
Patent #:
Issue Dt:
03/03/2009
Application #:
11766493
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
01/17/2008
Title:
CIRCUIT AND METHOD FOR ELECTRICALLY PROGRAMMING A NON-VOLATILE SEMICONDUCTOR MEMORY VIA AN ADDITIONAL PROGRAMMING PULSE AFTER VERIFICATION
9
Patent #:
Issue Dt:
10/09/2012
Application #:
11766632
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
12/25/2008
Title:
SYSTEMS AND METHODS FOR OSCILLATING EXPOSURE OF A SEMICONDUCTOR WORKPIECE TO MULTIPLE CHEMISTRIES
10
Patent #:
Issue Dt:
10/23/2012
Application #:
11766663
Filing Dt:
06/21/2007
Publication #:
Pub Dt:
12/25/2008
Title:
MULTILAYER ANTIREFLECTION COATINGS, STRUCTURES AND DEVICES INCLUDING THE SAME AND METHODS OF MAKING THE SAME
11
Patent #:
Issue Dt:
07/26/2011
Application #:
11766931
Filing Dt:
06/22/2007
Publication #:
Pub Dt:
12/25/2008
Title:
METHOD FOR SELECTIVELY FORMING SYMMETRICAL OR ASYMMETRICAL FEATURES USING A SYMMETRICAL PHOTOMASK DURING FABRICATION OF A SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEMS INCLUDING THE SEMICONDUCTOR DEVICE
12
Patent #:
Issue Dt:
05/25/2010
Application #:
11767889
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
11/20/2008
Title:
SEMICONDUCTOR PACKAGE HAVING DIE WITH RECESS AND DISCRETE COMPONENT EMBEDDED WITHIN THE RECESS
13
Patent #:
Issue Dt:
10/26/2010
Application #:
11767962
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
12/25/2008
Title:
SENSOR AND TRANSDUCER DEVICES COMPRISING CARBON NANOTUBES, METHODS OF MAKING AND USING THE SAME
14
Patent #:
Issue Dt:
02/23/2010
Application #:
11768125
Filing Dt:
06/25/2007
Publication #:
Pub Dt:
10/25/2007
Title:
METHOD AND APPARATUS PROVIDING A CROSS-POINT MEMORY ARRAY USING A VARIABLE RESISTANCE MEMORY CELL AND CAPACITANCE
15
Patent #:
Issue Dt:
04/06/2010
Application #:
11768413
Filing Dt:
06/26/2007
Publication #:
Pub Dt:
01/01/2009
Title:
NOVEL BUILD-UP-PACKAGE FOR INTEGRATED CIRCUIT DEVICES, AND METHODS OF MAKING SAME
16
Patent #:
Issue Dt:
05/27/2014
Application #:
11769517
Filing Dt:
06/27/2007
Publication #:
Pub Dt:
01/01/2009
Title:
PIXEL TO PIXEL CHARGE COPIER CIRCUIT APPARATUS, SYSTEMS, AND METHODS
17
Patent #:
Issue Dt:
04/20/2010
Application #:
11770451
Filing Dt:
06/28/2007
Publication #:
Pub Dt:
11/20/2008
Title:
METHODS OF ASSEMBLING INTEGRATED CIRCUIT PACKAGES
18
Patent #:
Issue Dt:
07/28/2009
Application #:
11771677
Filing Dt:
06/29/2007
Publication #:
Pub Dt:
01/17/2008
Title:
AUTOMATIC REGULATION METHOD FOR THE REFERENCE SOURCES IN A NON-VOLATILE MEMORY DEVICE AND CORRESPONDING MEMORY DEVICE
19
Patent #:
Issue Dt:
08/09/2011
Application #:
11772452
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
METHOD OF FORMING MOLDED STANDOFF STRUCTURES ON INTEGRATED CIRCUIT DEVICES
20
Patent #:
Issue Dt:
05/03/2011
Application #:
11772642
Filing Dt:
07/02/2007
Publication #:
Pub Dt:
01/08/2009
Title:
FRACTIONAL-RATE DECISION FEEDBACK EQUALIZATION USEFUL IN A DATA TRANSMISSION SYSTEM
21
Patent #:
Issue Dt:
10/19/2010
Application #:
11773118
Filing Dt:
07/03/2007
Publication #:
Pub Dt:
01/08/2009
Title:
METHOD AND SYSTEM FOR LITHOGRAPHIC SIMULATION AND VERIFICATION
22
Patent #:
NONE
Issue Dt:
Application #:
11773321
Filing Dt:
07/03/2007
Publication #:
Pub Dt:
01/08/2009
Title:
BLOCK ADDRESSING FOR PARALLEL MEMORY ARRAYS
23
Patent #:
Issue Dt:
11/23/2010
Application #:
11773580
Filing Dt:
07/05/2007
Publication #:
Pub Dt:
01/08/2009
Title:
METHODS OF ETCHING NANODOTS, METHODS OF REMOVING NANODOTS FROM SUBSTRATES, METHODS OF FABRICATING INTEGRATED CIRCUIT DEVICES, METHODS OF ETCHING A LAYER COMPRISING A LATE TRANSITION METAL, AND METHODS OF REMOVING A LAYER COMPRISING A LATE TRANSITION METAL FROM A SU
24
Patent #:
Issue Dt:
03/08/2011
Application #:
11773622
Filing Dt:
07/05/2007
Publication #:
Pub Dt:
01/08/2009
Title:
SILICON DIOXIDE DEPOSITION METHODS USING AT LEAST OZONE AND TEOS AS DEPOSITION PRECURSORS
25
Patent #:
Issue Dt:
09/30/2014
Application #:
11774298
Filing Dt:
07/06/2007
Publication #:
Pub Dt:
01/08/2009
Title:
DIELECTRIC CHARGE-TRAPPING MATERIALS HAVING DOPED METAL SITES
26
Patent #:
Issue Dt:
11/01/2011
Application #:
11774316
Filing Dt:
07/06/2007
Publication #:
Pub Dt:
01/08/2009
Title:
ERROR RECOVERY STORAGE ALONG A NAND-FLASH STRING
27
Patent #:
Issue Dt:
11/22/2011
Application #:
11774377
Filing Dt:
07/06/2007
Publication #:
Pub Dt:
01/08/2009
Title:
DATA STORAGE WITH AN OUTER BLOCK CODE AND A STREAM-BASED INNER CODE
28
Patent #:
Issue Dt:
10/19/2010
Application #:
11774665
Filing Dt:
07/09/2007
Publication #:
Pub Dt:
01/29/2009
Title:
SEMICONDUCTOR DEVICE COMPRISING TRANSISTOR STRUCTURES AND METHODS FOR FORMING SAME
29
Patent #:
Issue Dt:
02/22/2011
Application #:
11774709
Filing Dt:
07/09/2007
Publication #:
Pub Dt:
01/15/2009
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS, AND METHODS OF FORMING ISOLATION REGIONS
30
Patent #:
Issue Dt:
06/29/2010
Application #:
11774825
Filing Dt:
07/09/2007
Publication #:
Pub Dt:
01/15/2009
Title:
ERROR CORRECTION FOR MEMORY
31
Patent #:
Issue Dt:
01/04/2011
Application #:
11776221
Filing Dt:
07/11/2007
Publication #:
Pub Dt:
11/08/2007
Title:
NEGATIVE VOLTAGE DISCHARGE SCHEME TO IMPROVE SNAPBACK IN A NON-VOLATILE MEMORY
32
Patent #:
Issue Dt:
07/13/2010
Application #:
11776300
Filing Dt:
07/11/2007
Publication #:
Pub Dt:
06/12/2008
Title:
NANOLAMINATE-STRUCTURE DIELECTRIC FILM FORMING METHOD
33
Patent #:
Issue Dt:
09/27/2011
Application #:
11777005
Filing Dt:
07/12/2007
Publication #:
Pub Dt:
01/15/2009
Title:
METHODS OF MODIFYING OXIDE SPACERS
34
Patent #:
Issue Dt:
01/18/2011
Application #:
11777442
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/15/2009
Title:
METHODS, SYSTEMS, AND DEVICES FOR OFFSET COMPENSATION IN CMOS IMAGERS
35
Patent #:
Issue Dt:
07/07/2009
Application #:
11777749
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/17/2008
Title:
DEVICE AND METHOD HAVING A MEMORY ARRAY STORING EACH BIT IN MULTIPLE MEMORY CELLS
36
Patent #:
Issue Dt:
01/19/2010
Application #:
11777762
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
01/15/2009
Title:
ASSEMBLIES FOR PLASMA-ENHANCED TREATMENT OF SUBSTRATES
37
Patent #:
Issue Dt:
10/14/2008
Application #:
11777797
Filing Dt:
07/13/2007
Publication #:
Pub Dt:
11/08/2007
Title:
LOW TEMPERATURE METHODS OF FORMING BACK SIDE REDISTRIBUTION LAYERS IN ASSOCIATION WITH THROUGH WAFER INTERCONNECTS
38
Patent #:
Issue Dt:
02/01/2011
Application #:
11778938
Filing Dt:
07/17/2007
Publication #:
Pub Dt:
01/29/2009
Title:
METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING DUAL FIN STRUCTURES
39
Patent #:
NONE
Issue Dt:
Application #:
11779450
Filing Dt:
07/18/2007
Publication #:
Pub Dt:
12/18/2008
Title:
Method And System For Removing Tape From Substrates
40
Patent #:
Issue Dt:
01/12/2010
Application #:
11780581
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
02/28/2008
Title:
MEMORY DEVICE WITH FAIL SEARCH AND REDUNDANCY
41
Patent #:
Issue Dt:
08/02/2011
Application #:
11780628
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/22/2009
Title:
METHODS OF PROCESSING SUBSTRATES, ELECTROSTATIC CARRIERS FOR RETAINING SUBSTRATES FOR PROCESSING, AND ASSEMBLIES COMPRISING ELECTROSTATIC CARRIERS HAVING SUBSTRATES ELECTROSTATICALLY BONDED THERETO
42
Patent #:
Issue Dt:
02/02/2010
Application #:
11780734
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/17/2008
Title:
DATA COMPRESSION READ MODE FOR MEMORY TESTING
43
Patent #:
Issue Dt:
03/31/2009
Application #:
11780963
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
01/22/2009
Title:
VARIABLE RESISTANCE LOGIC
44
Patent #:
Issue Dt:
12/21/2010
Application #:
11781083
Filing Dt:
07/20/2007
Publication #:
Pub Dt:
11/15/2007
Title:
METHOD OF FORMING VIAS IN SEMICONDUCTOR SUBSTRATES AND RESULTING STRUCTURES
45
Patent #:
Issue Dt:
06/23/2009
Application #:
11781256
Filing Dt:
07/22/2007
Publication #:
Pub Dt:
11/15/2007
Title:
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE WITH MULTI-LAYER DIE CONTACT AND EXTERNAL CONTACT
46
Patent #:
Issue Dt:
06/14/2011
Application #:
11781413
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
01/29/2009
Title:
VARIABLE GAIN STAGE HAVING SAME INPUT CAPACITANCE REGARDLESS OF THE STAGE GAIN
47
Patent #:
Issue Dt:
11/16/2010
Application #:
11781746
Filing Dt:
07/23/2007
Publication #:
Pub Dt:
11/15/2007
Title:
DEVICES AND SYSTEMS HAVING AT LEAST ONE DAM STRUCTURE
48
Patent #:
Issue Dt:
12/15/2009
Application #:
11782442
Filing Dt:
07/24/2007
Publication #:
Pub Dt:
11/22/2007
Title:
ONE-TRANSISTOR COMPOSITE-GATE MEMORY
49
Patent #:
Issue Dt:
02/10/2009
Application #:
11782866
Filing Dt:
07/25/2007
Publication #:
Pub Dt:
01/29/2009
Title:
PROGRAMMING MULTILEVEL CELL MEMORY ARRAYS
50
Patent #:
Issue Dt:
02/16/2010
Application #:
11783040
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
04/24/2008
Title:
PHOTODIODE WITH ULTRA-SHALLOW JUNCTION FOR HIGH QUANTUM EFFICIENCY CMOS IMAGE SENSOR AND METHOD OF FORMATION
51
Patent #:
Issue Dt:
03/09/2010
Application #:
11784145
Filing Dt:
04/05/2007
Publication #:
Pub Dt:
10/09/2008
Title:
FLIP-CHIP IMAGE SENSOR PACKAGES AND METHODS OF FABRICATING THE SAME
52
Patent #:
Issue Dt:
09/22/2009
Application #:
11784241
Filing Dt:
04/06/2007
Publication #:
Pub Dt:
10/09/2008
Title:
METHODS FOR DETERMINING A DOSE OF AN IMPURITY IMPLANTED IN A SEMICONDUCTOR SUBSTRATE
53
Patent #:
Issue Dt:
04/21/2009
Application #:
11784346
Filing Dt:
04/06/2007
Publication #:
Pub Dt:
08/30/2007
Title:
INTEGRATED CIRCUIT LOAD BOARD AND METHOD HAVING ON-BOARD TEST CIRCUIT
54
Patent #:
Issue Dt:
01/11/2011
Application #:
11785535
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
10/25/2007
Title:
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
55
Patent #:
Issue Dt:
06/07/2011
Application #:
11785545
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
10/11/2007
Title:
METHODS TO MAKE SIDEWALL LIGHT SHIELDS FOR COLOR FILTER ARRAY
56
Patent #:
Issue Dt:
03/03/2009
Application #:
11786219
Filing Dt:
04/11/2007
Publication #:
Pub Dt:
08/16/2007
Title:
STUD ELECTRODE AND PROCESS FOR MAKING SAME
57
Patent #:
Issue Dt:
02/12/2013
Application #:
11786306
Filing Dt:
04/11/2007
Publication #:
Pub Dt:
10/16/2008
Title:
METHODS FOR REMOVING PHOTORESIST DEFECTS AND A METHOD FOR PROCESSING A SEMICONDUCTOR DEVICE STRUCTURE
58
Patent #:
Issue Dt:
07/21/2009
Application #:
11786338
Filing Dt:
04/10/2007
Publication #:
Pub Dt:
10/16/2008
Title:
HIGH SLEW RATE AMPLIFIER, ANALOG-TO DIGITAL CONVERTER USING SAME, CMOS IMAGER USING THE ANALOG-TO-DIGITAL CONVERTER AND RELATED METHODS
59
Patent #:
Issue Dt:
04/22/2008
Application #:
11786551
Filing Dt:
04/11/2007
Publication #:
Pub Dt:
08/16/2007
Title:
METHOD AND APPARATUS FOR SYNCHRONIZING DATA FROM MEMORY ARRAYS
60
Patent #:
Issue Dt:
08/03/2010
Application #:
11786609
Filing Dt:
04/12/2007
Publication #:
Pub Dt:
10/16/2008
Title:
SEMICONDUCTOR FABRICATION METHOD AND SYSTEM
61
Patent #:
Issue Dt:
05/27/2014
Application #:
11786610
Filing Dt:
04/12/2007
Publication #:
Pub Dt:
10/16/2008
Title:
System in package (SIP) with dual laminate interposers
62
Patent #:
Issue Dt:
11/02/2010
Application #:
11787079
Filing Dt:
04/12/2007
Publication #:
Pub Dt:
08/23/2007
Title:
ARRAY OF CAPACITORS WITH ELECTRICALLY INSULATIVE RINGS
63
Patent #:
Issue Dt:
09/06/2011
Application #:
11787101
Filing Dt:
04/13/2007
Publication #:
Pub Dt:
12/06/2007
Title:
OPTIMIZED FLASH MEMORY ACCESS METHOD AND DEVICE
64
Patent #:
Issue Dt:
10/20/2009
Application #:
11787718
Filing Dt:
04/17/2007
Publication #:
Pub Dt:
10/18/2007
Title:
SEMICONDUCTOR MEMORY ARRAY ARCHITECTURE WITH GROUPED MEMORY CELLS, AND METHOD OF CONTROLLING SAME
65
Patent #:
Issue Dt:
06/14/2011
Application #:
11787928
Filing Dt:
04/18/2007
Publication #:
Pub Dt:
10/23/2008
Title:
METHODS OF PATTERNING A SUBSTRATE
66
Patent #:
Issue Dt:
09/28/2010
Application #:
11788442
Filing Dt:
04/20/2007
Publication #:
Pub Dt:
10/23/2008
Title:
PERIODIC SIGNAL SYNCHRONIZATION APPARATUS, SYSTEMS, AND METHODS
67
Patent #:
Issue Dt:
05/18/2010
Application #:
11789367
Filing Dt:
04/23/2007
Publication #:
Pub Dt:
10/23/2008
Title:
JTAG CONTROLLED SELF-REPAIR AFTER PACKAGING
68
Patent #:
Issue Dt:
12/23/2008
Application #:
11789663
Filing Dt:
04/24/2007
Publication #:
Pub Dt:
08/23/2007
Title:
APPARATUS AND METHOD FOR DYNAMICALLY REPAIRING A SEMICONDUCTOR MEMORY
69
Patent #:
Issue Dt:
09/09/2008
Application #:
11789725
Filing Dt:
04/25/2007
Publication #:
Pub Dt:
12/13/2007
Title:
DEFECTIVE BLOCK HANDLING IN A FLASH MEMORY DEVICE
70
Patent #:
Issue Dt:
04/27/2010
Application #:
11790200
Filing Dt:
04/24/2007
Publication #:
Pub Dt:
11/01/2007
Title:
SEMICONDUCTOR MEMORY DEVICE COMPRISING MEMORY ELEMENT PROGRAMMING CIRCUITS HAVING DIFFERENT PROGRAMMING THRESHOLD POWER SUPPLY VOLTAGES
71
Patent #:
Issue Dt:
09/06/2011
Application #:
11790996
Filing Dt:
04/30/2007
Publication #:
Pub Dt:
11/01/2007
Title:
SEMICONDUCTOR DEVICE HAVING A CIRCULAR-ARC PROFILE ON A SILICON SURFACE
72
Patent #:
Issue Dt:
04/12/2011
Application #:
11795357
Filing Dt:
07/12/2007
Publication #:
Pub Dt:
05/27/2010
Title:
WORD LINE VOLTAGE BOOST SYSTEM AND METHOD FOR NON-VOLATILE MEMORY DEVICES AND MEMORY DEVICES AND PROCESSOR-BASED SYSTEM USING SAME
73
Patent #:
Issue Dt:
08/02/2016
Application #:
11795358
Filing Dt:
07/12/2007
Publication #:
Pub Dt:
06/03/2010
Title:
Memory Area Protection System and Methods
74
Patent #:
Issue Dt:
11/16/2010
Application #:
11796289
Filing Dt:
04/27/2007
Publication #:
Pub Dt:
10/30/2008
Title:
CAPACITORS AND METHODS WITH PRASEODYMIUM OXIDE INSULATORS
75
Patent #:
Issue Dt:
04/26/2011
Application #:
11796935
Filing Dt:
04/30/2007
Publication #:
Pub Dt:
11/08/2007
Title:
SEMICONDUCTOR MEMORY CELL AND ARRAY USING PUNCH-THROUGH TO PROGRAM AND READ SAME
76
Patent #:
Issue Dt:
11/30/2010
Application #:
11797194
Filing Dt:
05/01/2007
Publication #:
Pub Dt:
08/30/2007
Title:
BURIED CONDUCTOR FOR IMAGERS
77
Patent #:
Issue Dt:
05/18/2010
Application #:
11797872
Filing Dt:
05/08/2007
Publication #:
Pub Dt:
11/13/2008
Title:
INVERTED VARIABLE RESISTANCE MEMORY CELL AND METHOD OF MAKING THE SAME
78
Patent #:
Issue Dt:
12/13/2011
Application #:
11798282
Filing Dt:
05/11/2007
Publication #:
Pub Dt:
11/13/2008
Title:
METHODS, APPARATUSES AND SYSTEMS FOR PIECEWISE GENERATION OF PIXEL CORRECTION VALUES FOR IMAGE PROCESSING
79
Patent #:
Issue Dt:
08/02/2011
Application #:
11798459
Filing Dt:
05/14/2007
Publication #:
Pub Dt:
11/20/2008
Title:
VARIABLE RESISTANCE MEMORY DEVICE HAVING REDUCED BOTTOM CONTACT AREA AND METHOD OF FORMING THE SAME
80
Patent #:
Issue Dt:
02/10/2009
Application #:
11798524
Filing Dt:
05/15/2007
Publication #:
Pub Dt:
11/22/2007
Title:
POLISHING DEVICE
81
Patent #:
Issue Dt:
11/18/2008
Application #:
11798809
Filing Dt:
05/17/2007
Publication #:
Pub Dt:
11/22/2007
Title:
PROBE CARD
82
Patent #:
Issue Dt:
01/04/2011
Application #:
11799657
Filing Dt:
05/02/2007
Publication #:
Pub Dt:
11/06/2008
Title:
EXPANDED PROGRAMMING WINDOW FOR NON-VOLATILE MULTILEVEL MEMORY CELLS
83
Patent #:
Issue Dt:
08/18/2009
Application #:
11799658
Filing Dt:
05/02/2007
Publication #:
Pub Dt:
11/06/2008
Title:
NON-VOLATILE MULTILEVEL MEMORY CELLS WITH DATA READ OF REFERENCE CELLS
84
Patent #:
Issue Dt:
02/02/2010
Application #:
11800002
Filing Dt:
05/03/2007
Publication #:
Pub Dt:
11/06/2008
Title:
NAND STEP UP VOLTAGE SWITCHING METHOD
85
Patent #:
Issue Dt:
06/29/2010
Application #:
11800459
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
CLASS AB AMPLIFIER AND IMAGERS AND SYSTEMS USING SAME
86
Patent #:
Issue Dt:
03/16/2010
Application #:
11800472
Filing Dt:
05/04/2007
Publication #:
Pub Dt:
11/06/2008
Title:
CIRCUIT AND METHOD FOR INTERCONNECTING STACKED INTEGRATED CIRCUIT DIES
87
Patent #:
Issue Dt:
05/17/2016
Application #:
11800520
Filing Dt:
05/04/2007
Title:
Method and apparatus for enabling a timing synchronization circuit
88
Patent #:
Issue Dt:
05/17/2011
Application #:
11800974
Filing Dt:
05/08/2007
Publication #:
Pub Dt:
11/29/2007
Title:
NON-VOLATILE MEMORY CONTROL
89
Patent #:
Issue Dt:
08/28/2012
Application #:
11803261
Filing Dt:
05/14/2007
Publication #:
Pub Dt:
11/20/2008
Title:
ZINC-TIN OXIDE THIN-FILM TRANSISTORS
90
Patent #:
Issue Dt:
04/20/2010
Application #:
11803862
Filing Dt:
05/16/2007
Publication #:
Pub Dt:
11/20/2008
Title:
MEMORY MODULE HAVING A COVER PIVOTALLY COUPLED THERETO
91
Patent #:
Issue Dt:
03/03/2009
Application #:
11804098
Filing Dt:
05/17/2007
Publication #:
Pub Dt:
11/22/2007
Title:
INTEGRATED CIRCUIT HAVING MEMORY ARRAY INCLUDING ROW REDUNDANCY, AND METHOD OF PROGRAMMING, CONTROLLING AND/OR OPERATING SAME
92
Patent #:
Issue Dt:
01/12/2010
Application #:
11804176
Filing Dt:
05/16/2007
Publication #:
Pub Dt:
11/20/2008
Title:
ON-DIE SYSTEM AND METHOD FOR CONTROLLING TERMINATION IMPEDANCE OF MEMORY DEVICE DATA BUS TERMINALS
93
Patent #:
Issue Dt:
11/03/2009
Application #:
11805092
Filing Dt:
05/21/2007
Publication #:
Pub Dt:
11/27/2008
Title:
METHODS, CIRCUITS, AND SYSTEMS TO SELECT MEMORY REGIONS
94
Patent #:
Issue Dt:
04/13/2010
Application #:
11805102
Filing Dt:
05/21/2007
Publication #:
Pub Dt:
11/27/2008
Title:
SEMICONDUCTOR DEVICE HAVING REDUCED SUB-THRESHOLD LEAKAGE
95
Patent #:
Issue Dt:
12/28/2010
Application #:
11806515
Filing Dt:
05/31/2007
Publication #:
Pub Dt:
12/04/2008
Title:
PHASE CHANGE MEMORY STRUCTURE WITH MULTIPLE RESISTANCE STATES AND METHODS OF PROGRAMMING AND SENSING SAME
96
Patent #:
Issue Dt:
04/07/2009
Application #:
11807272
Filing Dt:
05/24/2007
Publication #:
Pub Dt:
11/27/2008
Title:
MEMORY ARCHITECTURE HAVING LOCAL COLUMN SELECT LINES
97
Patent #:
Issue Dt:
08/18/2009
Application #:
11808163
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
12/27/2007
Title:
SEMICONDUCTOR DEVICE AND MANUFACTURE METHOD THEREOF
98
Patent #:
Issue Dt:
04/20/2010
Application #:
11809180
Filing Dt:
05/31/2007
Publication #:
Pub Dt:
12/04/2008
Title:
NON-VOLATILE MEMORY CELL HEALING
99
Patent #:
Issue Dt:
02/05/2013
Application #:
11810004
Filing Dt:
06/04/2007
Publication #:
Pub Dt:
12/04/2008
Title:
HIGH-K DIELECTRICS WITH GOLD NANO-PARTICLES
100
Patent #:
Issue Dt:
11/18/2008
Application #:
11810725
Filing Dt:
06/07/2007
Publication #:
Pub Dt:
02/07/2008
Title:
PROGRAM METHOD WITH OPTIMIZED VOLTAGE LEVEL FOR FLASH MEMORY
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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