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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
NONE
Issue Dt:
Application #:
12355412
Filing Dt:
01/16/2009
Publication #:
Pub Dt:
07/22/2010
Title:
PHOTOLITHOGRAPHY SYSTEMS WITH LOCAL EXPOSURE CORRECTION AND ASSOCIATED METHODS
2
Patent #:
Issue Dt:
03/08/2011
Application #:
12355466
Filing Dt:
01/16/2009
Title:
HIGH IMPEDANCE REFERENCE VOLTAGE DISTRIBUTION
3
Patent #:
Issue Dt:
10/12/2010
Application #:
12355523
Filing Dt:
01/16/2009
Publication #:
Pub Dt:
07/22/2010
Title:
LOCKED LOOPS, BIAS GENERATORS, CHARGE PUMPS AND METHODS FOR GENERATING CONTROL VOLTAGES
4
Patent #:
Issue Dt:
04/13/2010
Application #:
12355593
Filing Dt:
01/16/2009
Title:
SYSTEMS AND METHODS FOR DETECTING TERMINAL STATE AND SETTING OUTPUT DRIVER IMPEDANCE
5
Patent #:
Issue Dt:
06/28/2011
Application #:
12355934
Filing Dt:
01/19/2009
Publication #:
Pub Dt:
04/01/2010
Title:
DETERMINING MEMORY PAGE STATUS
6
Patent #:
Issue Dt:
09/14/2010
Application #:
12356384
Filing Dt:
01/20/2009
Publication #:
Pub Dt:
05/14/2009
Title:
SEMICONDUCTOR PACKAGES
7
Patent #:
Issue Dt:
03/05/2013
Application #:
12356725
Filing Dt:
01/21/2009
Publication #:
Pub Dt:
07/22/2010
Title:
SOLID STATE MEMORY FORMATTING
8
Patent #:
Issue Dt:
05/15/2012
Application #:
12356765
Filing Dt:
01/21/2009
Publication #:
Pub Dt:
07/22/2010
Title:
LOGICAL ADDRESS OFFSET IN RESPONSE TO DETECTING A MEMORY FORMATTING OPERATION
9
Patent #:
Issue Dt:
01/18/2011
Application #:
12356916
Filing Dt:
01/21/2009
Publication #:
Pub Dt:
07/22/2010
Title:
DELAY LINES, METHODS FOR DELAYING A SIGNAL, AND DELAY LOCK LOOPS
10
Patent #:
Issue Dt:
08/31/2010
Application #:
12357196
Filing Dt:
01/21/2009
Publication #:
Pub Dt:
05/21/2009
Title:
TRENCH DRAM CELL WITH VERTICAL DEVICE AND BURIED WORD LINES
11
Patent #:
Issue Dt:
11/02/2010
Application #:
12357549
Filing Dt:
01/22/2009
Publication #:
Pub Dt:
05/21/2009
Title:
INTEGRATED CIRCUIT COMPARATOR OR AMPLIFIER
12
Patent #:
Issue Dt:
09/06/2011
Application #:
12357940
Filing Dt:
01/22/2009
Title:
ERASE VERIFICATION FOR FLASH MEMORY
13
Patent #:
Issue Dt:
06/29/2010
Application #:
12358343
Filing Dt:
01/23/2009
Publication #:
Pub Dt:
05/21/2009
Title:
SCAN LINE TO BLOCK RE-ORDERING BUFFER FOR IMAGE COMPRESSION
14
Patent #:
Issue Dt:
05/01/2012
Application #:
12358977
Filing Dt:
01/23/2009
Publication #:
Pub Dt:
07/29/2010
Title:
STROBE APPARATUS, SYSTEMS, AND METHODS
15
Patent #:
Issue Dt:
02/28/2012
Application #:
12359014
Filing Dt:
01/23/2009
Publication #:
Pub Dt:
07/29/2010
Title:
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
16
Patent #:
Issue Dt:
08/11/2015
Application #:
12359039
Filing Dt:
01/23/2009
Publication #:
Pub Dt:
07/29/2010
Title:
MEMORY DEVICE POWER MANAGERS AND METHODS
17
Patent #:
Issue Dt:
10/22/2013
Application #:
12359299
Filing Dt:
01/24/2009
Publication #:
Pub Dt:
07/29/2010
Title:
REFERENCE VOLTAGE GENERATION FOR SINGLE-ENDED COMMUNICATION CHANNELS
18
Patent #:
Issue Dt:
12/04/2012
Application #:
12359537
Filing Dt:
01/26/2009
Publication #:
Pub Dt:
07/29/2010
Title:
HOST CONTROLLER
19
Patent #:
Issue Dt:
06/14/2011
Application #:
12359748
Filing Dt:
01/26/2009
Publication #:
Pub Dt:
05/28/2009
Title:
Electronic device having a hafnium nitride and hafnium oxide film
20
Patent #:
Issue Dt:
12/14/2010
Application #:
12359859
Filing Dt:
01/26/2009
Publication #:
Pub Dt:
06/25/2009
Title:
METHODS OF FORMING AND PROGRAMMING FLOATING-GATE MEMORY CELLS HAVING CARBON NANOTUBES
21
Patent #:
Issue Dt:
02/15/2011
Application #:
12360165
Filing Dt:
01/27/2009
Publication #:
Pub Dt:
08/27/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
22
Patent #:
Issue Dt:
12/14/2010
Application #:
12360496
Filing Dt:
01/27/2009
Publication #:
Pub Dt:
05/21/2009
Title:
SEMICONDUCTOR MAGNETIC MEMORY INTEGRATING A MAGNETIC TUNNELING JUNCTION ABOVE A FLOATING-GATE MEMORY CELL
23
Patent #:
Issue Dt:
12/18/2012
Application #:
12360738
Filing Dt:
01/27/2009
Publication #:
Pub Dt:
05/21/2009
Title:
PROCESS FOR IMPROVING CRITICAL DIMENSION UNIFORMITY OF INTEGRATED CIRCUIT ARRAYS
24
Patent #:
Issue Dt:
04/19/2011
Application #:
12361320
Filing Dt:
01/28/2009
Publication #:
Pub Dt:
07/29/2010
Title:
DIGITAL LOCKED LOOPS AND METHODS WITH CONFIGURABLE OPERATING PARAMETERS
25
Patent #:
Issue Dt:
02/02/2010
Application #:
12361400
Filing Dt:
01/28/2009
Publication #:
Pub Dt:
05/21/2009
Title:
SYSTEM AND METHOD FOR PROCESSOR WITH PREDICTIVE MEMORY RETRIEVAL ASSIST
26
Patent #:
NONE
Issue Dt:
Application #:
12362621
Filing Dt:
01/30/2009
Publication #:
Pub Dt:
05/28/2009
Title:
METHOD FOR FORMING AN INDUCTOR
27
Patent #:
Issue Dt:
05/29/2012
Application #:
12363841
Filing Dt:
02/02/2009
Publication #:
Pub Dt:
08/13/2009
Title:
INTEGRATED CIRCUIT HAVING MEMORY CELLS INCLUDING GATE MATERIAL HAVING HIGH WORK FUNCTION, AND METHOD OF MANUFACTURING SAME
28
Patent #:
Issue Dt:
04/27/2010
Application #:
12364073
Filing Dt:
02/02/2009
Publication #:
Pub Dt:
07/02/2009
Title:
EPITAXIAL SEMICONDUCTOR LAYER AND METHOD
29
Patent #:
Issue Dt:
10/11/2011
Application #:
12364342
Filing Dt:
02/02/2009
Publication #:
Pub Dt:
07/30/2009
Title:
PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
30
Patent #:
Issue Dt:
05/08/2012
Application #:
12364809
Filing Dt:
02/03/2009
Publication #:
Pub Dt:
05/28/2009
Title:
FLOATING-GATE STRUCTURE WITH DIELECTRIC COMPONENT
31
Patent #:
Issue Dt:
03/25/2014
Application #:
12364843
Filing Dt:
02/03/2009
Publication #:
Pub Dt:
08/05/2010
Title:
CAPACITOR STRUCTURES HAVING IMPROVED AREA EFFICIENCY
32
Patent #:
Issue Dt:
09/25/2012
Application #:
12364900
Filing Dt:
02/03/2009
Publication #:
Pub Dt:
08/05/2010
Title:
DETERMINING SECTOR STATUS IN A MEMORY DEVICE
33
Patent #:
Issue Dt:
01/17/2012
Application #:
12364923
Filing Dt:
02/03/2009
Publication #:
Pub Dt:
08/05/2010
Title:
METHODS OF OPERARTING MEMORY DEVICES WITHIN A COMMUNICATION PROTOCOL STANDARD TIMEOUT REQUIREMENT
34
Patent #:
Issue Dt:
01/10/2012
Application #:
12365037
Filing Dt:
02/03/2009
Publication #:
Pub Dt:
08/05/2010
Title:
METHODS OF FORMING MEMORY CELLS
35
Patent #:
Issue Dt:
11/15/2011
Application #:
12365519
Filing Dt:
02/04/2009
Publication #:
Pub Dt:
08/05/2010
Title:
SEMICONDUCTOR DEVICES AND STRUCTURES INCLUDING AT LEAST PARTIALLY FORMED CONTAINER CAPACITORS AND METHODS OF FORMING THE SAME
36
Patent #:
Issue Dt:
08/28/2012
Application #:
12365533
Filing Dt:
02/04/2009
Publication #:
Pub Dt:
08/05/2010
Title:
MEMORY SEGMENT ACCESSING IN A MEMORY DEVICE
37
Patent #:
Issue Dt:
07/31/2012
Application #:
12365589
Filing Dt:
02/04/2009
Publication #:
Pub Dt:
04/15/2010
Title:
ARCHITECTURE AND METHOD FOR MEMORY PROGRAMMING
38
Patent #:
Issue Dt:
03/25/2014
Application #:
12365712
Filing Dt:
02/04/2009
Publication #:
Pub Dt:
08/05/2010
Title:
STACKED-DIE MEMORY SYSTEMS AND METHODS FOR TRAINING STACKED-DIE MEMORY SYSTEMS
39
Patent #:
Issue Dt:
04/19/2011
Application #:
12365734
Filing Dt:
02/04/2018
Publication #:
Pub Dt:
08/05/2010
Title:
SEMICONDUCTOR MATERIAL MANUFACTURE
40
Patent #:
Issue Dt:
02/04/2014
Application #:
12365816
Filing Dt:
02/04/2009
Publication #:
Pub Dt:
08/05/2010
Title:
Systems and Methods for Storing and Recovering Controller Data in Non-Volatile Memory Devices
41
Patent #:
Issue Dt:
05/17/2011
Application #:
12366216
Filing Dt:
02/05/2009
Publication #:
Pub Dt:
08/05/2010
Title:
ERASE VERIFY IN MEMORY DEVICES
42
Patent #:
Issue Dt:
07/21/2015
Application #:
12366379
Filing Dt:
02/05/2009
Publication #:
Pub Dt:
08/05/2010
Title:
DATA ENCODING USING SPARE CHANNELS IN A MEMORY SYSTEM
43
Patent #:
Issue Dt:
11/17/2009
Application #:
12366512
Filing Dt:
02/05/2009
Publication #:
Pub Dt:
06/11/2009
Title:
DELAY-LOCKED LOOP (DLL) SYSTEM FOR DETERMINING FORWARD CLOCK PATH DELAY
44
Patent #:
Issue Dt:
07/19/2011
Application #:
12367097
Filing Dt:
02/06/2009
Publication #:
Pub Dt:
08/12/2010
Title:
MEMORY ARRAY WITH INVERTED DATA-LINE PAIRS
45
Patent #:
Issue Dt:
09/06/2011
Application #:
12367154
Filing Dt:
02/06/2009
Publication #:
Pub Dt:
08/13/2009
Title:
SINGLE TRANSISTOR MEMORY CELL
46
Patent #:
Issue Dt:
01/31/2012
Application #:
12367360
Filing Dt:
02/06/2009
Publication #:
Pub Dt:
06/04/2009
Title:
IMAGER WITH TUNED COLOR FILTER
47
Patent #:
Issue Dt:
08/06/2013
Application #:
12367395
Filing Dt:
02/06/2009
Publication #:
Pub Dt:
08/12/2010
Title:
MEMORY DEVICE HAVING SELF-ALIGNED CELL STRUCTURE
48
Patent #:
Issue Dt:
01/04/2011
Application #:
12367409
Filing Dt:
02/06/2009
Publication #:
Pub Dt:
06/04/2009
Title:
OXIDE EPITAXIAL ISOLATION
49
Patent #:
Issue Dt:
06/01/2010
Application #:
12368148
Filing Dt:
02/09/2009
Publication #:
Pub Dt:
07/30/2009
Title:
MEMORY DEVICE HAVING A DELAY LOCKED LOOP WITH FREQUENCY CONTROL
50
Patent #:
Issue Dt:
02/08/2011
Application #:
12368271
Filing Dt:
02/09/2009
Publication #:
Pub Dt:
06/18/2009
Title:
SENSE AMPLIFIER FOR LOW-SUPPLY-VOLTAGE NONVOLATILE MEMORY CELLS
51
Patent #:
Issue Dt:
06/15/2010
Application #:
12368666
Filing Dt:
02/10/2009
Publication #:
Pub Dt:
06/18/2009
Title:
PROGRAMMING MULTILEVEL CELL MEMORY ARRAYS
52
Patent #:
Issue Dt:
06/29/2010
Application #:
12368694
Filing Dt:
02/10/2009
Publication #:
Pub Dt:
06/11/2009
Title:
NAND ARCHITECTURE MEMORY DEVICES AND OPERATION
53
Patent #:
Issue Dt:
12/13/2011
Application #:
12369294
Filing Dt:
02/11/2009
Publication #:
Pub Dt:
06/11/2009
Title:
MAGNESIUM-DOPED ZINC OXIDE STRUCTURES AND METHODS
54
Patent #:
Issue Dt:
03/22/2011
Application #:
12371052
Filing Dt:
02/13/2009
Publication #:
Pub Dt:
06/11/2009
Title:
COLUMN/ROW REDUNDANCY ARCHITECTURE USING LATCHES PROGRAMMED FROM A LOOK UP TABLE
55
Patent #:
Issue Dt:
04/05/2011
Application #:
12371294
Filing Dt:
02/13/2009
Publication #:
Pub Dt:
08/19/2010
Title:
DYNAMIC SOFT PROGRAM TRIMS
56
Patent #:
Issue Dt:
01/29/2013
Application #:
12371389
Filing Dt:
02/13/2009
Publication #:
Pub Dt:
08/19/2010
Title:
MEMORY PREFETCH SYSTEMS AND METHODS
57
Patent #:
Issue Dt:
05/10/2011
Application #:
12371551
Filing Dt:
02/13/2009
Publication #:
Pub Dt:
06/04/2009
Title:
MEMORY ARRAY HAVING A PROGRAMMABLE WORD LENGTH, AND METHOD OF OPERATING SAME
58
Patent #:
Issue Dt:
06/08/2010
Application #:
12372153
Filing Dt:
02/17/2009
Publication #:
Pub Dt:
07/02/2009
Title:
ROBUST INDEX STORAGE FOR NON-VOLATILE MEMORY
59
Patent #:
Issue Dt:
08/23/2011
Application #:
12372280
Filing Dt:
02/17/2009
Publication #:
Pub Dt:
06/18/2009
Title:
APPARATUS HAVING A DIELECTRIC CONTAINING SCANDIUM AND GADOLINIUM
60
Patent #:
Issue Dt:
10/12/2010
Application #:
12372331
Filing Dt:
02/17/2009
Publication #:
Pub Dt:
06/11/2009
Title:
APPARATUS AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
61
Patent #:
Issue Dt:
02/12/2013
Application #:
12372405
Filing Dt:
02/17/2009
Publication #:
Pub Dt:
06/18/2009
Title:
CLUSTER BASED NON-VOLATILE MEMORY TRANSLATION LAYER
62
Patent #:
Issue Dt:
06/10/2014
Application #:
12381088
Filing Dt:
03/05/2009
Publication #:
Pub Dt:
12/17/2009
Title:
Devices for positioning carbon nanoparticles, and systems for controlling placement of nanoparticles
63
Patent #:
Issue Dt:
06/05/2012
Application #:
12388366
Filing Dt:
02/18/2009
Publication #:
Pub Dt:
04/01/2010
Title:
MEMORY CELL OPERATION
64
Patent #:
Issue Dt:
05/10/2011
Application #:
12388656
Filing Dt:
02/19/2009
Publication #:
Pub Dt:
08/27/2009
Title:
ELECTRONIC DEVICE COMPRISING NON VOLATILE MEMORY CELLS AND CORRESPONDING PROGRAMMING METHOD
65
Patent #:
Issue Dt:
08/24/2010
Application #:
12388697
Filing Dt:
02/19/2009
Publication #:
Pub Dt:
06/18/2009
Title:
SEMICONDUCTOR COMPONENTS HAVING THROUGH INTERCONNECTS AND BACKSIDE REDISTRIBUTION CONDUCTORS
66
Patent #:
Issue Dt:
07/17/2012
Application #:
12389048
Filing Dt:
02/19/2009
Publication #:
Pub Dt:
08/19/2010
Title:
SOFT LANDING FOR DESIRED PROGRAM THRESHOLD VOLTAGE
67
Patent #:
Issue Dt:
02/26/2013
Application #:
12389105
Filing Dt:
02/19/2009
Publication #:
Pub Dt:
08/19/2010
Title:
METHODS AND APPARATUS FOR DESIGNATING OR USING DATA STATUS INDICATORS
68
Patent #:
Issue Dt:
09/20/2011
Application #:
12389142
Filing Dt:
02/19/2009
Publication #:
Pub Dt:
08/19/2010
Title:
METHODS OF FABRICATING A CROSS POINT MEMORY ARRAY
69
Patent #:
Issue Dt:
10/01/2013
Application #:
12389200
Filing Dt:
02/19/2009
Publication #:
Pub Dt:
08/19/2010
Title:
MEMORY NETWORK METHODS, APPARATUS, AND SYSTEMS
70
Patent #:
Issue Dt:
08/02/2011
Application #:
12390920
Filing Dt:
02/23/2009
Publication #:
Pub Dt:
06/18/2009
Title:
METHOD OF FORMING A FILM CONTAINING DYSPROSIUM OXIDE AND HAFNIUM OXIDE USING ATOMIC LAYER DEPOSITION
71
Patent #:
Issue Dt:
06/12/2012
Application #:
12392742
Filing Dt:
02/25/2009
Publication #:
Pub Dt:
08/26/2010
Title:
METHODS OF FORMING INTEGRATED CIRCUITS USING DONOR AND ACCEPTOR SUBSTRATES
72
Patent #:
Issue Dt:
05/18/2010
Application #:
12393464
Filing Dt:
02/26/2009
Publication #:
Pub Dt:
06/25/2009
Title:
METHOD AND APPARATUS FOR MANAGING BEHAVIOR OF MEMORY DEVICES
73
Patent #:
Issue Dt:
01/03/2012
Application #:
12393893
Filing Dt:
02/26/2009
Publication #:
Pub Dt:
06/25/2009
Title:
SELECTIVE ETCH CHEMISTRIES FOR FORMING HIGH ASPECT RATIO FEATURES AND ASSOCIATED STRUCTURES
74
Patent #:
Issue Dt:
03/01/2011
Application #:
12394282
Filing Dt:
02/27/2009
Publication #:
Pub Dt:
08/06/2009
Title:
READ STROBE FEEDBACK IN A MEMORY SYSTEM
75
Patent #:
Issue Dt:
11/23/2010
Application #:
12394711
Filing Dt:
02/27/2009
Publication #:
Pub Dt:
07/30/2009
Title:
MEMORY ARRAY WITH SURROUNDING GATE ACCESS TRANSISTORS AND CAPACITORS WITH GLOBAL AND STAGGERED LOCAL BIT LINES
76
Patent #:
Issue Dt:
05/17/2011
Application #:
12395254
Filing Dt:
02/27/2009
Publication #:
Pub Dt:
07/30/2009
Title:
VOLTAGE-CONTROLLED SEMICONDUCTOR INDUCTOR AND METHOD
77
Patent #:
Issue Dt:
10/25/2011
Application #:
12395340
Filing Dt:
02/27/2009
Publication #:
Pub Dt:
09/02/2010
Title:
MEMORY MODULES HAVING DAISY CHAIN WIRING CONFIGURATIONS AND FILTERS
78
Patent #:
Issue Dt:
03/01/2011
Application #:
12395989
Filing Dt:
03/02/2009
Publication #:
Pub Dt:
06/25/2009
Title:
METHODS FOR FORMING THROUGH WAFER INTERCONNECTS AND STRUCTURES RESULTING THEREFROM
79
Patent #:
Issue Dt:
04/12/2011
Application #:
12396893
Filing Dt:
03/03/2009
Publication #:
Pub Dt:
09/09/2010
Title:
METHODS OF FORMING PHOTOMASKS
80
Patent #:
Issue Dt:
02/28/2012
Application #:
12396941
Filing Dt:
03/03/2009
Publication #:
Pub Dt:
09/09/2010
Title:
METHODS OF PATTERNING POSITIVE PHOTORESIST
81
Patent #:
Issue Dt:
03/27/2012
Application #:
12396952
Filing Dt:
03/03/2009
Publication #:
Pub Dt:
03/11/2010
Title:
FABRICATION PROCESSES FOR FORMING DUAL DEPTH TRENCHES USING A DRY ETCH THAT DEPOSITS A POLYMER
82
Patent #:
Issue Dt:
03/13/2012
Application #:
12397083
Filing Dt:
03/03/2009
Publication #:
Pub Dt:
09/09/2010
Title:
METHODS OF FORMING PATTERNS
83
Patent #:
Issue Dt:
02/05/2013
Application #:
12397149
Filing Dt:
03/03/2009
Publication #:
Pub Dt:
09/09/2010
Title:
PROTECTION OF SECURITY PARAMETERS IN STORAGE DEVICES
84
Patent #:
Issue Dt:
01/10/2012
Application #:
12397396
Filing Dt:
03/04/2009
Publication #:
Pub Dt:
09/09/2010
Title:
MEMORY BLOCK MANAGEMENT
85
Patent #:
Issue Dt:
08/07/2012
Application #:
12397402
Filing Dt:
03/04/2009
Publication #:
Pub Dt:
09/09/2010
Title:
MEMORY SUPER BLOCK ALLOCATION
86
Patent #:
Issue Dt:
05/17/2011
Application #:
12398049
Filing Dt:
03/04/2009
Publication #:
Pub Dt:
09/10/2009
Title:
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
87
Patent #:
Issue Dt:
05/03/2011
Application #:
12398298
Filing Dt:
03/05/2009
Title:
FORMING LOW DIELECTRIC CONSTANT DIELECTRIC MATERIALS
88
Patent #:
Issue Dt:
07/06/2010
Application #:
12398789
Filing Dt:
03/05/2009
Publication #:
Pub Dt:
08/06/2009
Title:
MEM SUSPENDED GATE NON-VOLATILE MEMORY
89
Patent #:
Issue Dt:
09/07/2010
Application #:
12399266
Filing Dt:
03/06/2009
Publication #:
Pub Dt:
07/02/2009
Title:
SEMICONDUCTOR CONSTRUCTIONS
90
Patent #:
Issue Dt:
12/01/2009
Application #:
12399757
Filing Dt:
03/06/2009
Publication #:
Pub Dt:
07/02/2009
Title:
LOW VOLTAGE SENSE AMPLIFIER AND SENSING METHOD
91
Patent #:
Issue Dt:
06/28/2011
Application #:
12400044
Filing Dt:
03/09/2009
Publication #:
Pub Dt:
07/02/2009
Title:
PHASE CHANGE MEMORY ELEMENTS USING SELF-ALIGNED PHASE CHANGE MATERIAL LAYERS
92
Patent #:
Issue Dt:
04/05/2011
Application #:
12400410
Filing Dt:
03/09/2009
Publication #:
Pub Dt:
07/02/2009
Title:
SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
93
Patent #:
Issue Dt:
05/10/2011
Application #:
12400495
Filing Dt:
03/09/2009
Publication #:
Pub Dt:
09/09/2010
Title:
DUTY CYCLE CORRECTION SYSTEMS AND METHODS
94
Patent #:
Issue Dt:
08/15/2017
Application #:
12400632
Filing Dt:
03/09/2009
Publication #:
Pub Dt:
09/09/2010
Title:
METHOD FOR EMBEDDING SILICON DIE INTO A STACKED PACKAGE
95
Patent #:
Issue Dt:
06/28/2011
Application #:
12401387
Filing Dt:
03/10/2009
Publication #:
Pub Dt:
09/16/2010
Title:
ELECTRONIC DEVICES FORMED OF TWO OR MORE SUBSTRATES BONDED TOGETHER, ELECTRONIC SYSTEMS COMPRISING ELECTRONIC DEVICES AND METHODS OF MAKING ELECTRONIC DEVICES
96
Patent #:
Issue Dt:
01/24/2012
Application #:
12401404
Filing Dt:
03/10/2009
Publication #:
Pub Dt:
07/09/2009
Title:
LANTHANIDE DOPED TIOX FILMS
97
Patent #:
Issue Dt:
04/03/2012
Application #:
12401555
Filing Dt:
03/10/2009
Publication #:
Pub Dt:
07/09/2009
Title:
FULLY-DEPLETED (FD)(SOI) MOSFET ACCESS TRANSISTOR AND METHOD OF FABRICATION
98
Patent #:
Issue Dt:
02/11/2014
Application #:
12401566
Filing Dt:
03/10/2009
Publication #:
Pub Dt:
07/09/2009
Title:
METHODS OF FORMING INTERCONNECTS IN A SEMICONDUCTOR STRUCTURE
99
Patent #:
Issue Dt:
06/15/2010
Application #:
12401996
Filing Dt:
03/11/2009
Publication #:
Pub Dt:
07/09/2009
Title:
CONTACT FORMATION
100
Patent #:
Issue Dt:
05/15/2012
Application #:
12402103
Filing Dt:
03/11/2009
Publication #:
Pub Dt:
09/16/2010
Title:
METHODS FOR FORMING THREE-DIMENSIONAL MEMORY DEVICES, AND RELATED STRUCTURES
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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