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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 127 of 181
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1
Patent #:
8203900
Issue Dt:
06/19/2012
Application #:
12500207
Filing Dt:
07/09/2009
Publication #:
US20110007591
Pub Dt:
01/13/2011
Title:
DATA SERIALIZERS, OUTPUT BUFFERS, MEMORY DEVICES AND METHODS OF SERIALIZING
2
Patent #:
8094507
Issue Dt:
01/10/2012
Application #:
12500240
Filing Dt:
07/09/2009
Publication #:
US20110007587
Pub Dt:
01/13/2011
Title:
COMMAND LATENCY SYSTEMS AND METHODS
3
Patent #:
7858523
Issue Dt:
12/28/2010
Application #:
12500738
Filing Dt:
07/10/2009
Publication #:
US20090275199
Pub Dt:
11/05/2009
Title:
UNSYMMETRICAL LIGAND SOURCES, REDUCED SYMMETRY METAL-CONTAINING COMPOUNDS, AND SYSTEMS AND METHODS INCLUDING SAME
4
Patent #:
8084296
Issue Dt:
12/27/2011
Application #:
12501797
Filing Dt:
07/13/2009
Publication #:
US20090275173
Pub Dt:
11/05/2009
Title:
METHODS FOR REDUCING STRESS IN MICROELECTRONIC DEVICES AND MICROELECTRONIC DEVICES FORMED USING SUCH METHODS
5
Patent #:
8361332
Issue Dt:
01/29/2013
Application #:
12501872
Filing Dt:
07/13/2009
Publication #:
US20090315201
Pub Dt:
12/24/2009
Title:
METHOD OF FORMING MICRO-LENSES
6
Patent #:
8461682
Issue Dt:
06/11/2013
Application #:
12501955
Filing Dt:
07/13/2009
Publication #:
US20090278232
Pub Dt:
11/12/2009
Title:
RUTHENIUM SILICIDE DIFFUSION BARRIER LAYERS AND METHODS OF FORMING SAME
7
Patent #:
8004031
Issue Dt:
08/23/2011
Application #:
12502055
Filing Dt:
07/13/2009
Publication #:
US20090273019
Pub Dt:
11/05/2009
Title:
MEMORY DEVICE TRANSISTORS
8
Patent #:
7924619
Issue Dt:
04/12/2011
Application #:
12502537
Filing Dt:
07/14/2009
Publication #:
US20090273979
Pub Dt:
11/05/2009
Title:
PROGRAMMING METHOD TO REDUCE WORD LINE TO WORD LINE BREAKDOWN FOR NAND FLASH
9
Patent #:
7968969
Issue Dt:
06/28/2011
Application #:
12502630
Filing Dt:
07/14/2009
Publication #:
US20090273058
Pub Dt:
11/05/2009
Title:
ELECTRICAL COMPONENTS FOR MICROELECTRONIC DEVICES
10
Patent #:
8295088
Issue Dt:
10/23/2012
Application #:
12502771
Filing Dt:
07/14/2009
Publication #:
US20090273980
Pub Dt:
11/05/2009
Title:
NAND ARCHITECTURE MEMORY WITH VOLTAGE SENSING
11
Patent #:
7961526
Issue Dt:
06/14/2011
Application #:
12502932
Filing Dt:
07/14/2009
Publication #:
US20090279367
Pub Dt:
11/12/2009
Title:
POWER SAVING SENSING SCHEME FOR SOLID STATE MEMORY
12
Patent #:
7888774
Issue Dt:
02/15/2011
Application #:
12503685
Filing Dt:
07/15/2009
Publication #:
US20100013048
Pub Dt:
01/21/2010
Title:
INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
13
Patent #:
8626997
Issue Dt:
01/07/2014
Application #:
12504029
Filing Dt:
07/16/2009
Publication #:
US20110016268
Pub Dt:
01/20/2011
Title:
PHASE CHANGE MEMORY IN A DUAL INLINE MEMORY MODULE
14
Patent #:
7872911
Issue Dt:
01/18/2011
Application #:
12504292
Filing Dt:
07/16/2009
Publication #:
US20090273975
Pub Dt:
11/05/2009
Title:
NON-VOLATILE MULTILEVEL MEMORY CELLS WITH DATA READ OF REFERENCE CELLS
15
Patent #:
7897485
Issue Dt:
03/01/2011
Application #:
12504385
Filing Dt:
07/16/2009
Publication #:
US20090280584
Pub Dt:
11/12/2009
Title:
WAFER PROCESSING INCLUDING FORMING TRENCH ROWS AND COLUMNS AT LEAST ONE OF WHICH HAS A DIFFERENT WIDTH
16
Patent #:
7961522
Issue Dt:
06/14/2011
Application #:
12505886
Filing Dt:
07/20/2009
Publication #:
US20090279363
Pub Dt:
11/12/2009
Title:
METHOD AND SYSTEM FOR MINIMIZING NUMBER OF PROGRAMMING PULSES USED TO PROGRAM ROWS OF NON-VOLATILE MEMORY CELLS
17
Patent #:
7800953
Issue Dt:
09/21/2010
Application #:
12505909
Filing Dt:
07/20/2009
Publication #:
US20090279376
Pub Dt:
11/12/2009
Title:
METHOD AND SYSTEM FOR SELECTIVELY LIMITING PEAK POWER CONSUMPTION DURING PROGRAMMING OR ERASE OF NON-VOLATILE MEMORY DEVICES
18
Patent #:
7989362
Issue Dt:
08/02/2011
Application #:
12505963
Filing Dt:
07/20/2009
Publication #:
US20090294924
Pub Dt:
12/03/2009
Title:
HAFNIUM LANTHANIDE OXYNITRIDE FILMS
19
Patent #:
8237474
Issue Dt:
08/07/2012
Application #:
12506000
Filing Dt:
07/20/2009
Publication #:
US20090309637
Pub Dt:
12/17/2009
Title:
DELAY LINE OFF-STATE CONTROL WITH POWER REDUCTION
20
Patent #:
7985679
Issue Dt:
07/26/2011
Application #:
12507475
Filing Dt:
07/22/2009
Publication #:
US20090280639
Pub Dt:
11/12/2009
Title:
ATOMIC LAYER DEPOSITION METHODS
21
Patent #:
8164959
Issue Dt:
04/24/2012
Application #:
12509350
Filing Dt:
07/24/2009
Publication #:
US20090296468
Pub Dt:
12/03/2009
Title:
METHOD AND SYSTEM FOR PROGRAMMING NON-VOLATILE MEMORY CELLS BASED ON PROGRAMMING OF PROXIMATE MEMORY CELLS
22
Patent #:
8094508
Issue Dt:
01/10/2012
Application #:
12509739
Filing Dt:
07/27/2009
Publication #:
US20090290441
Pub Dt:
11/26/2009
Title:
MEMORY BLOCK TESTING
23
Patent #:
9030895
Issue Dt:
05/12/2015
Application #:
12510633
Filing Dt:
07/28/2009
Publication #:
US20100030954
Pub Dt:
02/04/2010
Title:
MEMORY DEVICE WITH PIN REGISTER TO SET INPUT/OUTPUT DIRECTION AND BITWIDTH OF DATA SIGNALS.
24
Patent #:
8253198
Issue Dt:
08/28/2012
Application #:
12512579
Filing Dt:
07/30/2009
Publication #:
US20110024848
Pub Dt:
02/03/2011
Title:
DEVICES FOR SHIELDING A SIGNAL LINE OVER AN ACTIVE REGION
25
Patent #:
8484428
Issue Dt:
07/09/2013
Application #:
12512765
Filing Dt:
07/30/2009
Publication #:
US20110029751
Pub Dt:
02/03/2011
Title:
ENHANCED BLOCK COPY
26
Patent #:
8211762
Issue Dt:
07/03/2012
Application #:
12512907
Filing Dt:
07/30/2009
Title:
NON-VOLATILE MEMORY
27
Patent #:
7952631
Issue Dt:
05/31/2011
Application #:
12533146
Filing Dt:
07/31/2009
Publication #:
US20090284623
Pub Dt:
11/19/2009
Title:
CMOS IMAGER WITH INTEGRATED CIRCUITRY
28
Patent #:
7897517
Issue Dt:
03/01/2011
Application #:
12533543
Filing Dt:
07/31/2009
Publication #:
US20090291556
Pub Dt:
11/26/2009
Title:
METHOD OF SELECTIVELY DEPOSITING MATERIALS ON A SUBSTRATE USING A SUPERCRITICAL FLUID
29
Patent #:
7989870
Issue Dt:
08/02/2011
Application #:
12534054
Filing Dt:
07/31/2009
Publication #:
US20100032746
Pub Dt:
02/11/2010
Title:
USE OF DILUTE STEAM AMBIENT FOR IMPROVEMENT OF FLASH DEVICES
30
Patent #:
7936610
Issue Dt:
05/03/2011
Application #:
12534792
Filing Dt:
08/03/2009
Title:
SELECTIVE REFRESH OF SINGLE BIT MEMORY CELLS
31
Patent #:
8144497
Issue Dt:
03/27/2012
Application #:
12535092
Filing Dt:
08/04/2009
Publication #:
US20090289701
Pub Dt:
11/26/2009
Title:
SELF-IDENTIFYING STACKED DIE SEMICONDUCTOR COMPONENTS
32
Patent #:
8043944
Issue Dt:
10/25/2011
Application #:
12536551
Filing Dt:
08/06/2009
Publication #:
US20090291545
Pub Dt:
11/26/2009
Title:
PROCESS FOR ENHANCING SOLUBILITY AND REACTION RATES IN SUPERCRITICAL FLUIDS
33
Patent #:
7932151
Issue Dt:
04/26/2011
Application #:
12537356
Filing Dt:
08/07/2009
Publication #:
US20100044787
Pub Dt:
02/25/2010
Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
34
Patent #:
7944743
Issue Dt:
05/17/2011
Application #:
12537470
Filing Dt:
08/07/2009
Publication #:
US20090311845
Pub Dt:
12/17/2009
Title:
METHODS OF MAKING A SEMICONDUCTOR MEMORY DEVICE
35
Patent #:
7830733
Issue Dt:
11/09/2010
Application #:
12538559
Filing Dt:
08/10/2009
Publication #:
US20090296502
Pub Dt:
12/03/2009
Title:
DEVICES, SYSTEMS, AND METHODS FOR INDEPENDENT OUTPUT DRIVE STRENGTHS
36
Patent #:
8238244
Issue Dt:
08/07/2012
Application #:
12538607
Filing Dt:
08/10/2009
Publication #:
US20110032823
Pub Dt:
02/10/2011
Title:
PACKET DECONSTRUCTION/RECONSTRUCTION AND LINK-CONTROL
37
Patent #:
7993988
Issue Dt:
08/09/2011
Application #:
12538680
Filing Dt:
08/10/2009
Publication #:
US20090298246
Pub Dt:
12/03/2009
Title:
TECHNIQUES FOR FABRICATING A NON-PLANAR TRANSISTOR
38
Patent #:
8076714
Issue Dt:
12/13/2011
Application #:
12538990
Filing Dt:
08/11/2009
Publication #:
US20090294830
Pub Dt:
12/03/2009
Title:
MEMORY DEVICE WITH HIGH DIELECTRIC CONSTANT GATE DIELECTRICS AND METAL FLOATING GATES
39
Patent #:
7804324
Issue Dt:
09/28/2010
Application #:
12539317
Filing Dt:
08/11/2009
Publication #:
US20090295426
Pub Dt:
12/03/2009
Title:
DYNAMICALLY ADJUSTING OPERATION OF A CIRCUIT WITHIN A SEMICONDUCTOR DEVICE
40
Patent #:
8700845
Issue Dt:
04/15/2014
Application #:
12539771
Filing Dt:
08/12/2009
Title:
DAISY CHAINING NONVOLATILE MEMORIES
41
Patent #:
9305606
Issue Dt:
04/05/2016
Application #:
12542528
Filing Dt:
08/17/2009
Publication #:
US20110040909
Pub Dt:
02/17/2011
Title:
HIGH-SPEED WIRELESS SERIAL COMMUNICATION LINK FOR A STACKED DEVICE CONFIGURATION USING NEAR FIELD COUPLING
42
Patent #:
9287275
Issue Dt:
03/15/2016
Application #:
12544773
Filing Dt:
08/20/2009
Publication #:
US20090309151
Pub Dt:
12/17/2009
Title:
Semiconductor Constructions
43
Patent #:
9799562
Issue Dt:
10/24/2017
Application #:
12545196
Filing Dt:
08/21/2009
Publication #:
US20110042821
Pub Dt:
02/24/2011
Title:
VIAS AND CONDUCTIVE ROUTING LAYERS IN SEMICONDUCTOR SUBSTRATES
44
Patent #:
8245024
Issue Dt:
08/14/2012
Application #:
12545689
Filing Dt:
08/21/2009
Publication #:
US20110047366
Pub Dt:
02/24/2011
Title:
BOOTING IN SYSTEMS HAVING DEVICES COUPLED IN A CHAINED CONFIGURATION
45
Patent #:
8769213
Issue Dt:
07/01/2014
Application #:
12546258
Filing Dt:
08/24/2009
Publication #:
US20110047311
Pub Dt:
02/24/2011
Title:
MULTI-PORT MEMORY AND OPERATION
46
Patent #:
8270205
Issue Dt:
09/18/2012
Application #:
12546387
Filing Dt:
08/24/2009
Publication #:
US20100001250
Pub Dt:
01/07/2010
Title:
VARIABLE RESISTANCE MEMORY DEVICE WITH AN INTERFACIAL ADHESION HEATING LAYER, SYSTEMS USING THE SAME AND METHODS OF FORMING THE SAME
47
Patent #:
8492282
Issue Dt:
07/23/2013
Application #:
12546466
Filing Dt:
08/24/2009
Publication #:
US20100130016
Pub Dt:
05/27/2010
Title:
METHODS OF FORMING A MASKING PATTERN FOR INTEGRATED CIRCUITS
48
Patent #:
8048762
Issue Dt:
11/01/2011
Application #:
12546938
Filing Dt:
08/25/2009
Publication #:
US20100130019
Pub Dt:
05/27/2010
Title:
MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
49
Patent #:
7924617
Issue Dt:
04/12/2011
Application #:
12547102
Filing Dt:
08/25/2009
Publication #:
US20090310416
Pub Dt:
12/17/2009
Title:
SELECTIVE THRESHOLD VOLTAGE VERIFICATION AND COMPACTION
50
Patent #:
8159875
Issue Dt:
04/17/2012
Application #:
12547130
Filing Dt:
08/25/2009
Publication #:
US20090316480
Pub Dt:
12/24/2009
Title:
METHODS OF STORING MULTIPLE DATA-BITS IN A NON-VOLATILE MEMORY CELL
51
Patent #:
8144534
Issue Dt:
03/27/2012
Application #:
12547209
Filing Dt:
08/25/2009
Publication #:
US20110051538
Pub Dt:
03/03/2011
Title:
METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS
52
Patent #:
7961517
Issue Dt:
06/14/2011
Application #:
12547218
Filing Dt:
08/25/2009
Publication #:
US20090316486
Pub Dt:
12/24/2009
Title:
PROGRAM AND READ TRIM SETTING
53
Patent #:
8077515
Issue Dt:
12/13/2011
Application #:
12547280
Filing Dt:
08/25/2009
Publication #:
US20110051513
Pub Dt:
03/03/2011
Title:
METHODS, DEVICES, AND SYSTEMS FOR DEALING WITH THRESHOLD VOLTAGE CHANGE IN MEMORY DEVICES
54
Patent #:
8320181
Issue Dt:
11/27/2012
Application #:
12547337
Filing Dt:
08/25/2009
Publication #:
US20110051512
Pub Dt:
03/03/2011
Title:
3D MEMORY DEVICES DECODING AND ROUTING SYSTEMS AND METHODS
55
Patent #:
7944300
Issue Dt:
05/17/2011
Application #:
12547338
Filing Dt:
08/25/2009
Publication #:
US20110050343
Pub Dt:
03/03/2011
Title:
BIAS CIRCUIT AND AMPLIFIER PROVIDING CONSTANT OUTPUT CURRENT FOR A RANGE OF COMMON MODE INPUTS
56
Patent #:
8258034
Issue Dt:
09/04/2012
Application #:
12548193
Filing Dt:
08/26/2009
Publication #:
US20110049606
Pub Dt:
03/03/2011
Title:
CHARGE-TRAP BASED MEMORY
57
Patent #:
8601202
Issue Dt:
12/03/2013
Application #:
12548375
Filing Dt:
08/26/2009
Title:
FULL CHIP WEAR LEVELING IN MEMORY DEVICE
58
Patent #:
9160349
Issue Dt:
10/13/2015
Application #:
12548883
Filing Dt:
08/27/2009
Publication #:
US20110050303
Pub Dt:
03/03/2011
Title:
DIE LOCATION COMPENSATION
59
Patent #:
8085606
Issue Dt:
12/27/2011
Application #:
12549200
Filing Dt:
08/27/2009
Publication #:
US20090316496
Pub Dt:
12/24/2009
Title:
INPUT-OUTPUT LINE SENSE AMPLIFIER HAVING ADJUSTABLE OUTPUT DRIVE CAPABILITY
60
Patent #:
8677931
Issue Dt:
03/25/2014
Application #:
12550229
Filing Dt:
08/28/2009
Publication #:
US20090316126
Pub Dt:
12/24/2009
Title:
HIGH RESOLUTION PRINTING TECHNIQUE
61
Patent #:
8209447
Issue Dt:
06/26/2012
Application #:
12550770
Filing Dt:
08/31/2009
Publication #:
US20110055436
Pub Dt:
03/03/2011
Title:
DEVICE TO DEVICE FLOW CONTROL WITHIN A CHAIN OF DEVICES
62
Patent #:
7949803
Issue Dt:
05/24/2011
Application #:
12550911
Filing Dt:
08/31/2009
Publication #:
US20090319714
Pub Dt:
12/24/2009
Title:
SYSTEM AND METHOD FOR TRANSMITTING DATA PACKETS IN A COMPUTER SYSTEM HAVING A MEMORY HUB ARCHITECTURE
63
Patent #:
8581352
Issue Dt:
11/12/2013
Application #:
12550971
Filing Dt:
08/31/2009
Publication #:
US20090315089
Pub Dt:
12/24/2009
Title:
ELECTRONIC DEVICES INCLUDING BARIUM STRONTIUM TITANIUM OXIDE FILMS
64
Patent #:
8015384
Issue Dt:
09/06/2011
Application #:
12550989
Filing Dt:
08/31/2009
Publication #:
US20090319750
Pub Dt:
12/24/2009
Title:
MEMORY HUB ARCHITECTURE HAVING PROGRAMMABLE LANE WIDTHS
65
Patent #:
8273177
Issue Dt:
09/25/2012
Application #:
12551023
Filing Dt:
08/31/2009
Publication #:
US20090314345
Pub Dt:
12/24/2009
Title:
TITANIUM-DOPED INDIUM OXIDE FILMS
66
Patent #:
8553462
Issue Dt:
10/08/2013
Application #:
12551383
Filing Dt:
08/31/2009
Publication #:
US20090316482
Pub Dt:
12/24/2009
Title:
METHOD OF PROGRAMMING A MULTI-LEVEL MEMORY DEVICE
67
Patent #:
7881149
Issue Dt:
02/01/2011
Application #:
12551876
Filing Dt:
09/01/2009
Publication #:
US20090323441
Pub Dt:
12/31/2009
Title:
WRITE LATENCY TRACKING USING A DELAY LOCK LOOP IN A SYNCHRONOUS DRAM
68
Patent #:
8036016
Issue Dt:
10/11/2011
Application #:
12552246
Filing Dt:
09/01/2009
Publication #:
US20110051507
Pub Dt:
03/03/2011
Title:
MAINTENANCE PROCESS TO ENHANCE MEMORY ENDURANCE
69
Patent #:
8134872
Issue Dt:
03/13/2012
Application #:
12552601
Filing Dt:
09/02/2009
Publication #:
US20090327594
Pub Dt:
12/31/2009
Title:
APPARATUS AND METHODS FOR PROGRAMMING MULTILEVEL-CELL NAND MEMORY DEVICES
70
Patent #:
8077532
Issue Dt:
12/13/2011
Application #:
12552743
Filing Dt:
09/02/2009
Publication #:
US20110051523
Pub Dt:
03/03/2011
Title:
SMALL UNIT INTERNAL VERIFY READ IN A MEMORY DEVICE
71
Patent #:
8758987
Issue Dt:
06/24/2014
Application #:
12552879
Filing Dt:
09/02/2009
Publication #:
US20110052883
Pub Dt:
03/03/2011
Title:
METHODS OF FORMING A REVERSED PATTERN IN A SUBSTRATE
72
Patent #:
7999589
Issue Dt:
08/16/2011
Application #:
12553792
Filing Dt:
09/03/2009
Publication #:
US20110050307
Pub Dt:
03/03/2011
Title:
CIRCUITS AND METHODS FOR CLOCK SIGNAL DUTY-CYCLE CORRECTION
73
Patent #:
8239607
Issue Dt:
08/07/2012
Application #:
12553856
Filing Dt:
09/03/2009
Publication #:
US20090319745
Pub Dt:
12/24/2009
Title:
SYSTEM AND METHOD FOR AN ASYNCHRONOUS DATA BUFFER HAVING BUFFER WRITE AND READ POINTERS
74
Patent #:
7949822
Issue Dt:
05/24/2011
Application #:
12555574
Filing Dt:
09/08/2009
Publication #:
US20090327595
Pub Dt:
12/31/2009
Title:
STORAGE CAPACITY STATUS
75
Patent #:
8564094
Issue Dt:
10/22/2013
Application #:
12556266
Filing Dt:
09/09/2009
Publication #:
US20110057292
Pub Dt:
03/10/2011
Title:
CAPACITORS INCLUDING AT LEAST TWO PORTIONS OF A METAL NITRIDE MATERIAL, METHODS OF FORMING SUCH STRUCTURES, AND SEMICONDUCTOR DEVICES INCLUDING SUCH STRUCTURES
76
Patent #:
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Assignor
1
MICRON TECHNOLOGY, INC.
Exec Dt:
04/26/2016
Assignee
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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