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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 129 of 181
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1
Patent #:
7888188
Issue Dt:
02/15/2011
Application #:
12621413
Filing Dt:
11/18/2009
Publication #:
US20100062571
Pub Dt:
03/11/2010
Title:
METHOD OF FABICATING A MICROELECTRONIC DIE HAVING A CURVED SURFACE
2
Patent #:
8268732
Issue Dt:
09/18/2012
Application #:
12621768
Filing Dt:
11/19/2009
Publication #:
US20110117733
Pub Dt:
05/19/2011
Title:
METHODS OF UTILIZING BLOCK COPOLYMERS TO FORM PATTERNS
3
Patent #:
8361832
Issue Dt:
01/29/2013
Application #:
12622121
Filing Dt:
11/19/2009
Publication #:
US20100068879
Pub Dt:
03/18/2010
Title:
CONTACT FOR MEMORY CELL
4
Patent #:
8003482
Issue Dt:
08/23/2011
Application #:
12622171
Filing Dt:
11/19/2009
Publication #:
US20110117719
Pub Dt:
05/19/2011
Title:
METHODS OF PROCESSING SEMICONDUCTOR SUBSTRATES IN FORMING SCRIBE LINE ALIGNMENT MARKS
5
Patent #:
8188533
Issue Dt:
05/29/2012
Application #:
12622679
Filing Dt:
11/20/2009
Publication #:
US20100067304
Pub Dt:
03/18/2010
Title:
WRITE ONCE READ ONLY MEMORY EMPLOYING CHARGE TRAPPING IN INSULATORS
6
Patent #:
7986555
Issue Dt:
07/26/2011
Application #:
12622922
Filing Dt:
11/20/2009
Publication #:
US20100067307
Pub Dt:
03/18/2010
Title:
METHOD FOR PROGRAMMING AND ERASING AN NROM CELL
7
Patent #:
8664742
Issue Dt:
03/04/2014
Application #:
12622939
Filing Dt:
11/20/2009
Publication #:
US20100065941
Pub Dt:
03/18/2010
Title:
SEMICONDUCTOR SUBSTRATES WITH UNDERCUT STRUCTURES
8
Patent #:
8402347
Issue Dt:
03/19/2013
Application #:
12623310
Filing Dt:
11/20/2009
Publication #:
US20100169741
Pub Dt:
07/01/2010
Title:
ERROR CORRECTION CODE FOR UNIDIRECTIONAL MEMORY
9
Patent #:
7851850
Issue Dt:
12/14/2010
Application #:
12623895
Filing Dt:
11/23/2009
Publication #:
US20100072537
Pub Dt:
03/25/2010
Title:
BAND ENGINEERED NANO-CRYSTAL NON-VOLATILE MEMORY DEVICE UTILIZING ENHANCED GATE INJECTION
10
Patent #:
8199566
Issue Dt:
06/12/2012
Application #:
12623926
Filing Dt:
11/23/2009
Title:
WRITE PERFORMANCE OF PHASE CHANGE MEMORY USING SET-PULSE SHAPING
11
Patent #:
7973411
Issue Dt:
07/05/2011
Application #:
12624215
Filing Dt:
11/23/2009
Publication #:
US20100065970
Pub Dt:
03/18/2010
Title:
MICROFEATURE WORKPIECES HAVING CONDUCTIVE INTERCONNECT STRUCTURES FORMED BY CHEMICALLY REACTIVE PROCESSES, AND ASSOCIATED SYSTEMS AND METHODS
12
Patent #:
8008126
Issue Dt:
08/30/2011
Application #:
12624774
Filing Dt:
11/24/2009
Publication #:
US20100068851
Pub Dt:
03/18/2010
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
13
Patent #:
7964909
Issue Dt:
06/21/2011
Application #:
12624797
Filing Dt:
11/24/2009
Publication #:
US20100065902
Pub Dt:
03/18/2010
Title:
SCALABLE HIGH DENSITY NON-VOLATILE MEMORY CELLS IN A CONTACTLESS MEMORY ARRAY
14
Patent #:
8402236
Issue Dt:
03/19/2013
Application #:
12625006
Filing Dt:
11/24/2009
Publication #:
US20110078395
Pub Dt:
03/31/2011
Title:
COMPUTER SYSTEM MANAGING VOLUME ALLOCATION AND VOLUME ALLOCATION MANAGEMENT METHOD
15
Patent #:
8068374
Issue Dt:
11/29/2011
Application #:
12625035
Filing Dt:
11/24/2009
Publication #:
US20100074036
Pub Dt:
03/25/2010
Title:
CURRENT MODE MEMORY APPARATUS, SYSTEMS, AND METHODS
16
Patent #:
8023293
Issue Dt:
09/20/2011
Application #:
12625090
Filing Dt:
11/24/2009
Publication #:
US20100073972
Pub Dt:
03/25/2010
Title:
ON-DIE ANTI-RESONANCE STRUCTURE FOR INTEGRATED CIRCUIT
17
Patent #:
8058716
Issue Dt:
11/15/2011
Application #:
12625384
Filing Dt:
11/24/2009
Publication #:
US20100065955
Pub Dt:
03/18/2010
Title:
INTEGRATED CIRCUIT DEVICES WITH STACKED PACKAGE INTERPOSERS
18
Patent #:
8566940
Issue Dt:
10/22/2013
Application #:
12625716
Filing Dt:
11/25/2009
Title:
AUTHENTICATED OPERATIONS AND EVENT COUNTERS
19
Patent #:
8093643
Issue Dt:
01/10/2012
Application #:
12626110
Filing Dt:
11/25/2009
Publication #:
US20100073993
Pub Dt:
03/25/2010
Title:
MULTI-RESISTIVE INTEGRATED CIRCUIT MEMORY
20
Patent #:
7960813
Issue Dt:
06/14/2011
Application #:
12626126
Filing Dt:
11/25/2009
Publication #:
US20100065806
Pub Dt:
03/18/2010
Title:
PROGRAMMABLE RESISTANCE MEMORY DEVICES AND SYSTEMS USING THE SAME AND METHODS OF FORMING THE SAME
21
Patent #:
8000152
Issue Dt:
08/16/2011
Application #:
12627077
Filing Dt:
11/30/2009
Publication #:
US20100074020
Pub Dt:
03/25/2010
Title:
CHARGE PUMP OPERATION IN A NON-VOLATILE MEMORY DEVICE
22
Patent #:
8093576
Issue Dt:
01/10/2012
Application #:
12627128
Filing Dt:
11/30/2009
Title:
CHEMICAL-MECHANICAL POLISH TERMINATION LAYER TO BUILD ELECTRICAL DEVICE ISOLATION
23
Patent #:
8085584
Issue Dt:
12/27/2011
Application #:
12627214
Filing Dt:
11/30/2009
Title:
MEMORY TO STORE USER-CONFIGURABLE DATA POLARITY
24
Patent #:
8063493
Issue Dt:
11/22/2011
Application #:
12627352
Filing Dt:
11/30/2009
Publication #:
US20100072603
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES
25
Patent #:
8470635
Issue Dt:
06/25/2013
Application #:
12627443
Filing Dt:
11/30/2009
Publication #:
US20110127485
Pub Dt:
06/02/2011
Title:
KEYHOLE-FREE SLOPED HEATER FOR PHASE CHANGE MEMORY
26
Patent #:
8223549
Issue Dt:
07/17/2012
Application #:
12627448
Filing Dt:
11/30/2009
Publication #:
US20100074021
Pub Dt:
03/25/2010
Title:
NAND FLASH MEMORY PROGRAMMING
27
Patent #:
8259526
Issue Dt:
09/04/2012
Application #:
12627768
Filing Dt:
11/30/2009
Publication #:
US20110029762
Pub Dt:
02/03/2011
Title:
SEMICONDUCTOR DEVICE PERFORMING SERIAL PARALLEL CONVERSION
28
Patent #:
8035160
Issue Dt:
10/11/2011
Application #:
12627869
Filing Dt:
11/30/2009
Publication #:
US20100072532
Pub Dt:
03/25/2010
Title:
RECESSED ACCESS DEVICE FOR A MEMORY
29
Patent #:
8451620
Issue Dt:
05/28/2013
Application #:
12627937
Filing Dt:
11/30/2009
Publication #:
US20110128711
Pub Dt:
06/02/2011
Title:
PACKAGE INCLUDING AN UNDERFILL MATERIAL IN A PORTION OF AN AREA BETWEEN THE PACKAGE AND A SUBSTRATE OR ANOTHER PACKAGE
30
Patent #:
8749074
Issue Dt:
06/10/2014
Application #:
12628006
Filing Dt:
11/30/2009
Publication #:
US20110127659
Pub Dt:
06/02/2011
Title:
PACKAGE INCLUDING AN INTERPOSER HAVING AT LEAST ONE TOPOLOGICAL FEATURE
31
Patent #:
8653675
Issue Dt:
02/18/2014
Application #:
12628042
Filing Dt:
11/30/2009
Publication #:
US20110127642
Pub Dt:
06/02/2011
Title:
PACKAGE INCLUDING AT LEAST ONE TOPOLOGICAL FEATURE ON AN ENCAPSULANT MATERIAL TO RESIST OUT-OF-PLANE DEFORMATION
32
Patent #:
8248851
Issue Dt:
08/21/2012
Application #:
12628073
Filing Dt:
11/30/2009
Title:
SYSTEM, APPARATUS, AND READING METHOD FOR NAND MEMORIES
33
Patent #:
8307151
Issue Dt:
11/06/2012
Application #:
12628152
Filing Dt:
11/30/2009
Title:
MULTI-PARTITIONING FEATURE ON E-MMC
34
Patent #:
8243497
Issue Dt:
08/14/2012
Application #:
12628153
Filing Dt:
11/30/2009
Title:
PHASE CHANGE MEMORY DEVICE WITH REDUCED PROGRAMMING DISTURBANCE
35
Patent #:
8392683
Issue Dt:
03/05/2013
Application #:
12628166
Filing Dt:
11/30/2009
Title:
DYNAMIC RANGE UNLOCK OR LOCK MEMORY DEVICE AND METHOD TO OPERATE THE SAME
36
Patent #:
8203876
Issue Dt:
06/19/2012
Application #:
12628522
Filing Dt:
12/01/2009
Publication #:
US20110128782
Pub Dt:
06/02/2011
Title:
REDUCING EFFECTS OF ERASE DISTURB IN A MEMORY DEVICE
37
Patent #:
7916204
Issue Dt:
03/29/2011
Application #:
12628709
Filing Dt:
12/01/2009
Publication #:
US20100073540
Pub Dt:
03/25/2010
Title:
MULTIPLE MICROLENS SYSTEM FOR IMAGE SENSORS OR DISPLAY UNITS
38
Patent #:
7808041
Issue Dt:
10/05/2010
Application #:
12628910
Filing Dt:
12/01/2009
Publication #:
US20100072557
Pub Dt:
03/25/2010
Title:
SEMICONDUCTOR CONSTRUCTIONS OF MEMORY DEVICE WITH DIFFERENT DEPTH GATE LINE TRENCHES
39
Patent #:
8030211
Issue Dt:
10/04/2011
Application #:
12629153
Filing Dt:
12/02/2009
Publication #:
US20100136787
Pub Dt:
06/03/2010
Title:
METHODS FOR FORMING BIT LINE CONTACTS AND BIT LINES DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
40
Patent #:
NONE
Issue Dt:
Application #:
12629722
Filing Dt:
12/02/2009
Publication #:
US20110129991
Pub Dt:
06/02/2011
Title:
Methods Of Patterning Materials, And Methods Of Forming Memory Cells
41
Patent #:
8144516
Issue Dt:
03/27/2012
Application #:
12630332
Filing Dt:
12/03/2009
Publication #:
US20110134697
Pub Dt:
06/09/2011
Title:
DYNAMIC PASS VOLTAGE FOR SENSE OPERATION IN A MEMORY DEVICE
42
Patent #:
7883907
Issue Dt:
02/08/2011
Application #:
12630676
Filing Dt:
12/03/2009
Publication #:
US20100073690
Pub Dt:
03/25/2010
Title:
PARAMETER MEASUREMENT USING MULTI-LAYER STRUCTURES
43
Patent #:
8243521
Issue Dt:
08/14/2012
Application #:
12631606
Filing Dt:
12/04/2009
Publication #:
US20110134701
Pub Dt:
06/09/2011
Title:
A METHOD FOR KINK COMPENSATION IN A MEMORY
44
Patent #:
8030156
Issue Dt:
10/04/2011
Application #:
12631664
Filing Dt:
12/04/2009
Publication #:
US20100081242
Pub Dt:
04/01/2010
Title:
METHODS OF FORMING DRAM ARRAYS
45
Patent #:
8004892
Issue Dt:
08/23/2011
Application #:
12632121
Filing Dt:
12/07/2009
Publication #:
US20100085807
Pub Dt:
04/08/2010
Title:
SINGLE LATCH DATA CIRCUIT IN A MULTIPLE LEVEL CELL NON-VOLATILE MEMORY DEVICE
46
Patent #:
8213226
Issue Dt:
07/03/2012
Application #:
12632394
Filing Dt:
12/07/2009
Publication #:
US20100142294
Pub Dt:
06/10/2010
Title:
VERTICAL TRANSISTOR MEMORY CELL AND ARRAY
47
Patent #:
7955976
Issue Dt:
06/07/2011
Application #:
12632595
Filing Dt:
12/07/2009
Publication #:
US20100087060
Pub Dt:
04/08/2010
Title:
METHODS OF FORMING SEMICONDUCTOR STRUCTURES
48
Patent #:
7876622
Issue Dt:
01/25/2011
Application #:
12633226
Filing Dt:
12/08/2009
Publication #:
US20100085808
Pub Dt:
04/08/2010
Title:
READ METHOD FOR MLC
49
Patent #:
8139419
Issue Dt:
03/20/2012
Application #:
12633239
Filing Dt:
12/08/2009
Publication #:
US20110134702
Pub Dt:
06/09/2011
Title:
PROGRAMMING METHODS AND MEMORIES
50
Patent #:
8026747
Issue Dt:
09/27/2011
Application #:
12633632
Filing Dt:
12/08/2009
Publication #:
US20100085095
Pub Dt:
04/08/2010
Title:
APPARATUS AND METHOD FOR MULTI-PHASE CLOCK GENERATION
51
Patent #:
8033884
Issue Dt:
10/11/2011
Application #:
12633674
Filing Dt:
12/08/2009
Publication #:
US20100102031
Pub Dt:
04/29/2010
Title:
METHODS OF FORMING PLASMA-GENERATING STRUCTURES; METHODS OF PLASMA-ASSISTED ETCHING, AND METHODS OF PLASMA-ASSISTED DEPOSITION
52
Patent #:
8030170
Issue Dt:
10/04/2011
Application #:
12633694
Filing Dt:
12/08/2009
Publication #:
US20110136319
Pub Dt:
06/09/2011
Title:
METHODS OF FORMING ISOLATION STRUCTURES, AND METHODS OF FORMING NONVOLATILE MEMORY
53
Patent #:
8082413
Issue Dt:
12/20/2011
Application #:
12634580
Filing Dt:
12/09/2009
Publication #:
US20100088483
Pub Dt:
04/08/2010
Title:
DETECTION CIRCUIT FOR MIXED ASYNCHRONOUS AND SYNCHRONOUS MEMORY OPERATION
54
Patent #:
7924337
Issue Dt:
04/12/2011
Application #:
12634883
Filing Dt:
12/10/2009
Publication #:
US20100091164
Pub Dt:
04/15/2010
Title:
DUAL PANEL PIXEL READOUT IN AN IMAGER
55
Patent #:
8148222
Issue Dt:
04/03/2012
Application #:
12635005
Filing Dt:
12/10/2009
Publication #:
US20110140195
Pub Dt:
06/16/2011
Title:
CROSS-POINT DIODE ARRAYS AND METHODS OF MANUFACTURING CROSS-POINT DIODE ARRAYS
56
Patent #:
9401745
Issue Dt:
07/26/2016
Application #:
12635961
Filing Dt:
12/11/2009
Title:
Wireless Communication Link Using Near Field Coupling
57
Patent #:
8208278
Issue Dt:
06/26/2012
Application #:
12637163
Filing Dt:
12/14/2009
Publication #:
US20100091544
Pub Dt:
04/15/2010
Title:
COUPLINGS WITHIN MEMORY DEVICES
58
Patent #:
8067133
Issue Dt:
11/29/2011
Application #:
12637604
Filing Dt:
12/14/2009
Publication #:
US20100092878
Pub Dt:
04/15/2010
Title:
PHASE SHIFT MASK WITH TWO-PHASE CLEAR FEATURE
59
Patent #:
8227313
Issue Dt:
07/24/2012
Application #:
12637989
Filing Dt:
12/15/2009
Publication #:
US20100091574
Pub Dt:
04/15/2010
Title:
ONE-TRANSISTOR COMPOSITE-GATE MEMORY
60
Patent #:
8767179
Issue Dt:
07/01/2014
Application #:
12638094
Filing Dt:
12/15/2009
Publication #:
US20110141443
Pub Dt:
06/16/2011
Title:
Imaging Methods In Scanning Photolithography And A Scanning Photolithography Device Used In Printing An Image Of A Reticle Onto A Photosensitive Substrate
61
Patent #:
7917709
Issue Dt:
03/29/2011
Application #:
12638572
Filing Dt:
12/15/2009
Publication #:
US20100095055
Pub Dt:
04/15/2010
Title:
MEMORY SYSTEM FOR DATA STORAGE AND RETRIEVAL
62
Patent #:
7872912
Issue Dt:
01/18/2011
Application #:
12638603
Filing Dt:
12/15/2009
Publication #:
US20100091565
Pub Dt:
04/15/2010
Title:
M+N BIT PROGRAMMING AND M+L BIT READ FOR M BIT MEMORY CELLS
63
Patent #:
9501705
Issue Dt:
11/22/2016
Application #:
12638751
Filing Dt:
12/15/2009
Publication #:
US20110145271
Pub Dt:
06/16/2011
Title:
METHODS AND APPARATUSES FOR REDUCING POWER CONSUMPTION IN A PATTERN RECOGNITION PROCESSOR
64
Patent #:
9323994
Issue Dt:
04/26/2016
Application #:
12638759
Filing Dt:
12/15/2009
Publication #:
US20110145544
Pub Dt:
06/16/2011
Title:
MULTI-LEVEL HIERARCHICAL ROUTING MATRICES FOR PATTERN-RECOGNITION PROCESSORS
65
Patent #:
8489534
Issue Dt:
07/16/2013
Application #:
12638767
Filing Dt:
12/15/2009
Publication #:
US20110145182
Pub Dt:
06/16/2011
Title:
ADAPTIVE CONTENT INSPECTION
66
Patent #:
9128762
Issue Dt:
09/08/2015
Application #:
12638950
Filing Dt:
12/15/2009
Publication #:
US20110145476
Pub Dt:
06/16/2011
Title:
PERSISTENT CONTENT IN NONVOLATILE MEMORY
67
Patent #:
9336410
Issue Dt:
05/10/2016
Application #:
12638953
Filing Dt:
12/15/2009
Publication #:
US20110145600
Pub Dt:
06/16/2011
Title:
NONVOLATILE MEMORY INTERNAL SIGNATURE GENERATION
68
Patent #:
8815667
Issue Dt:
08/26/2014
Application #:
12639158
Filing Dt:
12/16/2009
Publication #:
US20110140204
Pub Dt:
06/16/2011
Title:
TRANSISTORS WITH AN EXTENSION REGION HAVING STRIPS OF DIFFERING CONDUCTIVITY TYPE AND METHODS OF FORMING THE SAME
69
Patent #:
8324676
Issue Dt:
12/04/2012
Application #:
12639223
Filing Dt:
12/16/2009
Publication #:
US20100091577
Pub Dt:
04/15/2010
Title:
MEMORY CELL STORAGE NODE LENGTH
70
Patent #:
8310893
Issue Dt:
11/13/2012
Application #:
12639547
Filing Dt:
12/16/2009
Publication #:
US20110141836
Pub Dt:
06/16/2011
Title:
TECHNIQUES FOR REDUCING IMPACT OF ARRAY DISTURBS IN A SEMICONDUCTOR MEMORY DEVICE
71
Patent #:
8996836
Issue Dt:
03/31/2015
Application #:
12641520
Filing Dt:
12/18/2009
Publication #:
US20110148469
Pub Dt:
06/23/2011
Title:
STACKED DEVICE DETECTION AND IDENTIFICATION
72
Patent #:
8022536
Issue Dt:
09/20/2011
Application #:
12642356
Filing Dt:
12/18/2009
Publication #:
US20100096761
Pub Dt:
04/22/2010
Title:
SEMICONDUCTOR SUBSTRATE FOR BUILD-UP PACKAGES
73
Patent #:
7852112
Issue Dt:
12/14/2010
Application #:
12643835
Filing Dt:
12/21/2009
Publication #:
US20100097095
Pub Dt:
04/22/2010
Title:
ON-DIE SYSTEM AND METHOD FOR CONTROLLING TERMINATION IMPEDANCE OF MEMORY DEVICE DATA BUS TERMINALS
74
Patent #:
7923364
Issue Dt:
04/12/2011
Application #:
12644250
Filing Dt:
12/22/2009
Publication #:
US20100099235
Pub Dt:
04/22/2010
Title:
TUNNEL DIELECTRIC COMPRISING NITROGEN FOR USE WITH A SEMICONDUCTOR DEVICE AND A PROCESS FOR FORMING THE DEVICE
75
Patent #:
8369158
Issue Dt:
02/05/2013
Application #:
12646136
Filing Dt:
12/23/2009
Publication #:
US20110149659
Pub Dt:
06/23/2011
Title:
ERASE OPERATIONS AND APPARATUS FOR A MEMORY DEVICE
76
Patent #:
8034728
Issue Dt:
10/11/2011
Application #:
12646246
Filing Dt:
12/23/2009
Publication #:
US20100099272
Pub Dt:
04/22/2010
Title:
SYSTEMS AND METHODS FOR FORMING METAL OXIDES USING METAL DIKETONATES AND/OR KETOIMINES
77
Patent #:
8847195
Issue Dt:
09/30/2014
Application #:
12647020
Filing Dt:
12/24/2009
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Assignor
1
MICRON TECHNOLOGY, INC.
Exec Dt:
04/26/2016
Assignee
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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