|
|
Patent #:
|
|
Issue Dt:
|
06/23/2015
|
Application #:
|
13757290
|
Filing Dt:
|
02/01/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
HIGH-K DIELECTRICS WITH GOLD NANO-PARTICLES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2013
|
Application #:
|
13757295
|
Filing Dt:
|
02/01/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
PARTITIONED THROUGH-LAYER VIA AND ASSOCIATED SYSTEMS AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2014
|
Application #:
|
13757358
|
Filing Dt:
|
02/01/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
MULTIPLE-LEVEL MEMORY CELLS AND ERROR DETECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
03/04/2014
|
Application #:
|
13757432
|
Filing Dt:
|
02/01/2013
|
Publication #:
|
|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
ERROR CORRECTION AND RECOVERY IN CHAINED MEMORY ARCHITECTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13758379
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
04/30/2015
| | | | |
Title:
|
METHODS FOR PROGRAMMING A MEMORY DEVICE AND MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
13758401
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
08/22/2013
| | | | |
Title:
|
SOLID STATE LIGHTING DEVICES WITH SEMI-POLAR FACETS AND ASSOCIATED METHODS OF MANUFACTURING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/09/2016
|
Application #:
|
13758577
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
APPARATUSES AND RELATED METHODS FOR OVERFLOW DETECTION AND CLAMPING WITH PARALLEL OPERAND PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
02/04/2014
|
Application #:
|
13758610
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
INPUT-OUTPUT LINE SENSE AMPLIFIER HAVING ADJUSTABLE OUTPUT DRIVE CAPABILITY
|
|
|
Patent #:
|
|
Issue Dt:
|
03/18/2014
|
Application #:
|
13758616
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
MAJORITY DETECTOR APPARATUS, SYSTEMS, AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2015
|
Application #:
|
13758625
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
STRUCTURES COMPRISING MASKS COMPRISING CARBON
|
|
|
Patent #:
|
|
Issue Dt:
|
04/26/2016
|
Application #:
|
13758667
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
APPARATUSES AND METHODS FOR TARGETED REFRESHING OF MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2014
|
Application #:
|
13758765
|
Filing Dt:
|
02/04/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
SYSTEM AND METHOD FOR MANAGING SELF-REFRESH IN A MULTI-RANK MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2015
|
Application #:
|
13759627
|
Filing Dt:
|
02/05/2013
|
Publication #:
|
|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
3-D MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/28/2020
|
Application #:
|
13759707
|
Filing Dt:
|
02/05/2013
|
Publication #:
|
|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
Methods of Forming Memory and Methods of Forming Vertically-Stacked Structures
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2016
|
Application #:
|
13759716
|
Filing Dt:
|
02/05/2013
|
Publication #:
|
|
Pub Dt:
|
06/06/2013
| | | | |
Title:
|
MEMORY DEVICE AND METHOD HAVING CHARGE LEVEL ASSIGNMENTS SELECTED TO MINIMIZE SIGNAL COUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
01/24/2017
|
Application #:
|
13761570
|
Filing Dt:
|
02/07/2013
|
Publication #:
|
|
Pub Dt:
|
08/07/2014
| | | | |
Title:
|
Arrays Of Memory Cells And Methods Of Forming An Array Of Memory Cells
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13761587
|
Filing Dt:
|
02/07/2013
|
Publication #:
|
|
Pub Dt:
|
02/20/2014
| | | | |
Title:
|
FLOATING BODY FIELD-EFFECT TRANSISTORS, AND METHODS OF FORMING FLOATING BODY FIELD-EFFECT TRANSISTORS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/28/2015
|
Application #:
|
13761609
|
Filing Dt:
|
02/07/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
Methods Of Forming Memory Cells, And Methods Of Patterning Chalcogenide-Containing Stacks
|
|
|
Patent #:
|
|
Issue Dt:
|
07/15/2014
|
Application #:
|
13762559
|
Filing Dt:
|
02/08/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
SENSE OPERATION IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13762874
|
Filing Dt:
|
02/08/2013
|
Publication #:
|
|
Pub Dt:
|
12/19/2013
| | | | |
Title:
|
METHOD FOR READING A MULTILEVEL CELL IN A NON-VOLATILE MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13763092
|
Filing Dt:
|
02/08/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
RETICLES WITH SUBDIVIDED BLOCKING REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
|
Application #:
|
13763662
|
Filing Dt:
|
02/09/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
Methods of Forming Graphene-Containing Switches
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13763664
|
Filing Dt:
|
02/09/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
MEMORY CELL CONSTRUCTIONS, AND METHODS FOR FABRICATING MEMORY CELL CONSTRUCTIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13764213
|
Filing Dt:
|
02/11/2013
|
Publication #:
|
|
Pub Dt:
|
06/13/2013
| | | | |
Title:
|
CLUSTER BASED NON-VOLATILE MEMORY TRANSLATION LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13765643
|
Filing Dt:
|
02/12/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
SEMICONDUCTOR CONSTRUCTIONS, NAND UNIT CELLS, METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS, AND METHODS OF FORMING NAND UNIT CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/11/2014
|
Application #:
|
13766970
|
Filing Dt:
|
02/14/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
PHOTONIC SYSTEMS AND METHODS OF FORMING PHOTONIC SYSTEMS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
13767389
|
Filing Dt:
|
02/14/2013
|
Publication #:
|
|
Pub Dt:
|
08/14/2014
| | | | |
Title:
|
AUTORECOVERY AFTER MANUFACTURING/SYSTEM INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
12/16/2014
|
Application #:
|
13767526
|
Filing Dt:
|
02/14/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
APPARATUS AND METHODS FOR CAPACITIVELY COUPLED PLASMA VAPOR PROCESSING OF SEMICONDUCTOR WAFERS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/07/2014
|
Application #:
|
13768203
|
Filing Dt:
|
02/15/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
MEMORY CONTROLLER ECC
|
|
|
Patent #:
|
|
Issue Dt:
|
11/26/2013
|
Application #:
|
13769461
|
Filing Dt:
|
02/18/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
PATTERNED SEMICONDUCTOR BASES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13769473
|
Filing Dt:
|
02/18/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
METHODS OF FORMING OPENINGS AND METHODS OF PATTERNING A MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13769656
|
Filing Dt:
|
02/18/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE ISOLATION STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
05/27/2014
|
Application #:
|
13770059
|
Filing Dt:
|
02/19/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
MEMORY CONTROLLERS TO OUTPUT DATA SIGNALS OF A NUMBER OF BITS AND TO RECEIVE DATA SIGNALS OF A DIFFERENT NUMBER OF BITS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13770427
|
Filing Dt:
|
02/19/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
METHOD OF PROCESSING DATA PACKETS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/22/2016
|
Application #:
|
13770669
|
Filing Dt:
|
02/19/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
METHODS AND APPARATUS FOR SORTING AND/OR DEPOSITING NANOTUBES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/02/2014
|
Application #:
|
13770881
|
Filing Dt:
|
02/19/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
METHOD OF USING MEMORY INSTRUCTION INCLUDING PARAMETER TO AFFECT OPERATING CONDITION OF MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/2016
|
Application #:
|
13771117
|
Filing Dt:
|
02/20/2013
|
Publication #:
|
|
Pub Dt:
|
06/20/2013
| | | | |
Title:
|
INTEGRATED CIRCUITS AND METHODS OF FORMING CONDUCTIVE LINES AND CONDUCTIVE PADS THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13771440
|
Filing Dt:
|
02/20/2013
|
Title:
|
THROUGH WIRE INTERCONNECT (TWI) HAVING BONDED CONNECTION AND ENCAPSULATING POLYMER LAYER
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2016
|
Application #:
|
13771787
|
Filing Dt:
|
02/20/2013
|
Publication #:
|
|
Pub Dt:
|
08/21/2014
| | | | |
Title:
|
APPARATUSES AND METHODS FOR CONVERTING SINGLE INPUT VOLTAGE REGULATORS TO DUAL INPUT VOLTAGE REGULATORS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/10/2015
|
Application #:
|
13771838
|
Filing Dt:
|
02/20/2013
|
Publication #:
|
|
Pub Dt:
|
08/21/2014
| | | | |
Title:
|
APPARATUSES AND METHODS FOR COMPRESSING DATA RECEIVED OVER MULTIPLE MEMORY ACCESSES
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2018
|
Application #:
|
13771877
|
Filing Dt:
|
02/20/2013
|
Publication #:
|
|
Pub Dt:
|
08/21/2014
| | | | |
Title:
|
APPARATUSES AND METHODS FOR REMOVING DEFECTIVE ENERGY STORAGE CELLS FROM AN ENERGY STORAGE ARRAY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13773905
|
Filing Dt:
|
02/22/2013
|
Publication #:
|
|
Pub Dt:
|
07/04/2013
| | | | |
Title:
|
INSERTS FOR DIRECTING MOLDING COMPOUND FLOW AND SEMICONDUCTOR DIE ASSEMBLIES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/19/2017
|
Application #:
|
13774313
|
Filing Dt:
|
02/22/2013
|
Publication #:
|
|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
METHODS, DEVICES, AND SYSTEMS RELATED TO FORMING SEMICONDUCTOR POWER DEVICES WITH A HANDLE SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
01/12/2016
|
Application #:
|
13774502
|
Filing Dt:
|
02/22/2013
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
LIGHT EMITTING DIODES WITH ENHANCED THERMAL SINKING AND ASSOCIATED METHODS OF OPERATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/18/2015
|
Application #:
|
13774522
|
Filing Dt:
|
02/22/2013
|
Publication #:
|
|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
INTERCONNECTIONS FOR 3D MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/30/2016
|
Application #:
|
13774553
|
Filing Dt:
|
02/22/2013
|
Title:
|
NEURAL NETWORK IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13774599
|
Filing Dt:
|
02/22/2013
|
Publication #:
|
|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
SEMICONDUCTOR DEVICES INCLUDING WISX
|
|
|
Patent #:
|
|
Issue Dt:
|
05/17/2016
|
Application #:
|
13774636
|
Filing Dt:
|
02/22/2013
|
Title:
|
MEMORY AS A PROGRAMMABLE LOGIC DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/08/2018
|
Application #:
|
13774688
|
Filing Dt:
|
02/22/2013
|
Title:
|
MEMORY DEVICE HAVING A CONTROLLER TO ENABLE AND DISABLE MODE CONTROL CIRCUITRY OF THE CONTROLLER
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13774772
|
Filing Dt:
|
02/22/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
PLASMA REACTOR WITH ADJUSTABLE PLASMA ELECTRODES AND ASSOCIATED METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/08/2014
|
Application #:
|
13775503
|
Filing Dt:
|
02/25/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
PROGRAMMING TO MITIGATE MEMORY CELL PERFORMANCE DIFFERENCES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13775523
|
Filing Dt:
|
02/25/2013
|
Publication #:
|
|
Pub Dt:
|
06/27/2013
| | | | |
Title:
|
MULTI-PASS PROGRAMMING IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13775645
|
Filing Dt:
|
02/25/2013
|
Publication #:
|
|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
METHODS AND APPARATUS FOR DESIGNATING OR USING DATA STATUS INDICATORS
|
|
|
Patent #:
|
|
Issue Dt:
|
05/26/2015
|
Application #:
|
13775868
|
Filing Dt:
|
02/25/2013
|
Publication #:
|
|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
APPARATUSES, SENSE CIRCUITS, AND METHODS FOR COMPENSATING FOR A WORDLINE VOLTAGE INCREASE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/15/2014
|
Application #:
|
13776418
|
Filing Dt:
|
02/25/2013
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
ENHANCED MULTILEVEL MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
10/20/2015
|
Application #:
|
13776485
|
Filing Dt:
|
02/25/2013
|
Publication #:
|
|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
APPARATUSES INCLUDING ELECTRODES HAVING A CONDUCTIVE BARRIER MATERIAL AND METHODS OF FORMING SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13776836
|
Filing Dt:
|
02/26/2013
|
Publication #:
|
|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
PHOTONIC DEVICE STRUCTURE AND METHOD OF MANUFACTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2013
|
Application #:
|
13777083
|
Filing Dt:
|
02/26/2013
|
Publication #:
|
|
Pub Dt:
|
07/04/2013
| | | | |
Title:
|
ARRAYS OF VERTICALLY STACKED TIERS OF NON-VOLATILE CROSS POINT MEMORY CELLS, METHODS OF FORMING ARRAYS OF VERTICALLY STACKED TIERS OF NON-VOLATILE CROSS POINT MEMORY CELLS, AND METHODS OF READING A DATA VALUE STORED BY AN ARRAY OF VERTICALLY STACKED TIERS OF NON-VOLATILE CROSS POINT MEMORY CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
01/13/2015
|
Application #:
|
13777803
|
Filing Dt:
|
02/26/2013
|
Publication #:
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Pub Dt:
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07/04/2013
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Title:
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METHODS FOR ISOLATING PORTIONS OF A LOOP OF PITCH-MULTIPLIED MATERIAL AND RELATED STRUCTURES
|
|
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Patent #:
|
|
Issue Dt:
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12/29/2015
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Application #:
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13777811
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Filing Dt:
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02/26/2013
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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CONNECTIONS FOR MEMORY ELECTRODE LINES
|
|
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Patent #:
|
|
Issue Dt:
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11/11/2014
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Application #:
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13777890
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Filing Dt:
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02/26/2013
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Publication #:
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Pub Dt:
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07/25/2013
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Title:
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HYBRID ELECTRICAL CONTACTS
|
|
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Patent #:
|
|
Issue Dt:
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03/10/2015
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Application #:
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13779381
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Filing Dt:
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02/27/2013
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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REARRANGING WRITE DATA TO AVOID HARD ERRORS
|
|
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Patent #:
|
|
Issue Dt:
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03/03/2015
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Application #:
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13780136
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Filing Dt:
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02/28/2013
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
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METHOD FOR FORMING A LIGHT CONVERSION MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
07/14/2015
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Application #:
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13780499
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Filing Dt:
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02/28/2013
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Publication #:
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Pub Dt:
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08/28/2014
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Title:
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DUAL MAPPING BETWEEN PROGRAM STATES AND DATA PATTERNS
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
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Application #:
|
13780533
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Filing Dt:
|
02/28/2013
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Publication #:
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Pub Dt:
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07/04/2013
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Title:
|
SYSTEMS AND METHODS TO SELECTIVELY CONNECT ANTENNAS TO RECEIVE AND BACKSCATTER RADIO FREQUENCY SIGNALS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
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Application #:
|
13780626
|
Filing Dt:
|
02/28/2013
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Publication #:
|
|
Pub Dt:
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08/28/2014
| | | | |
Title:
|
LOADING TRIM ADDRESS AND TRIM DATA PAIRS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/21/2015
|
Application #:
|
13780726
|
Filing Dt:
|
02/28/2013
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Publication #:
|
|
Pub Dt:
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08/28/2014
| | | | |
Title:
|
CODEWORDS THAT SPAN PAGES OF MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2015
|
Application #:
|
13781016
|
Filing Dt:
|
02/28/2013
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Publication #:
|
|
Pub Dt:
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08/28/2014
| | | | |
Title:
|
SUB-BLOCK DECODING IN 3D MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
05/20/2014
|
Application #:
|
13781027
|
Filing Dt:
|
02/28/2013
|
Publication #:
|
|
Pub Dt:
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07/11/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE STRUCTURES AND MEMORY DEVICES INCLUDING A UNIFORM PATTERN OF CONDUCTIVE MATERIAL
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13781097
|
Filing Dt:
|
02/28/2013
|
Publication #:
|
|
Pub Dt:
|
08/28/2014
| | | | |
Title:
|
SUB-BLOCK DISABLING IN 3D MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
09/10/2013
|
Application #:
|
13781457
|
Filing Dt:
|
02/28/2013
|
Publication #:
|
|
Pub Dt:
|
08/01/2013
| | | | |
Title:
|
Memory Arrays and Methods of Forming Memory Cells
|
|
|
Patent #:
|
|
Issue Dt:
|
02/18/2014
|
Application #:
|
13781523
|
Filing Dt:
|
02/28/2013
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
Integrated Circuitry, Methods of Forming Memory Cells, and Methods of Patterning Platinum-Containing Material
|
|
|
Patent #:
|
|
Issue Dt:
|
10/01/2013
|
Application #:
|
13781862
|
Filing Dt:
|
03/01/2013
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
METHODS OF FABRICATING A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
06/10/2014
|
Application #:
|
13782300
|
Filing Dt:
|
03/01/2013
|
Publication #:
|
|
Pub Dt:
|
02/06/2014
| | | | |
Title:
|
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2014
|
Application #:
|
13782792
|
Filing Dt:
|
03/01/2013
|
Publication #:
|
|
Pub Dt:
|
09/04/2014
| | | | |
Title:
|
VERTICAL ACCESS DEVICE AND APPARATUSES HAVING A BODY CONNECTION LINE, AND RELATED METHOD OF OPERATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/2015
|
Application #:
|
13783035
|
Filing Dt:
|
03/01/2013
|
Publication #:
|
|
Pub Dt:
|
09/04/2014
| | | | |
Title:
|
CIRCUITS, APPARATUSES, AND METHODS FOR ADDRESS SCRAMBLING
|
|
|
Patent #:
|
|
Issue Dt:
|
12/13/2016
|
Application #:
|
13783884
|
Filing Dt:
|
03/04/2013
|
Publication #:
|
|
Pub Dt:
|
09/04/2014
| | | | |
Title:
|
CLAMP ELEMENTS FOR PHASE CHANGE MEMORY ARRAYS
|
|
|
Patent #:
|
|
Issue Dt:
|
04/18/2017
|
Application #:
|
13783971
|
Filing Dt:
|
03/04/2013
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
SOLID STATE MEMORY FORMATTING
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/2015
|
Application #:
|
13784219
|
Filing Dt:
|
03/04/2013
|
Publication #:
|
|
Pub Dt:
|
09/04/2014
| | | | |
Title:
|
APPARATUSES AND METHODS FOR PERFORMING LOGICAL OPERATIONS USING SENSING CIRCUITRY
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2014
|
Application #:
|
13784353
|
Filing Dt:
|
03/04/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
REGISTERED STRUCTURE FORMATION VIA THE APPLICATION OF DIRECTED THERMAL ENERGY TO DIBLOCK COPOLYMER FILMS
|
|
|
Patent #:
|
|
Issue Dt:
|
12/17/2013
|
Application #:
|
13784468
|
Filing Dt:
|
03/04/2013
|
Publication #:
|
|
Pub Dt:
|
07/18/2013
| | | | |
Title:
|
PROFILING SOLID STATE SAMPLES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/24/2015
|
Application #:
|
13784510
|
Filing Dt:
|
03/04/2013
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
MEMORY DEVICES AND METHODS FOR MANAGING ERROR REGIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
11/04/2014
|
Application #:
|
13784526
|
Filing Dt:
|
03/04/2013
|
Publication #:
|
|
Pub Dt:
|
07/11/2013
| | | | |
Title:
|
SYSTEM AND METHOD FOR READ SYNCHRONIZATION OF MEMORY MODULES
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13785210
|
Filing Dt:
|
03/05/2013
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
MEMORY DEVICES WITH DIFFERENT SIZED BLOCKS OF MEMORY CELLS AND METHODS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13785668
|
Filing Dt:
|
03/05/2013
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
MEMORY CONTROLLERS INCLUDING TEST MODE ENGINES AND METHODS FOR REPAIR OF MEMORY OVER BUSSES USED DURING NORMAL OPERATION OF THE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
01/20/2015
|
Application #:
|
13786848
|
Filing Dt:
|
03/06/2013
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
METHODS OF FORMING A PATTERN ON A SUBSTRATE
|
|
|
Patent #:
|
|
Issue Dt:
|
11/12/2013
|
Application #:
|
13786889
|
Filing Dt:
|
03/06/2013
|
Publication #:
|
|
Pub Dt:
|
08/01/2013
| | | | |
Title:
|
MEMORY DEVICES AND METHODS OF FORMING MEMORY DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
10/14/2014
|
Application #:
|
13787475
|
Filing Dt:
|
03/06/2013
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
APPARATUSES AND METHOD FOR SHIFTING A VOLTAGE LEVEL
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2015
|
Application #:
|
13789305
|
Filing Dt:
|
03/07/2013
|
Publication #:
|
|
Pub Dt:
|
07/18/2013
| | | | |
Title:
|
SEMICONDUCTOR DEVICE HAVING BACKSIDE REDISTRIBUTION LAYERS AND METHOD FOR FABRICATING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
05/06/2014
|
Application #:
|
13790393
|
Filing Dt:
|
03/08/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
COMPENSATION OF BACK PATTERN EFFECT IN A MEMORY DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
05/05/2015
|
Application #:
|
13793036
|
Filing Dt:
|
03/11/2013
|
Publication #:
|
|
Pub Dt:
|
10/03/2013
| | | | |
Title:
|
MANAGING DEFECTIVE AREAS OF MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2014
|
Application #:
|
13793150
|
Filing Dt:
|
03/11/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
CROSS-POINT MEMORY UTILIZING RU/SI DIODE
|
|
|
Patent #:
|
|
Issue Dt:
|
04/01/2014
|
Application #:
|
13793258
|
Filing Dt:
|
03/11/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
MULTI-SEMICONDUCTOR MATERIAL VERTICAL MEMORY STRINGS, STRINGS OF MEMORY CELLS HAVING INDIVIDUALLY BIASABLE CHANNEL REGIONS, MEMORY ARRAYS INCORPORATING SUCH STRINGS, AND METHODS OF ACCESSSING AND FORMING THE SAME
|
|
|
Patent #:
|
|
Issue Dt:
|
11/17/2015
|
Application #:
|
13793347
|
Filing Dt:
|
03/11/2013
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
APPARATUSES AND METHODS FOR A MEMORY DIE ARCHITECTURE INCLUDING AN INTERFACE MEMORY
|
|
|
Patent #:
|
|
Issue Dt:
|
12/23/2014
|
Application #:
|
13793627
|
Filing Dt:
|
03/11/2013
|
Publication #:
|
|
Pub Dt:
|
09/11/2014
| | | | |
Title:
|
APPARATUSES, METHODS, AND CIRCUITS INCLUDING A DELAY CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
09/30/2014
|
Application #:
|
13794084
|
Filing Dt:
|
03/11/2013
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
METHOD FOR FORMING FINE PITCH STRUCTURES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/05/2017
|
Application #:
|
13794471
|
Filing Dt:
|
03/11/2013
|
Publication #:
|
|
Pub Dt:
|
05/01/2014
| | | | |
Title:
|
APPARATUSES AND METHODS FOR MEMORY OPERATIONS HAVING VARIABLE LATENCIES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2016
|
Application #:
|
13795425
|
Filing Dt:
|
03/12/2013
|
Publication #:
|
|
Pub Dt:
|
09/18/2014
| | | | |
Title:
|
APPARATUSES AND METHOD FOR OVER-VOLTAGE EVENT PROTECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
01/19/2016
|
Application #:
|
13795927
|
Filing Dt:
|
03/12/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
METHODS OF FORMING NANOSCALE FLOATING GATE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/06/2015
|
Application #:
|
13796410
|
Filing Dt:
|
03/12/2013
|
Publication #:
|
|
Pub Dt:
|
07/25/2013
| | | | |
Title:
|
ENHANCED PERFORMANCE MEMORY SYSTEMS AND METHODS
|
|