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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
05/15/2001
Application #:
09082138
Filing Dt:
05/20/1998
Title:
SELF-LIMITING METHOD OF REDUCING CONTAMINATION IN A CONTACT OPENING, METHOD OF MAKING CONTACTS AND SEMICONDUCTOR DEVICES THEREWITH, AND RESULTING STRUCTURES
2
Patent #:
Issue Dt:
11/23/1999
Application #:
09082752
Filing Dt:
05/21/1998
Title:
METHOD OF MAKING AN ANTIREFLECTIVE STRUCTURE
3
Patent #:
Issue Dt:
02/20/2001
Application #:
09082953
Filing Dt:
05/21/1998
Title:
INTEGRATED HEAT SINK
4
Patent #:
Issue Dt:
04/18/2000
Application #:
09083093
Filing Dt:
05/22/1998
Title:
METHOD AND APPARATUS FOR TRANSLATING SIGNALS
5
Patent #:
Issue Dt:
07/04/2000
Application #:
09083258
Filing Dt:
05/21/1998
Title:
METHOD OF PROCESSING INTERNAL SURFACES OF A CHEMICAL VAPOR DEPOSITION REACTOR
6
Patent #:
Issue Dt:
12/02/2003
Application #:
09083447
Filing Dt:
05/22/1998
Title:
DIFFRACTION TOMOGRAPHY FOR MONITORING LATENT IMAGE FORMATION
7
Patent #:
Issue Dt:
02/22/2000
Application #:
09083606
Filing Dt:
05/22/1998
Title:
SEMICONDUCTOR MEMORY WITH LOCAL PHASE GENERATION FROM GLOBAL PHASE SIGNALS AND LOCAL ISOLATION SIGNALS
8
Patent #:
Issue Dt:
04/24/2001
Application #:
09083624
Filing Dt:
05/22/1998
Title:
METHOD OF JOINTLY FORMING STACKED CAPACITORS AND ANTIFUSES, METHOD OF BLOWING ANTIFUSES, AND ANTIFUSES AND STACKED CAPACITORS CONSTITUTING A PART OF INTEGRATED CIRCUITRY
9
Patent #:
Issue Dt:
10/31/2000
Application #:
09083629
Filing Dt:
05/22/1998
Title:
SEMICONDUCTOR WAFER PROCESSING METHOD
10
Patent #:
Issue Dt:
04/02/2002
Application #:
09083716
Filing Dt:
05/22/1998
Title:
VERIFICATION OF SENSITIVITY LIST INTEGRITY IN A HARDWARE DESCRIPTION LANGUAGE FILE
11
Patent #:
Issue Dt:
01/04/2000
Application #:
09083764
Filing Dt:
05/22/1998
Title:
PLASMA ETCHING METHODS
12
Patent #:
Issue Dt:
04/11/2000
Application #:
09083830
Filing Dt:
05/22/1998
Title:
METHOD AND APPARATUS FOR GENERATING MEMORY ADDRESSES FOR TESTING MEMORY DEVICES
13
Patent #:
Issue Dt:
12/19/2000
Application #:
09083956
Filing Dt:
05/22/1998
Title:
METHOD AND CIRCUIT FOR COMPRESSING TEST DATA IN A MEMORY DEVICE
14
Patent #:
Issue Dt:
07/04/2000
Application #:
09084458
Filing Dt:
05/26/1998
Title:
METHOD OF PATTERNING A SEMICONDUCTOR DEVICE
15
Patent #:
Issue Dt:
07/25/2000
Application #:
09084673
Filing Dt:
05/26/1998
Title:
LOADING PROCESS TO PROVIDE IMPROVED VACUUM ENVIRONMENT
16
Patent #:
Issue Dt:
05/29/2001
Application #:
09084732
Filing Dt:
05/26/1998
Title:
CALIBRATION TARGET FOR CALIBRATING SEMICONDUCTOR WAFER TEST SYSTEMS
17
Patent #:
Issue Dt:
08/22/2000
Application #:
09085494
Filing Dt:
05/27/1998
Title:
METHOD OF RESIST STRIPPING DURING SEMICONDUCTOR DEVICE FABRICATION
18
Patent #:
Issue Dt:
10/12/1999
Application #:
09085779
Filing Dt:
05/28/1998
Title:
CHASSIS FOR ELECTRONIC COMPONENTS
19
Patent #:
Issue Dt:
05/02/2000
Application #:
09086017
Filing Dt:
05/28/1998
Title:
METHOD AND APPARATUS FOR A CHARGE CONSERVING DRIVER CIRCUIT FOR CAPACITIVE LOADS
20
Patent #:
Issue Dt:
11/09/1999
Application #:
09086330
Filing Dt:
05/28/1998
Title:
PARALLEL ACCESS TESTING OF A MEMORY ARRAY
21
Patent #:
Issue Dt:
06/01/1999
Application #:
09086377
Filing Dt:
05/28/1998
Title:
DUAL-MASKED FIELD ISOLATION
22
Patent #:
Issue Dt:
07/17/2001
Application #:
09087114
Filing Dt:
05/29/1998
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY MEMORY DEVICES, METHODS OF FORMING CAPACITOR CONTAINERS, METHODS OF MAKING ELECTRICAL CONNECTION TO CIRCUIT NODES AND RELATED INTEGRATED CIRCUITRY
23
Patent #:
Issue Dt:
11/30/1999
Application #:
09087399
Filing Dt:
05/29/1998
Title:
CIRCUIT AND METHOD FOR READING A MEMORY CELL
24
Patent #:
Issue Dt:
02/15/2000
Application #:
09087473
Filing Dt:
05/29/1998
Title:
ALTERNATE METHOD AND STRUCTURE FOR IMPROVED FLOATING GATE TUNNELING DEVICES
25
Patent #:
Issue Dt:
10/12/1999
Application #:
09087478
Filing Dt:
05/29/1998
Title:
METHOD AND DEVICE FOR THE FILTERING OF A PULSE SIGNAL
26
Patent #:
Issue Dt:
11/09/1999
Application #:
09087480
Filing Dt:
05/29/1998
Title:
METHOD FOR FORMING HIGH CAPACITANCE MEMORY CELLS
27
Patent #:
Issue Dt:
06/05/2001
Application #:
09087539
Filing Dt:
05/29/1998
Title:
METHOD AND STRUCTURE FOR TEXTURED SURFACES IN FLOATING GATE TUNNELING OXIDE DEVICES
28
Patent #:
Issue Dt:
07/13/1999
Application #:
09087720
Filing Dt:
05/29/1998
Title:
DIRECT LOGICAL BLOCK ADDRESSING FLASH MEMORY MASS STORAGE ARCHITECTURE
29
Patent #:
Issue Dt:
08/08/2000
Application #:
09087753
Filing Dt:
05/29/1998
Title:
SILICON WAFER TESTING RIG AND A METHOD FOR TESTING A SILICON WAFER WHEREIN THE SILICON WAFER IS BENT INTO A DOME SHAPE
30
Patent #:
Issue Dt:
06/05/2001
Application #:
09088322
Filing Dt:
06/01/1998
Title:
METHOD FOR IMPROVING A STEPPER SIGNAL IN A PLANARIZED SURFACE OVER ALIGNMENT TOPOGRAPHY
31
Patent #:
Issue Dt:
11/14/2000
Application #:
09089864
Filing Dt:
06/03/1998
Title:
METHOD FOR CALIBRATING ROTARY ENCODER WITH MULTIPLE CALIBRATION POINTS
32
Patent #:
Issue Dt:
02/06/2001
Application #:
09089985
Filing Dt:
06/03/1998
Title:
ROTARY ENCODER WITH MULTIPLE CALIBRATION POINTS
33
Patent #:
Issue Dt:
04/06/1999
Application #:
09090258
Filing Dt:
06/04/1998
Title:
METHOD AND APPARATUS FOR GLOBAL TESTING THE IMPEDANCE OF A PROGRAMMABLE ELEMENT
34
Patent #:
Issue Dt:
09/05/2000
Application #:
09090964
Filing Dt:
06/04/1998
Title:
GETTERING REGIONS AND METHODS OF FORMING GETTERING REGIONS WITHIN A SEMICONDUCTOR WAFER
35
Patent #:
Issue Dt:
07/04/2000
Application #:
09090966
Filing Dt:
06/04/1998
Title:
ASSEMBLY AID FOR MOUNTING PACKAGED INTEGRATED CIRCUIT DEVICES TO PRINTED CIRCUIT BOARDS
36
Patent #:
Issue Dt:
02/08/2000
Application #:
09092322
Filing Dt:
06/05/1998
Title:
METHOD AND APPARATUS FOR GENERATING A SIGNAL WITH A VOLTAGE INSENSITIVE OR CONTROLLED DELAY
37
Patent #:
Issue Dt:
11/02/1999
Application #:
09092392
Filing Dt:
06/05/1998
Title:
VOLTAGE-DEPENDENT DELAY
38
Patent #:
Issue Dt:
04/10/2001
Application #:
09092460
Filing Dt:
06/05/1998
Title:
METHOD FOR READ ONLY MEMORY SHADOWING
39
Patent #:
Issue Dt:
03/28/2000
Application #:
09092524
Filing Dt:
06/05/1998
Title:
TRAP AND DELAY PULSE GENERATOR FOR A HIGH SPEED CLOCK
40
Patent #:
Issue Dt:
11/04/2003
Application #:
09092543
Filing Dt:
06/05/1998
Title:
METHOD FOR APPLYING A FLUID TO A ROTATING SILICON WAFER SURFACE
41
Patent #:
Issue Dt:
06/11/2002
Application #:
09092548
Filing Dt:
06/05/1998
Title:
PACKET-ORIENTED SYNCHRONOUS DRAM INTERFACE SUPPORTING A PLURALITY OF ORDERINGS FOR DATA BLOCK TRANSFERS WITHIN A BURST SEQUENCE
42
Patent #:
Issue Dt:
04/25/2000
Application #:
09092559
Filing Dt:
06/05/1998
Title:
METHOD AND CIRCUIT FOR SENDING A SIGNAL IN A SEMICONDUCTOR DEVICE DURING A SETUP TIME
43
Patent #:
Issue Dt:
12/11/2001
Application #:
09092588
Filing Dt:
06/05/1998
Title:
SYSTEM FOR READ ONLY MEMORY SHADOWING CIRCUIT FOR COPYING A QUANTITY OF ROM DATA TO THE RAM PRIOR TO INITIALIZATION OF THE COMPUTER SYSTEM
44
Patent #:
Issue Dt:
02/01/2000
Application #:
09092779
Filing Dt:
06/05/1998
Title:
SEMICONDUCTOR PACKAGE HAVING MULTIPLE DICE AND STACKED SUBSTRATES WITH BONDED CONTACTS ON MATING SURFACES
45
Patent #:
Issue Dt:
06/13/2000
Application #:
09093295
Filing Dt:
06/08/1998
Title:
SEMICONDUCTOR PACKAGE HAVING INTERLOCKING HEAT SINKS AND METHOD OF FABRICATION
46
Patent #:
Issue Dt:
07/18/2000
Application #:
09093374
Filing Dt:
06/08/1998
Title:
VISIBLE LIGHT-EMITTING PHOSPHOR COMPOSITION HAVING AN ENHANCED LUMINESCENT EFFICIENCY OVER A BROAD RANGE OF VOLTAGES
47
Patent #:
Issue Dt:
11/09/1999
Application #:
09094043
Filing Dt:
05/09/1998
Title:
METHOD AND INTEGRATED CIRCUIT STRUCTURE FOR PREVENTING LATCH-UP IN CMOS INTEGRATED CIRCUIT DEVICES
48
Patent #:
Issue Dt:
10/05/1999
Application #:
09094062
Filing Dt:
06/09/1998
Title:
THE USE OF AN OXIDE SURFACE TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE
49
Patent #:
Issue Dt:
01/23/2001
Application #:
09094447
Filing Dt:
06/08/1998
Title:
SEMICONDUCTOR PROCESSING METHOD OF MAKING ELECTRICAL CONTACT TO A NODE
50
Patent #:
Issue Dt:
06/05/2001
Application #:
09094752
Filing Dt:
06/15/1998
Title:
NON-VOLATILE MEMORY SYSTEM INCLUDING APPARATUS FOR TESTING MEMORY ELEMENTS BY WRITING AND VERIFYING DATA PATTERNS
51
Patent #:
Issue Dt:
04/04/2000
Application #:
09094825
Filing Dt:
06/15/1998
Title:
LEVEL DETECTION CIRCUIT
52
Patent #:
Issue Dt:
09/07/1999
Application #:
09094916
Filing Dt:
06/15/1998
Title:
NONVOLATILE MEMORY DEVICE HAVING SECTORS OF SELECTABLE SIZE AND NUMBER
53
Patent #:
Issue Dt:
08/17/1999
Application #:
09095004
Filing Dt:
06/09/1998
Title:
METHOD OF FORMING INTEGRATED CIRCUITRY AND INTEGRATED CIRCUITRY STRUCTURES
54
Patent #:
Issue Dt:
03/13/2001
Application #:
09095299
Filing Dt:
06/10/1998
Title:
POLISHING POLYMER SURFACES ON NON-POROUS CMP PADS
55
Patent #:
Issue Dt:
10/08/2002
Application #:
09095477
Filing Dt:
06/10/1998
Title:
METHOD OF REDUCING DEFECTS IN ANTI-REFLECTIVE COATINGS AND SEMICONDUCTOR STRUCTURES FABRICATED THEREBY
56
Patent #:
Issue Dt:
09/11/2001
Application #:
09095673
Filing Dt:
06/10/1998
Title:
METHOD AND APPARATUS FOR TESTING THE TIMING OF INTEGRATED CIRCUITS
57
Patent #:
Issue Dt:
02/22/2000
Application #:
09095692
Filing Dt:
06/10/1998
Title:
ETCHING PROCESS WHICH PROTECTS METAL
58
Patent #:
Issue Dt:
04/11/2000
Application #:
09095772
Filing Dt:
06/10/1998
Title:
SEMICONDUCTOR PROCESSING METHOD FOR PROVIDING LARGE GRAIN POLYSILICON FILMS
59
Patent #:
Issue Dt:
04/03/2001
Application #:
09096085
Filing Dt:
06/11/1998
Title:
FIELD EMISSION DEVICE WITH BUFFER LAYER AND METHOD OF MAKING
60
Patent #:
Issue Dt:
01/23/2001
Application #:
09096279
Filing Dt:
06/11/1998
Title:
ON-CHIP CIRCUIT AND METHOD FOR TESTING MEMORY DEVICES
61
Patent #:
Issue Dt:
08/08/2000
Application #:
09096727
Filing Dt:
06/11/1998
Title:
METHOD FOR FORMING A CONTACT INTERMEDIATE TWO ADJACENT ELECTRICAL COMPONENTS
62
Patent #:
Issue Dt:
07/01/2003
Application #:
09097481
Filing Dt:
06/15/1998
Title:
STRUCTURE FOR ESD PROTECTION IN SEMICONDUCTOR CHIPS
63
Patent #:
Issue Dt:
04/04/2000
Application #:
09097557
Filing Dt:
06/15/1998
Title:
CLEANING COMPOSITION CONTAINING TETRAALKYLAMMONIUM SALT AND USE THEREOF IN SEMICONDUCTOR FABRICATION
64
Patent #:
Issue Dt:
11/14/2000
Application #:
09098035
Filing Dt:
06/15/1998
Title:
METHOD OF FORMING CAPACITORS CONTAINING TANTALUM
65
Patent #:
Issue Dt:
09/17/2002
Application #:
09098050
Filing Dt:
06/16/1998
Title:
COMPUTER INCLUDING INSTALLABLE AND REMOVABLE CARDS, OPTICAL INTERCONNECTION BETWEEN CARDS, AND METHOD OF ASSEMBLING A COMPUTER
66
Patent #:
Issue Dt:
03/27/2001
Application #:
09098086
Filing Dt:
06/16/1998
Title:
RETENTION MECHANISM ASSEMBLY FOR PROCESSOR CARTRIDGES WITH CAPTURED SCREW FASTENERS
67
Patent #:
Issue Dt:
03/12/2002
Application #:
09098097
Filing Dt:
06/16/1998
Publication #:
Pub Dt:
08/02/2001
Title:
ARCHITECTURE FOR STATE MACHINE FOR CONTROLLING INTERNAL OPERATIONS OF FLASH MEMORY
68
Patent #:
Issue Dt:
09/28/1999
Application #:
09098104
Filing Dt:
06/16/1998
Title:
SYSTEM AND METHOD FOR WRITING DATA TO MEMORY CELLS SO AS TO ENABLE FASTER READS OF THE DATA USING DUAL WORDLINE DRIVERS
69
Patent #:
Issue Dt:
12/19/2000
Application #:
09098125
Filing Dt:
06/16/1998
Title:
CLOSURE METHOD FOR DEVICES HAVING A STYLUS
70
Patent #:
Issue Dt:
08/08/2000
Application #:
09098173
Filing Dt:
06/16/1998
Title:
CLOSURE SYSTEM FOR DEVICES HAVNG A STYLUS
71
Patent #:
Issue Dt:
11/21/2000
Application #:
09098197
Filing Dt:
06/16/1998
Title:
DIRECT DIE CONTACT (DDC) SEMICONDUCTOR PACKAGE
72
Patent #:
Issue Dt:
07/03/2001
Application #:
09098594
Filing Dt:
06/17/1998
Title:
METHOD AND APPARATUS FOR TESTING SEMICONDUCTOR DICE
73
Patent #:
Issue Dt:
04/25/2000
Application #:
09098810
Filing Dt:
06/17/1998
Title:
METAL SILICIDE FILM STRESS CONTROL BY GRAIN BOUNDARY STUFFING
74
Patent #:
Issue Dt:
09/21/1999
Application #:
09098966
Filing Dt:
06/18/1998
Title:
ANTIFUSE DETECT CIRCUIT
75
Patent #:
Issue Dt:
09/26/2000
Application #:
09099090
Filing Dt:
06/17/1998
Title:
METHOD OF FORMING HIGH ASPECT RATIO APERTURES
76
Patent #:
Issue Dt:
01/16/2001
Application #:
09099274
Filing Dt:
06/18/1998
Title:
METHOD OF FORMING TRENCH ISOLATION REGION FOR SEMICONDUCTOR DEVICE
77
Patent #:
Issue Dt:
09/04/2001
Application #:
09099762
Filing Dt:
06/18/1998
Title:
SELF CLEANING COMPUTER POINTER OR MOUSE
78
Patent #:
Issue Dt:
01/18/2000
Application #:
09099831
Filing Dt:
06/18/1998
Title:
OUTPUT DATA COMPRESSION SCHEME FOR USE IN TESTING IC MEMORIES
79
Patent #:
Issue Dt:
04/01/2003
Application #:
09100300
Filing Dt:
06/19/1998
Title:
CAPACITOR AND METHOD FOR FORMING THE SAME
80
Patent #:
Issue Dt:
09/05/2000
Application #:
09100376
Filing Dt:
06/19/1998
Title:
SYSTEM AND METHOD FOR INDICATING WHEN A STYLUS OF A COMPUTER IS MISSING
81
Patent #:
Issue Dt:
11/02/1999
Application #:
09100471
Filing Dt:
06/19/1998
Title:
MOS DIODE FOR USE IN A NON-VOLATILE MEMORY CELL
82
Patent #:
Issue Dt:
07/20/1999
Application #:
09100522
Filing Dt:
06/18/1998
Title:
SEMICONDUCTOR PROCESSING METHOD OF PROVIDING ELECTRICAL ISOLATION BETWEEN ADJACENT SEMICONDUCTOR DIFFUSION REGIONS OF DIFFERENT FIELD EFFECT TRANSISTORS AND INTEGRATED CIRCUITRY HAVING ADJACENT ELECTRICALLY ISOLATED FIELD EFFECT TRANSISTORS
83
Patent #:
Issue Dt:
07/11/2000
Application #:
09100528
Filing Dt:
06/18/1998
Title:
METHOD OF PATTERNING SUBSTRATES
84
Patent #:
Issue Dt:
07/25/2000
Application #:
09100530
Filing Dt:
06/18/1998
Title:
SEMICONDUCTOR WAFER ASSEMBLIES COMPRISING SILICON NITRIDE, METHODS OF FORMING SILICON NITRIDE, AND METHODS OF REDUCING STRESS ON SEMICONDUCTIVE WAFERS
85
Patent #:
Issue Dt:
02/29/2000
Application #:
09102151
Filing Dt:
06/22/1998
Title:
METHOD FOR IN SITU REMOVAL OF PARTICULATE RESIDUES RESULTING FROM CLEANING TREATMENTS
86
Patent #:
Issue Dt:
09/12/2000
Application #:
09102152
Filing Dt:
06/22/1998
Title:
ETCHANT WITH SELECTIVITY FOR DOPED SILICON DIOXIDE OVER UNDOPED SILICON DIOXIDE AND SILICON NITRIDE, PROCESSES WHICH EMPLOY THE ETCHANT, AND STRUCTURES FORMED THEREBY
87
Patent #:
Issue Dt:
05/01/2001
Application #:
09102223
Filing Dt:
06/22/1998
Title:
ELECTRODE STRUCTURES, DISPLAY DEVICES CONTAINING THE SAME, AND METHODS FOR MAKING THE SAME
88
Patent #:
Issue Dt:
12/19/2000
Application #:
09102345
Filing Dt:
06/22/1998
Title:
SPIN COATING BOWL EXHAUST SYSTEM
89
Patent #:
Issue Dt:
04/24/2001
Application #:
09102346
Filing Dt:
06/22/1998
Title:
SPIN COATING BOWL EXHAUST SYSTEM
90
Patent #:
Issue Dt:
10/17/2000
Application #:
09102347
Filing Dt:
06/22/1998
Title:
METHODS FOR EXHAUSTING A WAFER COATING APPPARATUS
91
Patent #:
Issue Dt:
09/25/2001
Application #:
09102702
Filing Dt:
06/22/1998
Title:
BONDING SUPPORT FOR LEADS-OVER-CHIP PROCESS
92
Patent #:
Issue Dt:
10/24/2000
Application #:
09102989
Filing Dt:
06/22/1998
Title:
DEVICE AND METHOD IN A DELAY LOCKED LOOP FOR GENERATING QUADRATURE AND OTHER OFF PHASE CLOCKS WITH IMPROVED RESOLUTION
93
Patent #:
Issue Dt:
02/22/2000
Application #:
09103202
Filing Dt:
06/23/1998
Title:
METHOD FOR FORMING A STRUCTURE USING REDEPOSITION OF ETCHABLE LAYER
94
Patent #:
Issue Dt:
04/04/2000
Application #:
09103683
Filing Dt:
06/15/1998
Title:
METHOD AND DEVICE FOR QUANTIZING THE INPUT TO SOFT DECODERS
95
Patent #:
Issue Dt:
02/27/2001
Application #:
09103763
Filing Dt:
06/24/1998
Title:
CIRCUIT AND METHOD FOR MASKING A DORMANT MEMORY CELL
96
Patent #:
Issue Dt:
09/21/1999
Application #:
09104263
Filing Dt:
06/24/1998
Title:
INTEGRATED CIRCUIT OPERABLE IN A MODE HAVING EXTREMELY LOW POWER CONSUMPTION
97
Patent #:
Issue Dt:
10/02/2001
Application #:
09104827
Filing Dt:
06/25/1998
Title:
CONNECTING A DIE IN AN INTEGRATED CIRCUIT MODULE
98
Patent #:
Issue Dt:
06/17/2003
Application #:
09104938
Filing Dt:
06/25/1998
Title:
ERGONOMIC KEYBOARD
99
Patent #:
Issue Dt:
09/11/2001
Application #:
09104941
Filing Dt:
06/25/1998
Title:
METHOD FOR OPERATING AN ERGONOMIC KEYBOARD
100
Patent #:
Issue Dt:
02/27/2001
Application #:
09105128
Filing Dt:
06/24/1998
Title:
PREPARATION OF TRANSMISSION ELECTRON MICROSCOPE SAMPLES
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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