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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 34 of 181
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1
Patent #:
6244944
Issue Dt:
06/12/2001
Application #:
09387190
Filing Dt:
08/31/1999
Title:
METHOD AND APPARATUS FOR SUPPORTING AND CLEANING A POLISHING PAD FOR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES
2
Patent #:
6492273
Issue Dt:
12/10/2002
Application #:
09387309
Filing Dt:
08/31/1999
Title:
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
3
Patent #:
6424033
Issue Dt:
07/23/2002
Application #:
09387640
Filing Dt:
08/31/1999
Title:
CHIP PACKAGE WITH GREASE HEAT SINK AND METHOD OF MAKING
4
Patent #:
6144593
Issue Dt:
11/07/2000
Application #:
09387650
Filing Dt:
09/01/1999
Title:
CIRCUIT AND METHOD FOR A MULTIPLEXED REDUNDANCY SCHEME IN A MEMORY DEVICE
5
Patent #:
6412768
Issue Dt:
07/02/2002
Application #:
09387774
Filing Dt:
09/01/1999
Title:
SELF-ADJUSTING PRINTED CIRCUIT BOARD SUPPORT AND METHOD OF USE
6
Patent #:
7071557
Issue Dt:
07/04/2006
Application #:
09388031
Filing Dt:
09/01/1999
Publication #:
US20020056914
Pub Dt:
05/16/2002
Title:
METALLIZATION STRUCTURES FOR SEMICONDUCTOR DEVICE INTERCONNECTS, METHODS FOR MAKING SAME, AND SEMICONDUCTOR DEVICES INCLUDING SAME
7
Patent #:
6082605
Issue Dt:
07/04/2000
Application #:
09388032
Filing Dt:
09/01/1999
Title:
CONTINUOUS MODE SOLDER JET APPARATUS
8
Patent #:
6605331
Issue Dt:
08/12/2003
Application #:
09388045
Filing Dt:
09/01/1999
Title:
ASYMMETRIC TRANSFER MOLDING METHOD AND AN ASYMMETRIC ENCAPSULATION MADE THEREFROM
9
Patent #:
6219293
Issue Dt:
04/17/2001
Application #:
09388126
Filing Dt:
09/01/1999
Title:
METHOD AND APPARATUS FOR SUPPLYING REGULATED POWER TO MEMORY DEVICE COMPONENTS
10
Patent #:
6265297
Issue Dt:
07/24/2001
Application #:
09388133
Filing Dt:
09/01/1999
Title:
AMMONIA PASSIVATION OF METAL GATE ELECTRODES TO INHIBIT OXIDATION OF METAL
11
Patent #:
6168696
Issue Dt:
01/02/2001
Application #:
09388246
Filing Dt:
09/01/1999
Title:
NON-KNURLED INDUCTION COIL FOR IONIZED METAL DEPOSITION, SPUTTERING APPARATUS INCLUDING SAME, AND METHOD OF CONSTRUCTING THE APPARATUS
12
Patent #:
6461915
Issue Dt:
10/08/2002
Application #:
09388287
Filing Dt:
09/01/1999
Publication #:
US20020094636
Pub Dt:
07/18/2002
Title:
METHOD AND STRUCTURE FOR AN IMPROVED FLOATING GATE MEMORY CELL
13
Patent #:
6284660
Issue Dt:
09/04/2001
Application #:
09388450
Filing Dt:
09/02/1999
Title:
METHOD FOR IMPROVING CMP PROCESSING
14
Patent #:
7388289
Issue Dt:
06/17/2008
Application #:
09388567
Filing Dt:
09/02/1999
Title:
LOCAL MULTILAYERED METALLIZATION
15
Patent #:
6246606
Issue Dt:
06/12/2001
Application #:
09388656
Filing Dt:
09/02/1999
Title:
MEMORY USING INSULATOR TRAPS
16
Patent #:
6509278
Issue Dt:
01/21/2003
Application #:
09388660
Filing Dt:
09/02/1999
Title:
METHOD OF FORMING A SEMICONDUCTOR CONTACT THAT INCLUDES SELECTIVELY REMOVING A TI-CONTAINING LAYER FROM THE SURFACE
17
Patent #:
6217645
Issue Dt:
04/17/2001
Application #:
09388667
Filing Dt:
09/02/1999
Title:
METHOD OF DEPOSITING FILMS BY USING CARBOXYLATE COMPLEXES
18
Patent #:
6366266
Issue Dt:
04/02/2002
Application #:
09388671
Filing Dt:
09/02/1999
Title:
METHOD AND APPARATUS FOR PROGRAMMABLE FIELD EMISSION DISPLAY
19
Patent #:
6159609
Issue Dt:
12/12/2000
Application #:
09388681
Filing Dt:
09/02/1999
Title:
METHOD AND APPARATUS FOR APPLYING ATOMIZED ADHESIVE TO A LEADFRAME FOR CHIP BONDING
20
Patent #:
6258729
Issue Dt:
07/10/2001
Application #:
09388685
Filing Dt:
09/02/1999
Title:
OXIDE ETCHING METHOD AND STRUCTURES RESULTING FROM SAME
21
Patent #:
6553510
Issue Dt:
04/22/2003
Application #:
09388687
Filing Dt:
09/02/1999
Title:
MEMORY DEVICE INCLUDING REDUNDANCY ROUTINE FOR CORRECTING RANDOM ERRORS
22
Patent #:
6249047
Issue Dt:
06/19/2001
Application #:
09388706
Filing Dt:
09/02/1999
Title:
BALL ARRAY LAYOUT
23
Patent #:
6391801
Issue Dt:
05/21/2002
Application #:
09388731
Filing Dt:
09/01/1999
Title:
METHOD OF FORMING A LAYER COMPRISING TUNGSTEN OXIDE
24
Patent #:
6376909
Issue Dt:
04/23/2002
Application #:
09388764
Filing Dt:
09/02/1999
Title:
MIXED-MODE STACKED INTEGRATED CIRCUIT WITH POWER SUPPLY CIRCUIT PART OF THE STACK
25
Patent #:
6180508
Issue Dt:
01/30/2001
Application #:
09388769
Filing Dt:
09/02/1999
Title:
METHODS OF FABRICATING BURIED DIGIT LINES AND SEMICONDUCTOR DEVICES INCLUDING SAME
26
Patent #:
6273796
Issue Dt:
08/14/2001
Application #:
09388828
Filing Dt:
09/01/1999
Title:
METHOD AND APPARATUS FOR PLANARIZING A MICROELECTRONIC SUBSTRATE WITH A TILTED PLANARIZING SURFACE
27
Patent #:
6436805
Issue Dt:
08/20/2002
Application #:
09388832
Filing Dt:
09/01/1999
Title:
LOCAL INTERCONNECT STRUCTURES AND METHODS FOR MAKING THE SAME
28
Patent #:
6579751
Issue Dt:
06/17/2003
Application #:
09388856
Filing Dt:
09/01/1999
Publication #:
US20010051407
Pub Dt:
12/13/2001
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY
29
Patent #:
7253047
Issue Dt:
08/07/2007
Application #:
09388857
Filing Dt:
09/01/1999
Publication #:
US20030020106
Pub Dt:
01/30/2003
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING TRANSISTORS, SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY CIRCUITRY, AND RELATED INTEGRATED CIRCUITRY
30
Patent #:
6448591
Issue Dt:
09/10/2002
Application #:
09388894
Filing Dt:
09/02/1999
Title:
METALLIZATION LINE LAYOUT
31
Patent #:
6104652
Issue Dt:
08/15/2000
Application #:
09389106
Filing Dt:
09/02/1999
Title:
METHOD AND MEMORY DEVICE FOR DYNAMIC CELL PLATE SENSING WITH AC EQUILIBRATE
32
Patent #:
6114868
Issue Dt:
09/05/2000
Application #:
09389285
Filing Dt:
09/02/1999
Title:
UNIFORM TEMPERATURE ENVIRONMENTAL TESTING METHOD FOR SEMICONDUCTOR DEVICES
33
Patent #:
6162693
Issue Dt:
12/19/2000
Application #:
09389295
Filing Dt:
09/02/1999
Title:
CHANNEL IMPLANT THROUGH GATE POLYSILICON
34
Patent #:
6253277
Issue Dt:
06/26/2001
Application #:
09389304
Filing Dt:
09/02/1999
Title:
MEMORY SYSTEM HAVING FLEXIBLE ADDRESSING AND METHOD USING TAG AND DATA BUS COMMUNICATION
35
Patent #:
6163500
Issue Dt:
12/19/2000
Application #:
09389313
Filing Dt:
09/02/1999
Title:
MEMORY WITH COMBINED SYNCHRONOUS BURST AND BUS EFFICIENT FUNCTIONALITY
36
Patent #:
6242335
Issue Dt:
06/05/2001
Application #:
09389522
Filing Dt:
09/02/1999
Title:
METHOD FOR FABRICATING ISOLATED ANTI-FUSE STRUCTURE
37
Patent #:
6175155
Issue Dt:
01/16/2001
Application #:
09389523
Filing Dt:
09/02/1999
Title:
SELECTIVELY FORMED CONTACT STRUCTURE
38
Patent #:
6194319
Issue Dt:
02/27/2001
Application #:
09389526
Filing Dt:
09/02/1999
Title:
SEMICONDUCTOR PROCESSING METHOD OF REDUCING AN ETCH RATE OF ONE PORTION OF A DOPED MATERIAL RELATIVE TO ANOTHER PORTION, AND METHODS OF FORMING OPENINGS
39
Patent #:
6254928
Issue Dt:
07/03/2001
Application #:
09389536
Filing Dt:
09/02/1999
Title:
LASER PYROLYSIS PARTICLE FORMING METHOD AND PARTICLE FORMING METHOD
40
Patent #:
6204156
Issue Dt:
03/20/2001
Application #:
09389656
Filing Dt:
09/02/1999
Title:
METHOD TO FABRICATE AN INTRINSIC POLYCRYSTALLINE SILICON FILM
41
Patent #:
6285215
Issue Dt:
09/04/2001
Application #:
09389662
Filing Dt:
09/02/1999
Title:
OUTPUT DRIVER HAVING A PROGRAMMABLE EDGE RATE
42
Patent #:
6238273
Issue Dt:
05/29/2001
Application #:
09389664
Filing Dt:
08/31/1999
Title:
METHODS FOR PREDICTING POLISHING PARAMETERS OF POLISHING PADS AND METHODS AND MACHINES FOR PLANARIZING MICROELECTRONIC SUBSTRATE ASSEMBLIES IN MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION
43
Patent #:
6500744
Issue Dt:
12/31/2002
Application #:
09389670
Filing Dt:
09/02/1999
Publication #:
US20020072208
Pub Dt:
06/13/2002
Title:
METHODS OF FORMING DRAM ASSEMBLIES, TRANSISTOR DEVICES, AND OPENINGS IN SUBSTRATES
44
Patent #:
6825550
Issue Dt:
11/30/2004
Application #:
09389844
Filing Dt:
09/02/1999
Publication #:
US20020060369
Pub Dt:
05/23/2002
Title:
BOARD-ON-CHIP PACKAGES WITH CONDUCTIVE FOIL ON THE CHIP SURFACE
45
Patent #:
6159818
Issue Dt:
12/12/2000
Application #:
09389866
Filing Dt:
09/02/1999
Title:
METHOD OF FORMING A CONTAINER CAPACITOR STRUCTURE
46
Patent #:
6440613
Issue Dt:
08/27/2002
Application #:
09389870
Filing Dt:
09/02/1999
Title:
METHOD OF FABRICATING ATTENUATED PHASE SHIFT MASK
47
Patent #:
6071778
Issue Dt:
06/06/2000
Application #:
09389955
Filing Dt:
09/03/1999
Title:
MEMORY DEVICE WITH A MEMORY CELL ARRAY IN TRIPLE WELL, AND RELATED MANUFACTURING PROCESS
48
Patent #:
6141249
Issue Dt:
10/31/2000
Application #:
09389994
Filing Dt:
09/03/1999
Title:
ORGANIZATION OF BLOCKS WITHIN A NONVOLATILE MEMORY UNIT TO EFFECTIVELY DECREASE SECTOR WRITE OPERATION TIME
49
Patent #:
6140149
Issue Dt:
10/31/2000
Application #:
09390889
Filing Dt:
09/07/1999
Title:
DEVICE AND METHOD FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE
50
Patent #:
6410453
Issue Dt:
06/25/2002
Application #:
09391078
Filing Dt:
09/02/1999
Title:
METHOD OF PROCESSING A SUBSTRATE
51
Patent #:
6146246
Issue Dt:
11/14/2000
Application #:
09391471
Filing Dt:
09/08/1999
Title:
METHOD FOR SUPPLYING FLUSH FLUID
52
Patent #:
6225147
Issue Dt:
05/01/2001
Application #:
09392072
Filing Dt:
09/08/1999
Title:
METHODS OF FORMING ICS CONDUCTIVE LINES, A CONDUCTIVE GRID, A CONDUCTIVE NETWORK, AN ELECTRICAL INTERCONNECTION TO A NODE LOCATION, AN ELECTRICAL INTERCONNECTION WITH A TRANSISTOR SOURCE/DRAIN REGION AND ICS
53
Patent #:
6265775
Issue Dt:
07/24/2001
Application #:
09392153
Filing Dt:
09/08/1999
Title:
FLIP CHIP TECHNIQUE FOR CHIP ASSEMBLY
54
Patent #:
6101139
Issue Dt:
08/08/2000
Application #:
09392154
Filing Dt:
09/08/1999
Title:
DEVICE AND METHOD FOR MARGIN TESTING A SEMICONDUCTOR MEMORY BY APPLYING A STRESSING VOLTAGE SIMULTANEOUSLY TO COMPLEMENTARY AND TRUE DIGIT LINES
55
Patent #:
6135340
Issue Dt:
10/24/2000
Application #:
09392819
Filing Dt:
09/09/1999
Title:
BONDING AND INSPECTION SYSTEM
56
Patent #:
6281077
Issue Dt:
08/28/2001
Application #:
09392937
Filing Dt:
09/09/1999
Title:
METHOD FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING NON-VOLATILE MEMORY CELLS AND LV TRANSISTORS WITH SALICIDED JUNCTIONS
57
Patent #:
6239459
Issue Dt:
05/29/2001
Application #:
09393078
Filing Dt:
09/07/1999
Title:
CAPACITORS, METHODS OF FORMING CAPACITORS, AND INTEGRATED CIRCUITRY
58
Patent #:
6400370
Issue Dt:
06/04/2002
Application #:
09393477
Filing Dt:
09/10/1999
Title:
STOCHASTIC SAMPLING WITH CONSTANT DENSITY IN OBJECT SPACE FOR ANISOTROPIC TEXTURE MAPPING
59
Patent #:
6461985
Issue Dt:
10/08/2002
Application #:
09393542
Filing Dt:
09/10/1999
Title:
SEMICONDUCTOR WAFER ASSEMBLIES COMPRISING SILICON NITRIDE, METHODS OF FORMING SILICON NITRIDE, AND METHODS OF REDUCING STRESS ON SEMICONDUCTIVE WAFERS
60
Patent #:
6108130
Issue Dt:
08/22/2000
Application #:
09393757
Filing Dt:
09/10/1999
Title:
STEREOSCOPIC IMAGE SENSOR
61
Patent #:
6140181
Issue Dt:
10/31/2000
Application #:
09394109
Filing Dt:
09/10/1999
Title:
MEMORY USING INSULATOR TRAPS
62
Patent #:
6125067
Issue Dt:
09/26/2000
Application #:
09394994
Filing Dt:
09/13/1999
Title:
DEVICE AND METHOD FOR REPAIRING A SEMICONDUCTOR MEMORY
63
Patent #:
6384872
Issue Dt:
05/07/2002
Application #:
09395000
Filing Dt:
09/13/1999
Title:
METHOD AND APPARATUS FOR INTERLACED IMAGE ENHANCEMENT
64
Patent #:
6224713
Issue Dt:
05/01/2001
Application #:
09395777
Filing Dt:
09/14/1999
Title:
METHOD AND APPARATUS FOR ULTRASONIC WET ETCHING OF SILICON
65
Patent #:
6147922
Issue Dt:
11/14/2000
Application #:
09396189
Filing Dt:
09/14/1999
Title:
NON-VOLATILE STORAGE LATCH
66
Patent #:
6258728
Issue Dt:
07/10/2001
Application #:
09396389
Filing Dt:
09/15/1999
Title:
PLASMA ETCHING METHODS
67
Patent #:
6169691
Issue Dt:
01/02/2001
Application #:
09397387
Filing Dt:
09/15/1999
Title:
METHOD FOR MAINTAINING THE MEMORY CONTENT OF NON-VOLATILE MEMORY CELLS
68
Patent #:
7071067
Issue Dt:
07/04/2006
Application #:
09397952
Filing Dt:
09/17/1999
Title:
FABRICATION OF INTEGRATED DEVICES USING NITROGEN IMPLANTATION
69
Patent #:
6548392
Issue Dt:
04/15/2003
Application #:
09398337
Filing Dt:
09/17/1999
Publication #:
US20020058395
Pub Dt:
05/16/2002
Title:
METHODS OF HIGH DENSITY FLIP-CHIP MEMORY ARRAYS
70
Patent #:
6562545
Issue Dt:
05/13/2003
Application #:
09398575
Filing Dt:
09/17/1999
Title:
METHOD OF MAKING A SOCKET ASSEMBLY FOR USE WITH A SOLDER BALL
71
Patent #:
6281161
Issue Dt:
08/28/2001
Application #:
09399591
Filing Dt:
09/20/1999
Title:
PLATINUM -CONTAINING MATERIALS AND CATALYSTS
72
Patent #:
6210984
Issue Dt:
04/03/2001
Application #:
09399640
Filing Dt:
09/20/1999
Title:
METHOD AND APPARATUS FOR AUTOMATICALLY POSITIONING ELECTRONIC DICE WITHIN COMPONENT PACKAGES
73
Patent #:
6150828
Issue Dt:
11/21/2000
Application #:
09400515
Filing Dt:
09/20/1999
Title:
METHOD AND APPARATUS FOR AUTOMATICALLY POSITIONING ELECTRONIC DICE WITHIN COMPONENT PACKAGES
74
Patent #:
6163490
Issue Dt:
12/19/2000
Application #:
09401554
Filing Dt:
09/22/1999
Title:
SEMICONDUCTOR MEMORY REMAPPING
75
Patent #:
6581146
Issue Dt:
06/17/2003
Application #:
09401886
Filing Dt:
09/23/1999
Title:
SERIAL COMMAND PORT METHOD, CIRCUIT, AND SYSTEM
76
Patent #:
6608829
Issue Dt:
08/19/2003
Application #:
09402694
Filing Dt:
10/08/1999
Title:
CLOSED-LOOP SYNCHRONISATION ARRANGEMENT FOR DATA TRANSMISSION SYSTEM
77
Patent #:
6395597
Issue Dt:
05/28/2002
Application #:
09405091
Filing Dt:
09/27/1999
Publication #:
US20010053575
Pub Dt:
12/20/2001
Title:
TRENCH DRAM CELL WITH VERTICAL DEVICE AND BURIED WORD LINES
78
Patent #:
6255896
Issue Dt:
07/03/2001
Application #:
09406329
Filing Dt:
09/27/1999
Title:
METHOD AND APPARATUS FOR RAPID INITIALIZATION OF CHARGE PUMP CIRCUITS
79
Patent #:
6134152
Issue Dt:
10/17/2000
Application #:
09407614
Filing Dt:
09/28/1999
Title:
DEVICE AND METHOD FOR SUPPLYING CURRENT TO A SEMICONDUCTOR MEMORY TO SUPPORT A BOOSTED VOLTAGE WITHIN THE MEMORY DURING TESTING
80
Patent #:
6795931
Issue Dt:
09/21/2004
Application #:
09409367
Filing Dt:
09/30/1999
Title:
METHOD AND APPARATUS FOR AN ADJUSTABLE DELAY CIRCUIT HAVING ARRANGED SERIALLY COARSE STAGES RECEIVED BY A FINE DELAY STAGE
81
Patent #:
6321315
Issue Dt:
11/20/2001
Application #:
09409523
Filing Dt:
09/30/1999
Title:
METHOD AND APPARATUS TO REDUCE MEMORY READ LATENCY
82
Patent #:
6268655
Issue Dt:
07/31/2001
Application #:
09409782
Filing Dt:
09/30/1999
Title:
SEMICONDUCTOR DEVICE INCLUDING EDGE BOND PADS AND METHODS
83
Patent #:
RE38166
Issue Dt:
07/01/2003
Application #:
09410164
Filing Dt:
09/30/1999
Title:
CIRCUIT AND METHOD FOR READING A MEMORY CELL THAT CAN STORE MULTIPLE BITS OF DATA
84
Patent #:
6364331
Issue Dt:
04/02/2002
Application #:
09410400
Filing Dt:
10/01/1999
Title:
METHOD AND APPARATUS FOR TRANSFERRING WAFER CASSETTES IN MICROELECTRONIC MANUFACTURING ENVIRONMENT
85
Patent #:
6232247
Issue Dt:
05/15/2001
Application #:
09410969
Filing Dt:
10/04/1999
Publication #:
US20010002339
Pub Dt:
05/31/2001
Title:
SUBSTRATE COATING APPARATUS AND SEMICONDUCTOR PROCESSING METHOD OF IMPROVING UNIFORMITY OF LIQUID DEPOSITION
86
Patent #:
6162295
Issue Dt:
12/19/2000
Application #:
09411498
Filing Dt:
10/04/1999
Title:
SPIN COATING SPINDLE AND CHUCK ASSEMBLY
87
Patent #:
6212128
Issue Dt:
04/03/2001
Application #:
09413382
Filing Dt:
10/06/1999
Title:
ADDRESS TRANSITION DETECTOR IN SEMICONDUCTOR MEMORIES
88
Patent #:
6200144
Issue Dt:
03/13/2001
Application #:
09414203
Filing Dt:
10/07/1999
Title:
INTERPOSER/CONVERTER TO ALLOW SINGLE-SIDED CONTACT TO CIRCUIT MODULES
89
Patent #:
6255171
Issue Dt:
07/03/2001
Application #:
09414426
Filing Dt:
10/07/1999
Title:
METHOD OF MAKING DENSE SOI FLASH MEMORY ARRAY STRUCTURE
90
Patent #:
6163860
Issue Dt:
12/19/2000
Application #:
09415472
Filing Dt:
10/08/1999
Title:
LAYOUT FOR A SEMICONDUCTOR MEMORY DEVICE HAVING PLURALITY OF PRIMARY AND REDUNDANT CIRCUIT ELEMENTS BEING DIVIDED INTO AT LEAST FIRST AND SECOND SETS NOT SIMULTANEOUSLY ACTIVE
91
Patent #:
6246110
Issue Dt:
06/12/2001
Application #:
09415739
Filing Dt:
10/12/1999
Title:
DOWNSET LEAD FRAME FOR SEMICONDUCTOR PACKAGES
92
Patent #:
6292407
Issue Dt:
09/18/2001
Application #:
09416301
Filing Dt:
10/12/1999
Title:
METHOD AND APPARATUS FOR CIRCUIT VARIABLE UPDATES
93
Patent #:
6858453
Issue Dt:
02/22/2005
Application #:
09416368
Filing Dt:
10/12/1999
Title:
INTEGRATED CIRCUIT PACKAGE ALIGNMENT FEATURE
94
Patent #:
6083777
Issue Dt:
07/04/2000
Application #:
09416369
Filing Dt:
10/12/1999
Title:
REDUCED STRESS LOC ASSEMBLY
95
Patent #:
6169696
Issue Dt:
01/02/2001
Application #:
09416371
Filing Dt:
10/12/1999
Title:
METHOD AND APPARATUS FOR STRESS TESTING A SEMICONDUCTOR MEMORY
96
Patent #:
6104661
Issue Dt:
08/15/2000
Application #:
09416711
Filing Dt:
10/12/1999
Title:
SEMICONDUCTOR MEMORY WITH LOCAL PHASE GENERATION FROM GLOBAL PHASE SIGNALS AND LOCAL ISOLATION SIGNALS
97
Patent #:
6229212
Issue Dt:
05/08/2001
Application #:
09416818
Filing Dt:
10/12/1999
Title:
INTEGRATED CIRCUITRY AND THIN FILM TRANSISTORS
98
Patent #:
6204072
Issue Dt:
03/20/2001
Application #:
09417029
Filing Dt:
10/12/1999
Title:
CIRCUIT AND A METHOD FOR CONFIGURING PAD CONNECTIONS IN AN INTEGRATED DEVICE
99
Patent #:
6184574
Issue Dt:
02/06/2001
Application #:
09417160
Filing Dt:
10/12/1999
Title:
MULTI-CAPACITANCE LEAD FRAME DECOUPLING DEVICE
100
Patent #:
6421813
Issue Dt:
07/16/2002
Application #:
09417964
Filing Dt:
10/13/1999
Title:
METHOD AND APPARATUS FOR PROVIDING VISIBILITY AND CONTROL OVER COMPONENTS WITHIN A PROGRAMMABLE LOGIC CIRCUIT FOR EMULATION PURPOSES
Assignor
1
MICRON TECHNOLOGY, INC.
Exec Dt:
04/26/2016
Assignee
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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