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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
02/18/2003
Application #:
09679095
Filing Dt:
10/04/2000
Title:
CONTROLLING PACKAGING ENCAPSULANT LEAKAGE
2
Patent #:
Issue Dt:
08/21/2001
Application #:
09679393
Filing Dt:
10/03/2000
Title:
Methods of forming SOI insulator layers, methods of forming transistor devices, and semiconductor devices and assemblies
3
Patent #:
Issue Dt:
01/14/2003
Application #:
09679940
Filing Dt:
10/04/2000
Title:
METHOD OF MAKING CHIP SCALE PACKAGE WITH HEAT SPREADER
4
Patent #:
Issue Dt:
10/15/2002
Application #:
09680242
Filing Dt:
10/05/2000
Title:
SEMICONDUCTOR PROCESSING METHODS
5
Patent #:
Issue Dt:
07/16/2002
Application #:
09685132
Filing Dt:
10/10/2000
Title:
CALIBRATION TARGET FOR CALIBRATING SEMICONDUCTOR WAFER TEST SYSTEMS
6
Patent #:
Issue Dt:
11/20/2001
Application #:
09685179
Filing Dt:
10/11/2000
Title:
Tri-stating address input circuit
7
Patent #:
Issue Dt:
02/04/2003
Application #:
09685721
Filing Dt:
10/11/2000
Title:
TRI-STATING ADDRESS INPUT CIRCUIT
8
Patent #:
Issue Dt:
04/30/2002
Application #:
09686362
Filing Dt:
10/10/2000
Title:
Serial-flash, eprom, eeprom and flash eeprom nonvolatile memory in AMG configuration
9
Patent #:
Issue Dt:
10/29/2002
Application #:
09686480
Filing Dt:
10/10/2000
Title:
METHODS OF DEPOSITING PHOSPHOR MOLECULES AND FORMING FIELD EMISSION DISPLAY DEVICES
10
Patent #:
Issue Dt:
09/17/2002
Application #:
09686715
Filing Dt:
10/10/2000
Title:
METHODS OF ELECTROPHORETIC DEPOSITION OF PHOSPHOR MOLECULES
11
Patent #:
Issue Dt:
07/31/2001
Application #:
09687206
Filing Dt:
10/13/2000
Title:
Circuit and method for a multiplexed redundancy scheme in a memory device
12
Patent #:
Issue Dt:
04/30/2002
Application #:
09687511
Filing Dt:
10/12/2000
Title:
APPARATUS AND METHODS FOR COUPLING CONDUCTIVE LEADS OF SEMICONDUCTOR ASSEMBLIES
13
Patent #:
Issue Dt:
09/04/2001
Application #:
09688993
Filing Dt:
10/16/2000
Title:
Device and Method for supplying current to a semiconductor memory to support a boosted voltage within the memory during testing
14
Patent #:
Issue Dt:
11/15/2005
Application #:
09691004
Filing Dt:
10/18/2000
Title:
TRANSISTOR WITH VARIABLE ELECTRON AFFINITY GATE AND METHODS OF FABRICATION AND USE
15
Patent #:
Issue Dt:
10/29/2002
Application #:
09691415
Filing Dt:
10/17/2000
Title:
VOLTAGE LEVEL TRANSLATOR
16
Patent #:
Issue Dt:
08/13/2002
Application #:
09691805
Filing Dt:
10/18/2000
Title:
POINT-OF-USE FLUID REGULATING SYSTEM FOR USE IN THE CHEMICAL-MECHANICAL PLANARIZATION OF SEMICONDUCTOR WAFERS
17
Patent #:
Issue Dt:
12/18/2001
Application #:
09692472
Filing Dt:
10/20/2000
Title:
Frequency sensing NMOS voltage regulator
18
Patent #:
Issue Dt:
07/09/2002
Application #:
09692896
Filing Dt:
10/19/2000
Title:
METHOD AND APPARATUS FOR MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATES WITH METAL COMPOUND ABRASIVES
19
Patent #:
Issue Dt:
02/03/2004
Application #:
09694113
Filing Dt:
10/20/2000
Title:
INDIVIDUAL SELECTIVE REWORK OF DEFECTIVE BGA SOLDER BALLS
20
Patent #:
Issue Dt:
04/02/2002
Application #:
09694802
Filing Dt:
10/23/2000
Title:
Partial underfill for flip-chip electronic packages
21
Patent #:
Issue Dt:
01/11/2005
Application #:
09695756
Filing Dt:
10/24/2000
Title:
METHOD AND APPARATUS FOR REDUNDANT LOCATION ADDRESSING USING DATA COMPRESSION
22
Patent #:
Issue Dt:
07/09/2002
Application #:
09696335
Filing Dt:
10/24/2000
Title:
METHOD AND APPARATUS FOR RELEASABLY ATTACHING POLISHING PADS TO PLANARIZING MACHINES IN MECHANICAL AND/OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC-DEVICE SUBSTRATE ASSEMBLIES
23
Patent #:
Issue Dt:
08/27/2002
Application #:
09696336
Filing Dt:
10/24/2000
Title:
METHOD AND APPARATUS FOR RELEASABLY ATTACHING POLISHING PADS TO PLANARIZING MACHINES IN MECHANICAL AND/OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC-DEVICE SUBSTRATE ASSEMBLIES
24
Patent #:
Issue Dt:
08/13/2002
Application #:
09696357
Filing Dt:
10/25/2000
Title:
METHOD FOR FORMING A DIELECTRIC
25
Patent #:
Issue Dt:
10/01/2002
Application #:
09696899
Filing Dt:
10/25/2000
Title:
METHOD OF FORMING A CAPACITOR AND AN ELECTRICAL CONNECTION THERETO, AND METHOD OF FORMING DRAM CIRCUITRY
26
Patent #:
Issue Dt:
03/25/2003
Application #:
09698745
Filing Dt:
10/27/2000
Title:
FORMING METAL SILICIDE RESISTANT TO SUBSEQUENT THERMAL PROCESSING
27
Patent #:
Issue Dt:
10/29/2002
Application #:
09699043
Filing Dt:
10/27/2000
Title:
READING METHOD AND CIRCUIT FOR A NON-VOLATILE MEMORY
28
Patent #:
Issue Dt:
06/04/2002
Application #:
09699304
Filing Dt:
10/27/2000
Title:
READING CIRCUIT FOR A NON-VOLATILE MEMORY
29
Patent #:
Issue Dt:
04/30/2002
Application #:
09699309
Filing Dt:
10/27/2000
Title:
METHOD FOR CONTROLLED SOFT PROGRAMMING OF NON-VOLATILE MEMORY CELLS, IN PARTICULAR OF THE FLASH EEPROM AND EPROM TYPE
30
Patent #:
Issue Dt:
11/26/2002
Application #:
09699918
Filing Dt:
10/30/2000
Title:
COMPRESSION LAYER ON THE LEADFRAME TO REDUCE STRESS DEFECTS
31
Patent #:
Issue Dt:
06/18/2002
Application #:
09703364
Filing Dt:
10/31/2000
Title:
SINGLE ELECTRON RESISTOR MEMORY DEVICE AND METHOD
32
Patent #:
Issue Dt:
10/30/2001
Application #:
09703496
Filing Dt:
10/31/2000
Title:
Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
33
Patent #:
Issue Dt:
07/06/2004
Application #:
09703920
Filing Dt:
11/01/2000
Title:
METHOD TO PREVENT DIE ATTACH ADHESIVE CONTAMINATION IN STACKED CHIPS
34
Patent #:
Issue Dt:
01/11/2005
Application #:
09705145
Filing Dt:
11/02/2000
Title:
COLOUR IMAGE RESTORATION WITH ANTI-ALIAS
35
Patent #:
Issue Dt:
03/19/2002
Application #:
09705227
Filing Dt:
11/02/2000
Title:
Sequential data transfer with common clock signal for receiver and sequential storage device and with slack register storing overflow item when set-up time is insufficient
36
Patent #:
Issue Dt:
05/28/2002
Application #:
09705474
Filing Dt:
11/02/2000
Title:
INCREASING THE MEMORY PERFORMANCE OF FLASH MEMORY DEVICES BY WRITING SECTORS SIMULTANEOUSLY TO MULTIPLE FLASH MEMORY DEVICES
37
Patent #:
Issue Dt:
11/12/2002
Application #:
09705499
Filing Dt:
11/02/2000
Title:
TRANSCONDUCTANCE AMPLIFIER ARRANGEMENT
38
Patent #:
Issue Dt:
04/13/2004
Application #:
09705700
Filing Dt:
11/06/2000
Title:
METHOD FOR IMPROVING THE RESISTANCE DEGRADATION OF THIN FILM CAPACITORS
39
Patent #:
Issue Dt:
08/08/2006
Application #:
09706960
Filing Dt:
11/06/2000
Title:
RECOVERING A SYSTEM THAT HAS EXPERIENCED A FAULT
40
Patent #:
Issue Dt:
04/15/2003
Application #:
09707549
Filing Dt:
11/06/2000
Title:
METHOD OF MINIMIZING REPETITIVE CHEMICAL-MECHANICAL POLISHING SCRATCH MARKS, METHOD OF PROCESSING A SEMICONDUCTOR WAFER OUTER SURFACE, METHOD OF MINIMIZING UNDESIRED NODE-TO NODE SHORTS OF A LENGTH LESS THAN OR EQUAL TO 0.3 MICRON, AND SEMICONDUCTOR PROCESSING METH
41
Patent #:
Issue Dt:
12/24/2002
Application #:
09708360
Filing Dt:
11/07/2000
Title:
FIELD EFFECT TRANSISTORS AND INTEGRATED CIRCUITRY
42
Patent #:
Issue Dt:
12/30/2003
Application #:
09709000
Filing Dt:
11/08/2000
Title:
I/O DEVICE TESTING METHOD AND APPARATUS
43
Patent #:
Issue Dt:
05/07/2002
Application #:
09710067
Filing Dt:
11/09/2000
Title:
ARCHITECTURE FOR HANDLING INTERNAL VOLTAGES IN A NON-VOLATILE MEMORY, PARTICULARLY IN A SINGLE-VOLTAGE SUPPLY TYPE OF DUAL-WORK FLASH MEMORY
44
Patent #:
Issue Dt:
12/24/2002
Application #:
09710399
Filing Dt:
11/09/2000
Title:
STACKED LOCAL INTERCONNECT STRUCTURE AND METHOD OF FABRICATING SAME
45
Patent #:
Issue Dt:
04/05/2005
Application #:
09711324
Filing Dt:
11/13/2000
Title:
ETCHANT WITH SELECTIVITY FOR DOPED SILICON DIOXIDE OVER UNDOPED SILICON DIOXIDE AND SILICON NITRIDE, PROCESSES WHICH EMPLOY THE ETCHANT, AND STRUCTURES FORMED THEREBY
46
Patent #:
Issue Dt:
09/03/2002
Application #:
09712176
Filing Dt:
11/15/2000
Title:
METHOD OF FORMING DUAL CONDUCTIVE PLUGS
47
Patent #:
Issue Dt:
01/11/2005
Application #:
09712185
Filing Dt:
11/15/2000
Title:
METHOD FOR SWITCHING DATA STREAMS
48
Patent #:
Issue Dt:
03/08/2005
Application #:
09712822
Filing Dt:
11/13/2000
Title:
CODE-SWITCHED OPTICAL NETWORKS
49
Patent #:
Issue Dt:
12/31/2002
Application #:
09713144
Filing Dt:
11/14/2000
Title:
PROCESS FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING HIGH VOLTAGE MOS TRANSISTORS, AND ELECTRONIC DEVICE THUS OBTAINED
50
Patent #:
Issue Dt:
07/30/2002
Application #:
09713845
Filing Dt:
11/15/2000
Title:
BARRIER LAYER FABRICATION METHODS
51
Patent #:
Issue Dt:
03/15/2005
Application #:
09714382
Filing Dt:
11/15/2000
Title:
SYSTEM AND METHOD OF TRANSMITTING DATA FRAMES IN A MESH OF DATA SWITCHES
52
Patent #:
Issue Dt:
07/09/2002
Application #:
09714766
Filing Dt:
11/16/2000
Title:
SPIN COATING SPINDLE AND CHUCK ASSEMBLY
53
Patent #:
Issue Dt:
07/23/2002
Application #:
09714837
Filing Dt:
11/15/2000
Title:
VOLTAGE GENERATOR SWITCHING BETWEEN ALTERNATING, FIRST AND SECOND VOLTAGE VALUES, IN PARTICULAR FOR PROGRAMMING MULTILEVEL CELLS
54
Patent #:
Issue Dt:
11/18/2003
Application #:
09714852
Filing Dt:
11/15/2000
Title:
PROGRAMMABLE VOLTAGE GENERATOR
55
Patent #:
Issue Dt:
04/15/2003
Application #:
09715491
Filing Dt:
11/17/2000
Title:
PROCESS LIQUID DISPENSE METHOD AND APPARATUS
56
Patent #:
Issue Dt:
07/09/2002
Application #:
09715691
Filing Dt:
11/17/2000
Title:
Apparatus and methods for substantial planarization of solder bumps
57
Patent #:
Issue Dt:
02/19/2002
Application #:
09716746
Filing Dt:
11/20/2000
Title:
Method for reading data from a non-volatile memory device with autodetect burst mode reading and corresponding reading circuit
58
Patent #:
Issue Dt:
03/26/2002
Application #:
09716747
Filing Dt:
11/20/2000
Title:
Decoder for memories having optimized configuration
59
Patent #:
Issue Dt:
07/23/2002
Application #:
09716759
Filing Dt:
11/20/2000
Title:
SYNCHRONOUS OUTPUT BUFFER, PARTICULARLY FOR NON-VOLATILE MEMORIES
60
Patent #:
Issue Dt:
05/14/2002
Application #:
09717078
Filing Dt:
11/22/2000
Title:
METHOD FOR MANUFACTURING FIELD EFFECT TRANSISTOR CAPABLE OF SUCCESSFULLY CONTROLLING TRANSISTOR CHARACTERISTICS RELATING TO THE SHORT-CHANNEL EFFECT
61
Patent #:
Issue Dt:
09/25/2007
Application #:
09717579
Filing Dt:
11/21/2000
Title:
METHOD AND APPARATUS FOR DETERMINING AND DISPLAYING THE SERVICE LEVEL OF A DIGITAL TELEVISION BROADCAST SIGNAL
62
Patent #:
Issue Dt:
02/08/2005
Application #:
09717938
Filing Dt:
11/21/2000
Title:
NON-VOLATILE MEMORY DEVICE WITH BURST MODE READING AND CORRESPONDING READING METHOD
63
Patent #:
Issue Dt:
10/01/2002
Application #:
09718914
Filing Dt:
11/22/2000
Title:
SPACER PATTERNED, HIGH DIELECTRIC CONSTANT CAPACITOR
64
Patent #:
Issue Dt:
01/21/2003
Application #:
09718971
Filing Dt:
11/22/2000
Title:
PROCESS FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING NONVOLATILE MEMORY CELLS OF REDUCED DIMENSIONS
65
Patent #:
Issue Dt:
04/22/2003
Application #:
09721697
Filing Dt:
11/27/2000
Title:
USE OF GATE ELECTRODE WORKFUNCTION TO IMPROVE DRAM REFRESH
66
Patent #:
Issue Dt:
12/11/2007
Application #:
09721785
Filing Dt:
11/22/2000
Title:
LINK-LOCK DEVICE AND METHOD OF MONITORING AND CONTROLLING A LINK FOR FAILURES AND INTRUSIONS
67
Patent #:
Issue Dt:
10/31/2006
Application #:
09722400
Filing Dt:
11/27/2000
Title:
POLYIMIDE AS A MASK IN VAPOR HYDROGEN FLUORIDE ETCHING
68
Patent #:
Issue Dt:
04/15/2003
Application #:
09724346
Filing Dt:
11/27/2000
Title:
HIGH SPEED TEST SYSTEM FOR A MEMORY DEVICE
69
Patent #:
Issue Dt:
07/09/2002
Application #:
09724470
Filing Dt:
11/28/2000
Title:
Asymmetrical molding method for multiple part matrixes
70
Patent #:
Issue Dt:
07/09/2002
Application #:
09724749
Filing Dt:
11/27/2000
Title:
SEMICONDUCTOR WAFER ASSEMBLIES COMPRISING PHOTORESIST OVER SILICON NITRIDE MATERIALS
71
Patent #:
Issue Dt:
07/12/2005
Application #:
09727038
Filing Dt:
11/30/2000
Publication #:
Pub Dt:
05/30/2002
Title:
COLOR FILTER ARRAY AND COLOR INTERPOLATION ALGORITHM
72
Patent #:
Issue Dt:
10/14/2003
Application #:
09730102
Filing Dt:
12/05/2000
Publication #:
Pub Dt:
05/03/2001
Title:
COMPACT SOI BODY CONTACT LINK
73
Patent #:
Issue Dt:
04/19/2005
Application #:
09730335
Filing Dt:
12/04/2000
Publication #:
Pub Dt:
05/24/2001
Title:
FIELD EFFECT TRANSISTORS AND INTEGRATED CIRCUITRY.
74
Patent #:
Issue Dt:
07/16/2002
Application #:
09730518
Filing Dt:
12/05/2000
Publication #:
Pub Dt:
08/23/2001
Title:
MANUFACTURING PROCESS FOR NON-VOLATILE FLOATING GATE MEMORY CELLS INTEGRATED ON A SEMICONDUCTOR SUBSTRATE AND COMPRISED IN A CELL MATRIX WITH AN ASSOCIATED CONTROL CIRCUITRY
75
Patent #:
Issue Dt:
06/21/2005
Application #:
09730774
Filing Dt:
12/07/2000
Publication #:
Pub Dt:
08/15/2002
Title:
METHOD OF PACING AND DISCONNECTING TRANSFERS ON A SOURCE STROBED BUS
76
Patent #:
Issue Dt:
11/18/2003
Application #:
09730775
Filing Dt:
12/07/2000
Publication #:
Pub Dt:
09/26/2002
Title:
METHOD OF DETECTING A SOURCE STROBE EVENT USING CHANGE DETECTION
77
Patent #:
Issue Dt:
01/31/2006
Application #:
09730780
Filing Dt:
12/07/2000
Publication #:
Pub Dt:
10/17/2002
Title:
ARBITRATION METHOD FOR A SOURCE STROBED BUS
78
Patent #:
Issue Dt:
07/29/2003
Application #:
09730865
Filing Dt:
12/05/2000
Publication #:
Pub Dt:
05/24/2001
Title:
METHODS OF FORMING CAPACITORS, METHODS OF FORMING CAPACITOR-OVER-BIT LINE MEMORY CIRCUITRY, AND RELATED INTEGRATED CIRCUITRY CONSTRUCTIONS
79
Patent #:
Issue Dt:
01/26/2010
Application #:
09731319
Filing Dt:
12/06/2000
Title:
PROCESS FOR FABRICATING FILMS OF UNIFORM PROPERTIES ON SEMICONDUCTOR DEVICES
80
Patent #:
Issue Dt:
01/14/2003
Application #:
09731360
Filing Dt:
12/06/2000
Publication #:
Pub Dt:
06/06/2002
Title:
THIN FLIP - CHIP METHOD
81
Patent #:
Issue Dt:
08/27/2002
Application #:
09732106
Filing Dt:
12/07/2000
Publication #:
Pub Dt:
04/19/2001
Title:
SEMICONDUCTOR DEVICE SOCKET, ASSEMBLY AND METHODS
82
Patent #:
Issue Dt:
11/25/2003
Application #:
09732968
Filing Dt:
12/08/2000
Publication #:
Pub Dt:
06/13/2002
Title:
RESISTANCE VARIABLE DEVICE
83
Patent #:
Issue Dt:
03/12/2002
Application #:
09733242
Filing Dt:
12/07/2000
Title:
Efficient open-array memory device architecture and method
84
Patent #:
Issue Dt:
03/13/2007
Application #:
09733373
Filing Dt:
12/08/2000
Publication #:
Pub Dt:
06/13/2002
Title:
METHOD AND APPARATUS FOR PROGRAMMING HOT KEYS BASED ON USER INTERESTS
85
Patent #:
Issue Dt:
10/08/2002
Application #:
09734307
Filing Dt:
12/11/2000
Publication #:
Pub Dt:
06/13/2002
Title:
IN-LINE METHOD OF MEASURING EFFECTIVE THREE-LEAF ABERRATION COEFFICIENT OF LITHOGRAPHY PROJECTION SYSTEMS
86
Patent #:
Issue Dt:
05/07/2002
Application #:
09734547
Filing Dt:
12/13/2000
Title:
METHOD OF FORMING BURIED CONDUCTOR PATTERNS BY SURFACE TRANSFORMATION OF EMPTY SPACES IN SOLID STATE MATERIALS
87
Patent #:
Issue Dt:
03/19/2002
Application #:
09735277
Filing Dt:
12/11/2000
Title:
CHARGE PUMP WITH EFFICIENT SWITCHING TECHNIQUES
88
Patent #:
Issue Dt:
12/16/2008
Application #:
09735358
Filing Dt:
12/12/2000
Publication #:
Pub Dt:
06/13/2002
Title:
CLOCK NETWORK
89
Patent #:
Issue Dt:
08/27/2002
Application #:
09735387
Filing Dt:
12/12/2000
Publication #:
Pub Dt:
05/03/2001
Title:
EMBEDDED MEMORY ASSEMBLY
90
Patent #:
Issue Dt:
08/28/2001
Application #:
09735440
Filing Dt:
12/12/2000
Publication #:
Pub Dt:
04/26/2001
Title:
Methods of forming SOI insulator layers, methods of forming transistor devices, and semiconductor devices and assemblies
91
Patent #:
Issue Dt:
01/14/2003
Application #:
09735441
Filing Dt:
12/12/2000
Title:
METHOD AND APPARATUS FOR TESTING SRAM MEMORY CELLS
92
Patent #:
Issue Dt:
12/13/2005
Application #:
09735689
Filing Dt:
12/12/2000
Title:
METHOD AND APPARATUS FOR LEVEL-OF-DETAIL COMPUTATIONS
93
Patent #:
Issue Dt:
06/17/2003
Application #:
09736247
Filing Dt:
12/15/2000
Publication #:
Pub Dt:
06/20/2002
Title:
METHOD OF ALIGNMENT FOR BURIED STRUCTURES FORMED BY SURFACE TRANSFORMATION OF EMPTY SPACES IN SOLID STATE MATERIALS
94
Patent #:
Issue Dt:
01/21/2003
Application #:
09736547
Filing Dt:
12/11/2000
Publication #:
Pub Dt:
05/03/2001
Title:
Method of forming transistors and connections thereto
95
Patent #:
Issue Dt:
10/17/2006
Application #:
09737140
Filing Dt:
12/13/2000
Publication #:
Pub Dt:
06/13/2002
Title:
EXTENSIBLE BIOS ERROR LOG
96
Patent #:
Issue Dt:
01/04/2005
Application #:
09737170
Filing Dt:
12/14/2000
Publication #:
Pub Dt:
09/13/2001
Title:
PAGE BY PAGE PROGRAMMABLE FLASH MEMORY
97
Patent #:
Issue Dt:
11/15/2005
Application #:
09737218
Filing Dt:
12/14/2000
Publication #:
Pub Dt:
06/14/2001
Title:
SYSTEM AND METHOD FOR ASSIGNING ADDRESSES TO MEMORY DEVICES
98
Patent #:
Issue Dt:
11/11/2003
Application #:
09737231
Filing Dt:
12/13/2000
Publication #:
Pub Dt:
06/13/2002
Title:
MEMORY SYSTEM HAVING PROGRAMMABLE MULTIPLE AND CONTINUOUS MEMORY REGIONS AND METHOD OF USE THEREOF
99
Patent #:
Issue Dt:
05/27/2003
Application #:
09737288
Filing Dt:
12/13/2000
Publication #:
Pub Dt:
05/10/2001
Title:
SINGLE-PIECE MOLDED MODULE HOUSING
100
Patent #:
Issue Dt:
05/11/2004
Application #:
09737827
Filing Dt:
12/15/2000
Publication #:
Pub Dt:
11/22/2001
Title:
METHOD FOR THE CORRECTION OF A BIT IN A STRING OF BITS
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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