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Reel/Frame:	038669/0001			Pages:	961
		Recorded:	05/12/2016
Attorney Dkt #:	4816.228
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 18018
Page 59 of 181
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Patent #:	7200738	Issue Dt:	04/03/2007	Application #:	10125331	Filing Dt:	04/18/2002
Publication #:	US20030200421	Pub Dt:	10/23/2003
Title:	REDUCING DATA HAZARDS IN PIPELINED PROCESSORS TO PROVIDE HIGH PROCESSOR UTILIZATION

Patent #:	6744098	Issue Dt:	06/01/2004	Application #:	10125979	Filing Dt:	04/19/2002
Publication #:	US20020109199	Pub Dt:	08/15/2002
Title:	TRANSISTOR DEVICES

Patent #:	7000126	Issue Dt:	02/14/2006	Application #:	10126274	Filing Dt:	04/18/2002
Publication #:	US20030200481	Pub Dt:	10/23/2003
Title:	METHOD FOR MEDIA CONTENT PRESENTATION IN CONSIDERATION OF SYSTEM POWER

Patent #:	7180929	Issue Dt:	02/20/2007	Application #:	10126348	Filing Dt:	04/18/2002
Publication #:	US20030199109	Pub Dt:	10/23/2003
Title:	WAFER-LEVEL TEST STRUCTURE FOR EDGE-EMITTING SEMICONDUCTOR LASERS

Patent #:	6862714	Issue Dt:	03/01/2005	Application #:	10126402	Filing Dt:	04/19/2002
Publication #:	US20030200514	Pub Dt:	10/23/2003
Title:	ACCURATELY TUNING RESISTORS

Patent #:	6574164	Issue Dt:	06/03/2003	Application #:	10126412	Filing Dt:	04/19/2002
Publication #:	US20020181294	Pub Dt:	12/05/2002
Title:	TRCD MARGIN

Patent #:	6483762	Issue Dt:	11/19/2002	Application #:	10126413	Filing Dt:	04/19/2002
Publication #:	US20020181305	Pub Dt:	12/05/2002
Title:	TRCD MARGIN

Patent #:	6693835	Issue Dt:	02/17/2004	Application #:	10126424	Filing Dt:	04/19/2002
Publication #:	US20020181295	Pub Dt:	12/05/2002
Title:	TRCD MARGIN

Patent #:	6493286	Issue Dt:	12/10/2002	Application #:	10126730	Filing Dt:	04/19/2002
Publication #:	US20020181317	Pub Dt:	12/05/2002
Title:	TRCD MARGIN

Patent #:	6545937	Issue Dt:	04/08/2003	Application #:	10127368	Filing Dt:	04/22/2002
Publication #:	US20020191477	Pub Dt:	12/19/2002
Title:	A WRITE CIRCUIT OF A MEMORY DEIVCE

Patent #:	6734372	Issue Dt:	05/11/2004	Application #:	10128176	Filing Dt:	04/23/2002
Publication #:	US20020166695	Pub Dt:	11/14/2002
Title:	GATE AREA RELIEF STRIP FOR A MOLDED I/C PACKAGE

Patent #:	7339770	Issue Dt:	03/04/2008	Application #:	10128373	Filing Dt:	04/24/2002
Publication #:	US20030202299	Pub Dt:	10/30/2003
Title:	ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT HAVING A RING OSCILLATOR TIMER CIRCUIT

Patent #:	6699798	Issue Dt:	03/02/2004	Application #:	10131017	Filing Dt:	04/24/2002
Publication #:	US20030203647	Pub Dt:	10/30/2003
Title:	PROMOTING ADHESION OF FLUOROPOLYMER FILMS TO SEMICONDUCTOR SUBSTRATES

Patent #:	6858264	Issue Dt:	02/22/2005	Application #:	10132003	Filing Dt:	04/24/2002
Publication #:	US20030203109	Pub Dt:	10/30/2003
Title:	CHEMICAL VAPOR DEPOSITION METHODS

Patent #:	6687180	Issue Dt:	02/03/2004	Application #:	10132032	Filing Dt:	04/25/2002
Publication #:	US20030202415	Pub Dt:	10/30/2003
Title:	DRIVER CONTROL CIRCUIT

Patent #:	6493229	Issue Dt:	12/10/2002	Application #:	10132043	Filing Dt:	04/25/2002
Publication #:	US20020114135	Pub Dt:	08/22/2002
Title:	HEAT SINK CHIP PACKAGE

Patent #:	6655535	Issue Dt:	12/02/2003	Application #:	10132480	Filing Dt:	04/25/2002
Publication #:	US20020124396	Pub Dt:	09/12/2002
Title:	APPARATUS AND METHOD FOR FACILITATING CIRCUIT BOARD PROCESSING

Patent #:	6545368	Issue Dt:	04/08/2003	Application #:	10132481	Filing Dt:	04/25/2002
Publication #:	US20020117763	Pub Dt:	08/29/2002
Title:	USE OF AN OXIDE SURFACE TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE

Patent #:	6939799	Issue Dt:	09/06/2005	Application #:	10132784	Filing Dt:	04/24/2002
Publication #:	US20020117707	Pub Dt:	08/29/2002
Title:	METHOD OF FORMING A FIELD EFFECT TRANSISTOR AND METHODS OF FORMING INTEGRATED CIRCUITRY

Patent #:	6777071	Issue Dt:	08/17/2004	Application #:	10132835	Filing Dt:	04/25/2002
Publication #:	US20030203668	Pub Dt:	10/30/2003
Title:	ELECTRICAL INTERCONNECT USING LOCALLY CONDUCTIVE ADHESIVE

Patent #:	7135417	Issue Dt:	11/14/2006	Application #:	10133132	Filing Dt:	04/25/2002
Publication #:	US20020119674	Pub Dt:	08/29/2002
Title:	METHOD OF FORMING A SEMICONDUCTOR DEVICE

Patent #:	6724658	Issue Dt:	04/20/2004	Application #:	10133231	Filing Dt:	04/26/2002
Publication #:	US20020192892	Pub Dt:	12/19/2002
Title:	METHOD AND CIRCUIT FOR GENERATING REFERENCE VOLTAGES FOR READING A MULTILEVEL MEMORY CELL

Patent #:	6939746	Issue Dt:	09/06/2005	Application #:	10133250	Filing Dt:	04/26/2002
Publication #:	US20030038376	Pub Dt:	02/27/2003
Title:	METHOD FOR ASSEMBLING SEMICONDUCTOR DIE PACKAGES WITH STANDARD BALL GRID ARRAY FOOTPRINT

Patent #:	7240247	Issue Dt:	07/03/2007	Application #:	10133625	Filing Dt:	04/29/2002
Publication #:	US20030204804	Pub Dt:	10/30/2003
Title:	PROVIDING A CHAIN OF TOKENIZED ERROR AND STATE INFORMATION FOR A CALL STACK

Patent #:	6861094	Issue Dt:	03/01/2005	Application #:	10133909	Filing Dt:	04/25/2002
Publication #:	US20030203626	Pub Dt:	10/30/2003
Title:	METHODS FOR FORMING THIN LAYERS OF MATERIALS ON MICRO-DEVICE WORKPIECES

Patent #:	7374617	Issue Dt:	05/20/2008	Application #:	10133947	Filing Dt:	04/25/2002
Publication #:	US20030200917	Pub Dt:	10/30/2003
Title:	ATOMIC LAYER DEPOSITION METHODS AND CHEMICAL VAPOR DEPOSITION METHODS

Patent #:	7105065	Issue Dt:	09/12/2006	Application #:	10133951	Filing Dt:	04/25/2002
Publication #:	US20030201034	Pub Dt:	10/30/2003
Title:	METAL LAYER FORMING METHODS AND CAPACITOR ELECTRODE FORMING METHODS

Patent #:	6657913	Issue Dt:	12/02/2003	Application #:	10134837	Filing Dt:	04/29/2002
Publication #:	US20020125538	Pub Dt:	09/12/2002
Title:	ARRAY ORGANIZATION FOR HIGH-PERFORMANCE MEMORY DEVICES

Patent #:	6775165	Issue Dt:	08/10/2004	Application #:	10135563	Filing Dt:	05/01/2002
Publication #:	US20020163825	Pub Dt:	11/07/2002
Title:	CURRENT SWITCHING SENSOR DETECTOR

Patent #:	6783995	Issue Dt:	08/31/2004	Application #:	10135921	Filing Dt:	04/30/2002
Publication #:	US20030203510	Pub Dt:	10/30/2003
Title:	PROTECTIVE LAYERS FOR MRAM DEVICES

Patent #:	6693363	Issue Dt:	02/17/2004	Application #:	10136123	Filing Dt:	05/01/2002
Publication #:	US20020153602	Pub Dt:	10/24/2002
Title:	BALL GRID ARRAY CHIP PACKAGES HAVING IMPROVED TESTING AND STACKING CHARACTERISTICS

Patent #:	6836008	Issue Dt:	12/28/2004	Application #:	10136186	Filing Dt:	05/01/2002
Publication #:	US20030193091	Pub Dt:	10/16/2003
Title:	SEMICONDUCTOR PACKAGES WITH LEADFRAME GRID ARRAYS AND COMPONENTS AND METHODS FOR MAKING THE SAME

Patent #:	6950918	Issue Dt:	09/27/2005	Application #:	10136583	Filing Dt:	04/30/2002
Title:	FILE MANAGEMENT OF ONE-TIME-PROGRAMMABLE NONVOLATILE MEMORY DEVICES

Patent #:	6532177	Issue Dt:	03/11/2003	Application #:	10136742	Filing Dt:	04/30/2002
Publication #:	US20030043642	Pub Dt:	03/06/2003
Title:	LOW VOLTAGE CHARGE PUMP APPARATUS AND METHOD

Patent #:	6744138	Issue Dt:	06/01/2004	Application #:	10136771	Filing Dt:	04/30/2002
Publication #:	US20020121697	Pub Dt:	09/05/2002
Title:	PROCESS FOR THE FORMATION OF RUSIXOY-CONTAINING BARRIER LAYERS FOR HIGH-K DIELECTRICS

Patent #:	7589029	Issue Dt:	09/15/2009	Application #:	10137058	Filing Dt:	05/02/2002
Publication #:	US20030207593	Pub Dt:	11/06/2003
Title:	ATOMIC LAYER DEPOSITION AND CONVERSION

Patent #:	6713875	Issue Dt:	03/30/2004	Application #:	10137293	Filing Dt:	05/03/2002
Publication #:	US20020132476	Pub Dt:	09/19/2002
Title:	BARRIER LAYER ASSOCIATED WITH A CONDUCTOR LAYER IN DAMASCENE STRUCTURES

Patent #:	6951709	Issue Dt:	10/04/2005	Application #:	10137384	Filing Dt:	05/03/2002
Publication #:	US20030207207	Pub Dt:	11/06/2003
Title:	METHOD OF FABRICATING A SEMICONDUCTOR MULTILEVEL INTERCONNECT STRUCTURE

Patent #:	7045430	Issue Dt:	05/16/2006	Application #:	10137499	Filing Dt:	05/02/2002
Publication #:	US20030207540	Pub Dt:	11/06/2003
Title:	ATOMIC LAYER-DEPOSITED LAAIO3 FILMS FOR GATE DIELECTRICS

Patent #:	6724652	Issue Dt:	04/20/2004	Application #:	10137500	Filing Dt:	05/02/2002
Publication #:	US20030207486	Pub Dt:	11/06/2003
Title:	LOW REMANENCE FLUX CONCENTRATOR FOR MRAM DEVICES

Patent #:	6583503	Issue Dt:	06/24/2003	Application #:	10137584	Filing Dt:	05/02/2002
Publication #:	US20020125558	Pub Dt:	09/12/2002
Title:	SEMICONDUCTOR PACKAGE WITH STACKED SUBSTRATES AND MULTIPLE SEMICONDUCTOR DICE

Patent #:	7154853	Issue Dt:	12/26/2006	Application #:	10137753	Filing Dt:	05/02/2002
Publication #:	US20030206522	Pub Dt:	11/06/2003
Title:	RATE POLICING ALGORITHM FOR PACKET FLOWS

Patent #:	6563217	Issue Dt:	05/13/2003	Application #:	10137755	Filing Dt:	05/02/2002
Publication #:	US20020125571	Pub Dt:	09/12/2002
Title:	MODULE ASSEMBLY FOR STACKED BGA PACKAGES

Patent #:	RE38956	Issue Dt:	01/31/2006	Application #:	10139131	Filing Dt:	05/02/2002
Title:	DATA COMPRESSION CIRCUIT AND METHOD FOR TESTING MEMORY DEVICES

Patent #:	6682628	Issue Dt:	01/27/2004	Application #:	10139299	Filing Dt:	05/02/2002
Publication #:	US20020124957	Pub Dt:	09/12/2002
Title:	METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES

Patent #:	6787834	Issue Dt:	09/07/2004	Application #:	10139987	Filing Dt:	05/07/2002
Publication #:	US20030073284	Pub Dt:	04/17/2003
Title:	EVEN NUCLEATION BETWEEN SILICON AND OXIDE SURFACES FOR THIN SILICON NITRIDE FILM GROWTH

Patent #:	6800927	Issue Dt:	10/05/2004	Application #:	10140296	Filing Dt:	05/06/2002
Publication #:	US20020127797	Pub Dt:	09/12/2002
Title:	MULTIPLE OXIDE THICKNESSES FOR MERGED MEMORY AND LOGIC APPLICATIONS

Patent #:	6887749	Issue Dt:	05/03/2005	Application #:	10140297	Filing Dt:	05/06/2002
Publication #:	US20020127884	Pub Dt:	09/12/2002
Title:	MULTIPLE OXIDE THICKNESSES FOR MERGED MEMORY AND LOGIC APPLICATIONS

Patent #:	6753482	Issue Dt:	06/22/2004	Application #:	10140340	Filing Dt:	05/06/2002
Title:	SEMICONDUCTOR COMPONENT WITH ADJUSTMENT CIRCUITRY AND METHOD OF FABRICATION

Patent #:	7499983	Issue Dt:	03/03/2009	Application #:	10140347	Filing Dt:	05/06/2002
Publication #:	US20030208563	Pub Dt:	11/06/2003
Title:	WEB DISPATCH SERVICE

Patent #:	6795361	Issue Dt:	09/21/2004	Application #:	10140411	Filing Dt:	05/06/2002
Publication #:	US20030206476	Pub Dt:	11/06/2003
Title:	LOW POWER CONSUMPTION MEMORY DEVICE HAVING ROW-TO-COLUMN SHORT

Patent #:	6576557	Issue Dt:	06/10/2003	Application #:	10140580	Filing Dt:	05/07/2002
Title:	SEMICONDUCTOR PROCESSING METHODS

Patent #:	6682955	Issue Dt:	01/27/2004	Application #:	10141447	Filing Dt:	05/08/2002
Publication #:	US20030211655	Pub Dt:	11/13/2003
Title:	STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE

Patent #:	6667910	Issue Dt:	12/23/2003	Application #:	10141837	Filing Dt:	05/10/2002
Publication #:	US20030210572	Pub Dt:	11/13/2003
Title:	METHOD AND APPARATUS FOR DISCHARGING AN ARRAY WELL IN A FLASH MEMORY DEVICE

Patent #:	6904201	Issue Dt:	06/07/2005	Application #:	10142329	Filing Dt:	05/09/2002
Title:	PHASE-CONTROLLED FIBER BRAGG GRATINGS AND MANUFACTURING METHODS

Patent #:	7106367	Issue Dt:	09/12/2006	Application #:	10143093	Filing Dt:	05/13/2002
Publication #:	US20030210334	Pub Dt:	11/13/2003
Title:	INTEGRATED CMOS IMAGER AND MICROCONTROLLER

Patent #:	7187049	Issue Dt:	03/06/2007	Application #:	10143578	Filing Dt:	05/13/2002
Publication #:	US20030210439	Pub Dt:	11/13/2003
Title:	DATA DOWNLOAD TO IMAGER CHIP USING IMAGE SENSOR AS A RECEPTOR

Patent #:	7149857	Issue Dt:	12/12/2006	Application #:	10143896	Filing Dt:	05/14/2002
Publication #:	US20030217239	Pub Dt:	11/20/2003
Title:	OUT OF ORDER DRAM SEQUENCER

Patent #:	6884725	Issue Dt:	04/26/2005	Application #:	10145562	Filing Dt:	05/14/2002
Publication #:	US20020132483	Pub Dt:	09/19/2002
Title:	METHODS OF FORMING MATERIALS WITHIN OPENINGS, AND METHODS OF FORMING ISOLATION REGIONS

Patent #:	RE40282	Issue Dt:	04/29/2008	Application #:	10145606	Filing Dt:	05/09/2002
Title:	EDGE TRANSITION DETECTION CIRCUITRY FOR USE WITH TEST MODE OPERATION OF AN INTEGRATED CIRCUIT MEMORY DEVICE

Patent #:	6720195	Issue Dt:	04/13/2004	Application #:	10145986	Filing Dt:	05/15/2002
Publication #:	US20030215979	Pub Dt:	11/20/2003
Title:	METHODS EMPLOYING ELEVATED TEMPERATURES TO ENHANCE QUALITY CONTROL IN MICROELECTRONIC COMPONENT MANUFACTURE

Patent #:	6738297	Issue Dt:	05/18/2004	Application #:	10146112	Filing Dt:	05/16/2002
Publication #:	US20030179608	Pub Dt:	09/25/2003
Title:	LOW VOLTAGE CURRENT REFERENCE

Patent #:	6716644	Issue Dt:	04/06/2004	Application #:	10146890	Filing Dt:	05/17/2002
Publication #:	US20030216032	Pub Dt:	11/20/2003
Title:	METHOD FOR FORMING MRAM BIT HAVING A BOTTOM SENSE LAYER UTILIZING ELECTROLESS PLATING

Patent #:	7319728	Issue Dt:	01/15/2008	Application #:	10147146	Filing Dt:	05/16/2002
Publication #:	US20030215040	Pub Dt:	11/20/2003
Title:	DELAY LOCKED LOOP WITH FREQUENCY CONTROL

Patent #:	6563712	Issue Dt:	05/13/2003	Application #:	10147176	Filing Dt:	05/16/2002
Publication #:	US20020126452	Pub Dt:	09/12/2002
Title:	HEAT SINK CHIP PACKAGE

Patent #:	6801070	Issue Dt:	10/05/2004	Application #:	10147657	Filing Dt:	05/16/2002
Publication #:	US20030214334	Pub Dt:	11/20/2003
Title:	MEASURE-CONTROLLED CIRCUIT WITH FREQUENCY CONTROL

Patent #:	6897089	Issue Dt:	05/24/2005	Application #:	10150144	Filing Dt:	05/17/2002
Title:	METHOD AND SYSTEM FOR FABRICATING SEMICONDUCTOR COMPONENTS USING WAFER LEVEL CONTACT PRINTING

Patent #:	7112520	Issue Dt:	09/26/2006	Application #:	10150516	Filing Dt:	05/17/2002
Publication #:	US20030164540	Pub Dt:	09/04/2003
Title:	SEMICONDUCTOR DIE PACKAGES WITH RECESSED INTERCONNECTING STRUCTURES AND METHODS FOR ASSEMBLING THE SAME

Patent #:	6790725	Issue Dt:	09/14/2004	Application #:	10150622	Filing Dt:	05/17/2002
Publication #:	US20030215998	Pub Dt:	11/20/2003
Title:	DOUBLE-SIDED CAPACITOR STRUCTURE FOR A SEMICONDUCTOR DEVICE AND A METHOD FOR FORMING THE STRUCTURE

Patent #:	7651910	Issue Dt:	01/26/2010	Application #:	10150623	Filing Dt:	05/17/2002
Publication #:	US20030216000	Pub Dt:	11/20/2003
Title:	METHODS OF FORMING PROGRAMMABLE MEMORY DEVICES

Patent #:	7161237	Issue Dt:	01/09/2007	Application #:	10150653	Filing Dt:	05/17/2002
Publication #:	US20030164548	Pub Dt:	09/04/2003
Title:	FLIP CHIP PACKAGING USING RECESSED INTERPOSER TERMINALS

Patent #:	7145225	Issue Dt:	12/05/2006	Application #:	10150893	Filing Dt:	05/17/2002
Publication #:	US20030164543	Pub Dt:	09/04/2003
Title:	INTERPOSER CONFIGURED TO REDUCE THE PROFILES OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES INCLUDING THE SAME AND METHODS

Patent #:	7348215	Issue Dt:	03/25/2008	Application #:	10150901	Filing Dt:	05/17/2002
Publication #:	US20030166312	Pub Dt:	09/04/2003
Title:	METHODS FOR ASSEMBLY AND PACKAGING OF FLIP CHIP CONFIGURED DICE WITH INTERPOSER

Patent #:	6975035	Issue Dt:	12/13/2005	Application #:	10150902	Filing Dt:	05/17/2002
Publication #:	US20030164541	Pub Dt:	09/04/2003
Title:	METHOD AND APPARATUS FOR DIELECTRIC FILLING OF FLIP CHIP ON INTERPOSER ASSEMBLY

Patent #:	6639268	Issue Dt:	10/28/2003	Application #:	10152649	Filing Dt:	05/20/2002
Publication #:	US20020137271	Pub Dt:	09/26/2002
Title:	FLASH MEMORY WITH ULTRA THIN VERTICAL BODY TRANSISTORS

Patent #:	6624033	Issue Dt:	09/23/2003	Application #:	10152842	Filing Dt:	05/23/2002
Publication #:	US20020127811	Pub Dt:	09/12/2002
Title:	TRENCH DRAM CELL WITH VERTICAL DEVICE AND BURIED WORD LINES

Patent #:	6728851	Issue Dt:	04/27/2004	Application #:	10152969	Filing Dt:	05/20/2002
Title:	INCREASING THE MEMORY PERFORMANCE OF FLASH MEMORY DEVICES BY WRITING SECTORS SIMULTANEOUSLY TO MULTIPLE FLASH MEMORY DEVICES

Patent #:	6548390	Issue Dt:	04/15/2003	Application #:	10153830	Filing Dt:	05/21/2002
Title:	SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY

Patent #:	6597606	Issue Dt:	07/22/2003	Application #:	10154019	Filing Dt:	05/23/2002
Publication #:	US20030002374	Pub Dt:	01/02/2003
Title:	CHARGING A CAPACITANCE OF A MEMORY CELL AND CHARGER

Patent #:	6656767	Issue Dt:	12/02/2003	Application #:	10154549	Filing Dt:	05/24/2002
Title:	METHOD OF FORMING A STACK OF PACKAGED MEMORY DICE

Patent #:	6835592	Issue Dt:	12/28/2004	Application #:	10154640	Filing Dt:	05/24/2002
Publication #:	US20030218237	Pub Dt:	11/27/2003
Title:	METHODS FOR MOLDING A SEMICONDUCTOR DIE PACKAGE WITH ENHANCED THERMAL CONDUCTIVITY

Patent #:	6567288	Issue Dt:	05/20/2003	Application #:	10155132	Filing Dt:	05/23/2002
Publication #:	US20020141220	Pub Dt:	10/03/2002
Title:	BI-LEVEL DIGIT LINE ARCHITECTURE FOR HIGH DENSITY DRAMS

Patent #:	6595406	Issue Dt:	07/22/2003	Application #:	10155317	Filing Dt:	05/23/2002
Publication #:	US20020134819	Pub Dt:	09/26/2002
Title:	CONCAVE FACE WIRE BOND CAPILLARY AND METHOD

Patent #:	6591386	Issue Dt:	07/08/2003	Application #:	10155398	Filing Dt:	05/22/2002
Publication #:	US20020144198	Pub Dt:	10/03/2002
Title:	METHOD TO PREVENT INADVERTENT TEST MODE ENTRY

Patent #:	6838114	Issue Dt:	01/04/2005	Application #:	10155547	Filing Dt:	05/24/2002
Publication #:	US20030219528	Pub Dt:	11/27/2003
Title:	APPARATUS AND METHODS FOR CONTROLLING GAS PULSING IN PROCESSES FOR DEPOSITING MATERIALS ONTO MICRO-DEVICE WORKPIECES

Patent #:	6584897	Issue Dt:	07/01/2003	Application #:	10155654	Filing Dt:	05/23/2002
Publication #:	US20020139257	Pub Dt:	10/03/2002
Title:	METHOD AND STENCIL FOR EXTRUDING MATERIAL ON A SUBSTRATE

Patent #:	6983354	Issue Dt:	01/03/2006	Application #:	10155668	Filing Dt:	05/24/2002
Publication #:	US20030221078	Pub Dt:	11/27/2003
Title:	MEMORY DEVICE SEQUENCER AND METHOD SUPPORTING MULTIPLE MEMORY DEVICE CLOCK SPEEDS

Patent #:	6787450	Issue Dt:	09/07/2004	Application #:	10156097	Filing Dt:	05/29/2002
Publication #:	US20030230808	Pub Dt:	12/18/2003
Title:	HIGH ASPECT RATIO FILL METHOD AND RESULTING STRUCTURE

Patent #:	7251711	Issue Dt:	07/31/2007	Application #:	10156420	Filing Dt:	05/28/2002
Publication #:	US20030225987	Pub Dt:	12/04/2003
Title:	APPARATUS AND METHODS HAVING A COMMAND SEQUENCE

Patent #:	6605489	Issue Dt:	08/12/2003	Application #:	10156976	Filing Dt:	05/29/2002
Publication #:	US20020146862	Pub Dt:	10/10/2002
Title:	METHODS FOR STACKING WIRE-BONDED INTEGRATED CIRCUIT DICE ON FLIP-CHIP BONDED INTEGRATED CIRCUIT DICE

Patent #:	6716719	Issue Dt:	04/06/2004	Application #:	10157049	Filing Dt:	05/29/2002
Publication #:	US20030224569	Pub Dt:	12/04/2003
Title:	METHOD OF FORMING BIASABLE ISOLATION REGIONS USING EPITAXIALLY GROWN SILICON BETWEEN THE ISOLATION REGIONS

Patent #:	6664646	Issue Dt:	12/16/2003	Application #:	10157422	Filing Dt:	05/29/2002
Publication #:	US20020142602	Pub Dt:	10/03/2002
Title:	USE OF RESIDUAL ORGANIC COMPOUNDS TO FACILITATE GATE BREAK ON A CARRIER SUBSTRATE FOR A SEMICONDUCTOR DEVICE

Patent #:	6674177	Issue Dt:	01/06/2004	Application #:	10157479	Filing Dt:	05/29/2002
Publication #:	US20020140111	Pub Dt:	10/03/2002
Title:	APPARATUS FOR IMPLEMENTING SELECTED FUNCTIONALITY ON AN INTEGRATED CIRCUIT DEVICE

Patent #:	6713347	Issue Dt:	03/30/2004	Application #:	10158424	Filing Dt:	05/29/2002
Publication #:	US20020140047	Pub Dt:	10/03/2002
Title:	PROCESS FOR INTEGRATING IN A SAME CHIP A NON-VOLATILE MEMORY AND A HIGH-PERFORMANCE LOGIC CIRCUITRY

Patent #:	6552952	Issue Dt:	04/22/2003	Application #:	10158553	Filing Dt:	05/30/2002
Publication #:	US20020196695	Pub Dt:	12/26/2002
Title:	COLUMN MULTIPLEXER FOR SEMICONDUCTOR MEMORIES

Patent #:	6594180	Issue Dt:	07/15/2003	Application #:	10158554	Filing Dt:	05/30/2002
Publication #:	US20020196662	Pub Dt:	12/26/2002
Title:	SEMICONDUCTOR MEMORY SYSTEM

Patent #:	6710394	Issue Dt:	03/23/2004	Application #:	10158706	Filing Dt:	05/30/2002
Publication #:	US20020140021	Pub Dt:	10/03/2002
Title:	METHOD OF MAKING FLOATING GATE NON-VOLATILE MEMORY CELL WITH LOW ERASING VOLTAGE HAVING DOUBLE LAYER GATE DIELECTRIC

Patent #:	6751139	Issue Dt:	06/15/2004	Application #:	10159085	Filing Dt:	05/29/2002
Publication #:	US20030223294	Pub Dt:	12/04/2003
Title:	INTEGRATED CIRCUIT RESET CIRCUITRY

Patent #:	6871258	Issue Dt:	03/22/2005	Application #:	10159780	Filing Dt:	05/30/2002
Publication #:	US20030028709	Pub Dt:	02/06/2003
Title:	METHOD FOR ERASING AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE, AND AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, IN PARTICULAR AN EEPROM-FLASH MEMORY DEVICE

100

Patent #:	7017099	Issue Dt:	03/21/2006	Application #:	10159782	Filing Dt:	05/30/2002
Publication #:	US20030018861	Pub Dt:	01/23/2003
Title:	METHOD FOR ERROR CONTROL IN MULTILEVEL CELLS WITH CONFIGURABLE NUMBER OF STORED BITS

Assignor

MICRON TECHNOLOGY, INC.

Exec Dt:

04/26/2016

Assignee

U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT

633 WEST FIFTH STREET, 24TH FLOOR

LOS ANGELES, CALIFORNIA 90071

Correspondence name and address
	WSGR, C/O QUI LU, SENIOR PARALEGAL
	650 PAGE MILL ROAD
	FH 2-1 P12
	PALO ALTO, CA 94304

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