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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
05/15/2007
Application #:
10222997
Filing Dt:
08/19/2002
Publication #:
Pub Dt:
08/19/2004
Title:
METHOD OF FORMING VERTICAL SUB-MICRON CMOS TRANSISTORS ON (110), (111), (311), (511), AND HIGHER ORDER SURFACES OF BULK, SOI AND THIN FILM STRUCTURES
2
Patent #:
Issue Dt:
12/30/2003
Application #:
10223257
Filing Dt:
08/15/2002
Title:
DIFFERENTIAL BUFFER HAVING BIAS CURRENT GATED BY ASSOCIATED SIGNAL
3
Patent #:
Issue Dt:
03/29/2005
Application #:
10223315
Filing Dt:
08/19/2002
Publication #:
Pub Dt:
02/19/2004
Title:
ACTIVATION OF OXIDES FOR ELECTROLESS PLATING
4
Patent #:
Issue Dt:
01/27/2004
Application #:
10223425
Filing Dt:
08/19/2002
Publication #:
Pub Dt:
01/02/2003
Title:
CHEMICAL VAPOR DEPOSITION SYSTEMS INCLUDING METAL COMPLEXES WITH CHELATING O- AND/OR N-DONOR LIGANDS
5
Patent #:
Issue Dt:
01/27/2004
Application #:
10223869
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
03/13/2003
Title:
VOLTAGE CONTROLLED OSCILLATORS
6
Patent #:
Issue Dt:
11/09/2004
Application #:
10224102
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
01/02/2003
Title:
METHOD AND APPARATUS FOR PCB ARRAY WITH COMPENSATED SIGNAL PROPAGATION
7
Patent #:
Issue Dt:
05/31/2005
Application #:
10224341
Filing Dt:
08/21/2002
Publication #:
Pub Dt:
02/26/2004
Title:
BURIED TRANSISTORS FOR SILICON ON INSULATOR TECHNOLOGY
8
Patent #:
Issue Dt:
08/31/2004
Application #:
10224451
Filing Dt:
08/21/2002
Publication #:
Pub Dt:
02/26/2004
Title:
HIGH SPEED WORDLINE DECODER FOR DRIVING A LONG WORDLINE
9
Patent #:
Issue Dt:
12/02/2003
Application #:
10224702
Filing Dt:
08/21/2002
Title:
VERTICAL FLASH MEMORY CELL WITH BURIED SOURCE RAIL
10
Patent #:
Issue Dt:
11/30/2004
Application #:
10224771
Filing Dt:
08/21/2002
Publication #:
Pub Dt:
02/26/2004
Title:
NICKEL BONDING CAP OVER COPPER METALIZED BONDPADS
11
Patent #:
Issue Dt:
07/13/2004
Application #:
10224915
Filing Dt:
08/21/2002
Publication #:
Pub Dt:
02/26/2004
Title:
HIGH COUPLING FLOATING GATE TRANSISTOR
12
Patent #:
Issue Dt:
07/06/2004
Application #:
10224950
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
12/19/2002
Title:
APPARATUS AND STRUCTURE FOR RAPID ENABLEMENT
13
Patent #:
Issue Dt:
02/10/2004
Application #:
10224989
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
02/20/2003
Title:
CANCELLATION OF REDUNDANT ELEMENTS WITH A CANCEL BANK
14
Patent #:
Issue Dt:
03/28/2006
Application #:
10225190
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
02/26/2004
Title:
METHOD OF MANUFACTURE OF A RESISTANCE VARIABLE MEMORY CELL
15
Patent #:
Issue Dt:
08/05/2003
Application #:
10225315
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
04/03/2003
Title:
PROCESS FOR MANUFACTURING ELECTRONIC DEVICES COMPRISING NONVOLATILE MEMORY CELLS OF REDUCED DIMENSIONS
16
Patent #:
Issue Dt:
03/22/2005
Application #:
10225428
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
02/26/2004
Title:
DUAL-SIDED CAPACITOR
17
Patent #:
Issue Dt:
02/03/2004
Application #:
10225513
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
04/10/2003
Title:
EEPROM FLASH MEMORY ERASABLE LINE BY LINE
18
Patent #:
Issue Dt:
06/15/2004
Application #:
10225570
Filing Dt:
08/20/2002
Publication #:
Pub Dt:
09/25/2003
Title:
MAGNETIC TUNNELING JUNCTION ANTIFUSE DEVICE
19
Patent #:
Issue Dt:
05/25/2004
Application #:
10225575
Filing Dt:
08/21/2002
Publication #:
Pub Dt:
02/26/2004
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR ASSEMBLING MICROELECTRONIC DEVICES
20
Patent #:
Issue Dt:
02/24/2004
Application #:
10225584
Filing Dt:
08/21/2002
Publication #:
Pub Dt:
02/26/2004
Title:
DUAL-DAMASCENE BIT LINE STRUCTURES FOR MICROELECTRONIC DEVICES AND METHODS OF FABRICATING MICROELECTRONIC DEVICES
21
Patent #:
Issue Dt:
09/07/2004
Application #:
10225606
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
12/26/2002
Title:
MULTILEVEL LEADFRAME FOR A PACKAGED INTEGRATED CIRCUIT AND METHOD OF FABRICATION
22
Patent #:
Issue Dt:
09/28/2004
Application #:
10225907
Filing Dt:
08/21/2002
Publication #:
Pub Dt:
04/10/2003
Title:
CIRCUIT BOARDS CONTAINING VIAS AND METHODS FOR PRODUCING SAME
23
Patent #:
Issue Dt:
08/09/2005
Application #:
10226070
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
02/26/2004
Title:
MULTI-DIE SEMICONDUCTOR PACKAGE
24
Patent #:
Issue Dt:
11/29/2005
Application #:
10226283
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
SOI DEVICE HAVING INCREASED RELIABILITY AND REDUCED FREE FLOATING BODY EFFECTS
25
Patent #:
Issue Dt:
12/06/2005
Application #:
10226327
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
RESET VOLTAGE GENERATION CIRCUIT FOR CMOS IMAGERS
26
Patent #:
Issue Dt:
05/10/2005
Application #:
10226472
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
SEMICONDUCTOR COMPONENT WITH ON BOARD CAPACITOR AND METHOD OF FABRICATION
27
Patent #:
Issue Dt:
04/06/2004
Application #:
10226488
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
02/26/2004
Title:
PROCESS VARIATION RESISTANT SELF ALIGNED CONTACT ETCH
28
Patent #:
Issue Dt:
01/25/2005
Application #:
10226509
Filing Dt:
08/22/2002
Publication #:
Pub Dt:
02/26/2004
Title:
APPARATUS AND METHOD FOR DEPOSITING AND REFLOWING SOLDER PASTE ON A MICROELECTRONIC WORKPIECE
29
Patent #:
Issue Dt:
04/26/2005
Application #:
10226573
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
REACTORS HAVING GAS DISTRIBUTORS AND METHODS FOR DEPOSITING MATERIALS ONTO MICRO-DEVICE WORKPIECES
30
Patent #:
Issue Dt:
04/27/2004
Application #:
10226782
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
CONTROLLING A DELAY LOCK LOOP CIRCUIT
31
Patent #:
Issue Dt:
07/08/2003
Application #:
10226849
Filing Dt:
08/22/2002
Title:
DEPOSITION AND CHAMBER TREATMENT METHODS
32
Patent #:
Issue Dt:
09/14/2004
Application #:
10227240
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
POWER REDUCTION IN CMOS IMAGERS BY TRIMMING OF MASTER CURRENT REFERENCE
33
Patent #:
Issue Dt:
05/11/2004
Application #:
10227317
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
01/02/2003
Title:
METHOD AND APPARATUS FOR MARKING A BARE SEMICONDUCTOR DIE
34
Patent #:
Issue Dt:
02/24/2004
Application #:
10227329
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
02/26/2004
Title:
STRESS BALANCED SEMICONDUCTOR PACKAGES, METHOD OF FABRICATION AND MODIFIED MOLD SEGMENT
35
Patent #:
Issue Dt:
08/05/2003
Application #:
10227369
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
12/26/2002
Title:
METHOD FOR GRAVITATION-ASSISTED CONTROL OF SPREAD OF VISCOUS MATERIAL APPLIED TO A SUBSTRATE
36
Patent #:
Issue Dt:
05/03/2005
Application #:
10227608
Filing Dt:
08/23/2002
Publication #:
Pub Dt:
12/25/2003
Title:
VOLTAGE LEVEL SHIFTING CIRCUIT WITH IMPROVED SWITCHING SPEED
37
Patent #:
Issue Dt:
08/19/2003
Application #:
10227699
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
01/02/2003
Title:
FORMATION OF METAL OXIDE GATE DIELECTRIC
38
Patent #:
Issue Dt:
02/22/2005
Application #:
10227734
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
PRECONDITIONING GLOBAL BITLINES
39
Patent #:
Issue Dt:
10/26/2004
Application #:
10227965
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
HIGH SPEED LOW VOLTAGE DRIVER
40
Patent #:
Issue Dt:
01/13/2004
Application #:
10228062
Filing Dt:
08/27/2002
Title:
MRAM MEMORY ELEMENT
41
Patent #:
Issue Dt:
08/02/2005
Application #:
10228116
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
SELECTIVELY CONFIGURABLE MICROELECTRONIC PROBES
42
Patent #:
Issue Dt:
01/11/2005
Application #:
10228597
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND APPARATUS FOR ERASING MEMORY
43
Patent #:
Issue Dt:
03/17/2009
Application #:
10228617
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
10/21/2004
Title:
METHOD FOR PACKAGING A TAPE SUBSTRATE
44
Patent #:
Issue Dt:
08/03/2004
Application #:
10228619
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
MAGNETIC NON-VOLATILE MEMORY COIL LAYOUT ARCHITECTURE AND PROCESS INTEGRATION SCHEME
45
Patent #:
Issue Dt:
05/17/2005
Application #:
10228695
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/20/2003
Title:
FIELD CORRECTION OF OVERLAY ERROR
46
Patent #:
Issue Dt:
12/23/2003
Application #:
10228697
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
12/19/2002
Title:
METHOD AND APPARATUS FOR REDUCING FIXED CHARGE IN SEMICONDUCTOR DEVICE LAYERS
47
Patent #:
Issue Dt:
12/06/2005
Application #:
10228703
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
PSEUDO CMOS DYNAMIC LOGIC WITH DELAYED CLOCKS
48
Patent #:
Issue Dt:
05/25/2004
Application #:
10228704
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
DIFFERENTIAL AMPLIFIER COMMON MODE NOISE COMPENSATION
49
Patent #:
Issue Dt:
02/24/2004
Application #:
10228732
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
01/02/2003
Title:
METHODS, STRUCTURES, AND CIRCUITS FOR TRANSISTORS WITH GATE-TO-BODY CAPACITIVE COUPLING
50
Patent #:
Issue Dt:
07/05/2005
Application #:
10228771
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
02/12/2004
Title:
TEMPORARY, CONFORMABLE CONTACTS FOR MICROELECTRONIC COMPONENTS
51
Patent #:
Issue Dt:
05/24/2005
Application #:
10228823
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/27/2003
Title:
METAL-POLY INTEGRATED CAPACITOR STRUCTURE
52
Patent #:
Issue Dt:
06/15/2004
Application #:
10228824
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/20/2003
Title:
FLASH MEMORY ARRAY ARCHITECTURE
53
Patent #:
Issue Dt:
01/23/2007
Application #:
10228839
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
CROSS DIFFUSION BARRIER LAYER IN POLYSILICON
54
Patent #:
Issue Dt:
01/11/2005
Application #:
10228864
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/20/2003
Title:
FIELD CORRECTION OF OVERLAY ERROR
55
Patent #:
Issue Dt:
09/19/2006
Application #:
10228947
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
AUTOMATIC COLOR CONSTANCY FOR IMAGE SENSORS
56
Patent #:
Issue Dt:
07/19/2005
Application #:
10229136
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
SINGLE SUBSTRATE ANNEALING OF MAGNETORESISTIVE STRUCTURE
57
Patent #:
Issue Dt:
04/19/2005
Application #:
10229139
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
DEVICE HAVING REDUCED DIFFUSION THROUGH FERROMAGNETIC MATERIALS
58
Patent #:
Issue Dt:
08/23/2005
Application #:
10229330
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND APPARATUS FOR DESIGNING A PATTERN ON A SEMICONDUCTOR SURFACE
59
Patent #:
Issue Dt:
06/29/2004
Application #:
10229336
Filing Dt:
08/26/2002
Publication #:
Pub Dt:
02/26/2004
Title:
SEMICONDUCTOR CONSTRUCTIONS
60
Patent #:
Issue Dt:
02/24/2004
Application #:
10229364
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/27/2003
Title:
TEMPERATURE AND VOLTAGE COMPENSATED REFERENCE CURRENT GENERATOR
61
Patent #:
Issue Dt:
12/30/2003
Application #:
10229399
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/27/2003
Title:
HIGH VOLTAGE LOW POWER SENSING DEVICE FOR FLASH MEMORY
62
Patent #:
Issue Dt:
01/20/2004
Application #:
10229476
Filing Dt:
08/28/2002
Title:
VERTICAL FLOATING GATE TRANSISTOR
63
Patent #:
Issue Dt:
10/25/2005
Application #:
10229627
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
SYSTEMS AND METHODS FOR FORMING METAL OXIDES USING METAL ORGANO-AMINES AND METAL ORGANO-OXIDES
64
Patent #:
Issue Dt:
08/31/2004
Application #:
10229653
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
SYSTEMS AND METHODS FOR FORMING REFRACTORY METAL OXIDE LAYERS
65
Patent #:
Issue Dt:
05/30/2006
Application #:
10229702
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
OUTPUT DATA COMPRESSION SCHEME USING TRI-STATE
66
Patent #:
Issue Dt:
09/26/2006
Application #:
10229779
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
07/28/2005
Title:
SYSTEMS AND METHODS FOR FORMING ZIRCONIUM AND/OR HAFNIUM-CONTAINING LAYERS
67
Patent #:
Issue Dt:
09/28/2004
Application #:
10229824
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
VERTICALLY INTEGRATED FLASH MEMORY CELL AND METHOD OF FABRICATING A VERTICALLY INTEGRATED FLASH MEMORY CELL
68
Patent #:
Issue Dt:
07/26/2005
Application #:
10229835
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
01/02/2003
Title:
A METHOD FOR A SEMICONDUCTOR ASSEMBLY HAVING A SEMICDUCTOR DIE WITH HEAT SPREADERS
69
Patent #:
Issue Dt:
06/14/2005
Application #:
10229837
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
01/09/2003
Title:
THIN FLIP-CHIP METHOD
70
Patent #:
Issue Dt:
08/08/2006
Application #:
10229841
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
SYSTEMS AND METHODS FOR FORMING METAL OXIDES USING METAL COMPOUNDS CONTAINING AMINOSILANE LIGANDS
71
Patent #:
Issue Dt:
11/23/2004
Application #:
10229865
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
01/09/2003
Title:
INTEGRATED CIRCUITRY
72
Patent #:
Issue Dt:
12/04/2007
Application #:
10229866
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND SYSTEM FOR TRANSFERRING DATA TO AN ELECTRONIC TOY OR OTHER ELECTRONIC DEVICE
73
Patent #:
Issue Dt:
11/16/2004
Application #:
10229886
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
07/24/2003
Title:
SEMICONDUCTOR CONSTRUCTIONS
74
Patent #:
Issue Dt:
01/06/2004
Application #:
10229887
Filing Dt:
08/27/2002
Title:
ATOMIC LAYER DEPOSITION METHODS
75
Patent #:
Issue Dt:
05/24/2005
Application #:
10229901
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
05/15/2003
Title:
VOLTAGE CLAMP CIRCUIT
76
Patent #:
Issue Dt:
01/17/2006
Application #:
10229908
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
MULTIPLE CHIP SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING SAME
77
Patent #:
Issue Dt:
11/15/2005
Application #:
10229914
Filing Dt:
08/27/2002
Publication #:
Pub Dt:
03/04/2004
Title:
MULTI-CHIP WAFER LEVEL SYSTEM PACKAGES AND METHODS OF FORMING SAME
78
Patent #:
Issue Dt:
08/02/2005
Application #:
10229920
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/27/2003
Title:
CONDITIONED AND ROBUST ULTRA-LOW POWER POWER-ON RESET SEQUENCER FOR INTEGRATED CIRCUITS
79
Patent #:
Issue Dt:
04/06/2004
Application #:
10229921
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
04/03/2003
Title:
FLASH MEMORY SECTOR TAGGING FOR CONSECUTIVE SECTOR ERASE OR BANK ERASE
80
Patent #:
Issue Dt:
03/29/2005
Application #:
10229968
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
01/09/2003
Title:
DIE STACKING SCHEME
81
Patent #:
Issue Dt:
03/22/2005
Application #:
10229969
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
01/09/2003
Title:
SEMICONDUCTOR/PRINTED CIRCUIT BOARD ASSEMBLY, AND COMPUTER SYSTEM
82
Patent #:
Issue Dt:
05/17/2005
Application #:
10230005
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
04/10/2003
Title:
PACKAGED STACKED SEMICONDUCTOR DIE AND METHOD OF PREPARING SAME
83
Patent #:
Issue Dt:
05/04/2004
Application #:
10230131
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
SYSTEMS AND METHODS FOR FORMING STRONTIUM- AND/OR BARIUM-CONTAINING LAYERS
84
Patent #:
Issue Dt:
01/16/2007
Application #:
10230189
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD OF FORMING A RESISTANCE VARIABLE MEMORY ELEMENT
85
Patent #:
Issue Dt:
05/18/2004
Application #:
10230191
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD TO ISOLATE DEVICE LAYER EDGES THROUGH MECHANICAL SPACING
86
Patent #:
Issue Dt:
08/07/2007
Application #:
10230193
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/04/2004
Title:
SYSTEMS AND METHODS FOR FORMING METAL OXIDES USING METAL DIKETONATES AND/OR KETOIMINES
87
Patent #:
Issue Dt:
11/23/2004
Application #:
10230203
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
REVERSE METAL PROCESS FOR CREATING A METAL SILICIDE TRANSISTOR GATE STRUCTURE
88
Patent #:
Issue Dt:
03/28/2006
Application #:
10230211
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
MEMORY TECHNOLOGY TEST APPARATUS
89
Patent #:
Issue Dt:
08/24/2004
Application #:
10230300
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
MRAM SENSE LAYER AREA CONTROL
90
Patent #:
Issue Dt:
02/15/2005
Application #:
10230327
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/18/2004
Title:
GRADED GEXSE100-X CONCENTRATION IN PCRAM
91
Patent #:
Issue Dt:
03/30/2004
Application #:
10230355
Filing Dt:
08/28/2002
Publication #:
Pub Dt:
03/27/2003
Title:
ULTRA LOW POWER TRACKED LOW VOLTAGE REFERENCE SOURCE
92
Patent #:
Issue Dt:
04/26/2005
Application #:
10230459
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHODS FOR WAFER-LEVEL PACKAGING OF MICROELECTRONIC DEVICES AND MICROELECTRONIC DEVICES FORMED BY SUCH METHODS
93
Patent #:
Issue Dt:
05/18/2004
Application #:
10230523
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
DOUBLE-DOPED POLYSILICON FLOATING GATE
94
Patent #:
Issue Dt:
07/27/2004
Application #:
10230546
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND APPARATUS FOR LATENCY SPECIFIC DUTY CYCLE CORRECTION
95
Patent #:
Issue Dt:
06/29/2004
Application #:
10230553
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
INPUT BUFFER WITH SELECTABLE OPERATIONAL CHARACTERISTICS
96
Patent #:
Issue Dt:
09/21/2004
Application #:
10230568
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
ANNULAR GATE AND TECHNIQUE FOR FABRICATING AN ANNULAR GATE
97
Patent #:
Issue Dt:
07/12/2005
Application #:
10230569
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
12/26/2002
Title:
METHODS OF FABRICATING A MOLDED BALL GRID ARRAY
98
Patent #:
Issue Dt:
04/05/2005
Application #:
10230570
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD OF ETCHING MATERIALS PATTERNED WITH A SINGLE LAYER 193NM RESIST
99
Patent #:
Issue Dt:
12/25/2007
Application #:
10230592
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS
100
Patent #:
Issue Dt:
10/31/2006
Application #:
10230602
Filing Dt:
08/29/2002
Publication #:
Pub Dt:
03/04/2004
Title:
METHOD AND APPARATUS FOR SIMULTANEOUSLY REMOVING MULTIPLE CONDUCTIVE MATERIALS FROM MICROELECTRONIC SUBSTRATES
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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