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02/17/2004
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10243889
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09/12/2002
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01/16/2003
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02/15/2005
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10244122
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09/12/2002
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05/15/2003
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09/12/2006
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09/17/2002
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02/13/2003
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03/30/2004
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09/17/2002
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03/18/2004
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08/10/2004
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10246318
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09/17/2002
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01/30/2003
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05/30/2006
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10246615
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09/17/2002
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01/23/2003
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02/08/2005
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10246944
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09/18/2002
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03/18/2004
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10/10/2006
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10247972
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09/20/2002
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02/06/2003
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01/27/2004
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09/19/2002
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02/06/2003
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05/11/2004
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10252295
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09/23/2002
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03/25/2004
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03/08/2005
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10256037
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09/25/2002
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03/06/2003
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01/09/2007
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10256475
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09/27/2002
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04/01/2004
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08/07/2007
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09/27/2002
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07/03/2003
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POWER MANAGEMENT SYSTEM
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12/15/2009
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09/27/2002
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04/10/2003
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MEMORY SYSTEM FOR DATA STORAGE AND RETRIEVAL
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11/09/2004
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10259252
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09/26/2002
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04/24/2003
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09/09/2003
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10259375
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09/30/2002
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02/06/2003
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06/15/2004
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10260074
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09/27/2002
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07/03/2003
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NON-VOLATILE MEMORY CONTROL
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03/23/2004
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10260135
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09/27/2002
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08/21/2003
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MEMORY CONTROLLER
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02/27/2007
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10260136
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09/27/2002
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07/03/2003
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DATA PROCESSING
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02/14/2006
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10260180
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09/27/2002
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05/29/2003
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DATA HANDLING SYSTEM
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05/24/2005
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10260181
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09/27/2002
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04/03/2003
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MEMORY SYSTEM SECTORS
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03/04/2008
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10260259
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09/27/2002
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09/04/2003
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12/19/2006
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10260615
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10/01/2002
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02/13/2003
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SEMICONDUCTOR PACKAGE HAVING EXPOSED HEAT DISSIPATING SURFACE AND METHOD OF FABRICATION
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02/27/2007
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10260818
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09/30/2002
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04/01/2004
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PUBLIC KEY CRYPTOGRAPHY USING MATRICES
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09/30/2003
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10261735
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09/30/2002
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03/06/2003
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DEPOSITION METHODS
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09/26/2006
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10261920
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10/01/2002
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02/06/2003
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PLASMA ETCHING SYSTEM AND METHOD
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07/18/2006
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10262214
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09/30/2002
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04/01/2004
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UPDATING STACK POINTER BASED ON INSTRUCTION BIT INDICATOR WITHOUT EXECUTING AN UPDATE MICROINSTRUCTION
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03/01/2005
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10263490
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10/03/2002
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03/27/2003
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RADIATION SHIELDING FOR FIELD EMITTERS
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03/29/2005
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10263608
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10/02/2002
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04/08/2004
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SEMICONDUCTOR CONSTRUCTIONS COMPRISING THREE-DIMENSIONAL THIN FILM TRANSISTOR DEVICES AND RESISTORS
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08/16/2005
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10263921
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10/03/2002
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03/27/2003
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METHOD OF PASSIVATING AN OXIDE SURFACE SUBJECTED TO A CONDUCTIVE MATERIAL ANNEAL
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07/19/2005
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10264008
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10/02/2002
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04/08/2004
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CONSTANT DELAY ZERO STANDBY DIFFERENTIAL LOGIC RECEIVER AND METHOD
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09/02/2003
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10264047
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10/04/2002
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02/06/2003
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STACKABLE SEMICONDUCTOR PACKAGE HAVING CONDUCTIVE LAYER AND INSULATING LAYERS
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02/14/2006
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10264575
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10/03/2002
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04/08/2004
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TFT-BASED COMMON GATE CMOS INVERTERS, AND COMPUTER SYSTEMS UTILIZING NOVEL CMOS INVERTERS
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04/05/2005
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10264615
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10/03/2002
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02/20/2003
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SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY
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03/01/2005
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10264676
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10/03/2002
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04/24/2003
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Integrated circuitry comprising insulative collars and integrated circuitry comprising sidewall spacers over a conductive line projecting outwardly from a first insulative material
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05/18/2004
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10264677
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10/03/2002
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02/13/2003
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RESISTANCE VARIABLE DEVICE, ANALOG MEMORY DEVICE, AND PROGRAMMABLE MEMORY CELL
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11/16/2004
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10265426
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10/07/2002
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02/13/2003
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SILICON ON INSULATOR DRAM PROCESS UTILIZING BOTH FULLY AND PARTIALLY DEPLETED DEVICES
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08/14/2007
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10266226
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10/07/2002
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04/08/2004
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GENERATING ANIMATION FROM VISUAL AND AUDIO INPUT
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10/07/2003
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10266464
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10/08/2002
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02/13/2003
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STEREOLITHOGRAPHIC METHOD AND APPARATUS FOR FABRICATING SPACERS FOR SEMICONDUCTOR DEVICES AND RESULTING STRUCTURES
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11/30/2004
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10267033
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10/07/2002
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04/10/2003
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PROCESS FOR MANUFACTURING A DUAL CHARGE STORAGE LOCATION MEMORY CELL
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02/10/2004
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10267063
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10/07/2002
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02/20/2003
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METHODS FOR UTILIZATION OF DISAPPEARING SILICON HARD MASK FOR FABRICATION OF SEMICONDUCTOR STRUCTURES
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06/15/2004
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10267225
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10/08/2002
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05/29/2003
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METHOD AND CIRCUIT FOR LIMITING A PUMPED VOLTAGE
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06/22/2004
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10267278
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10/08/2002
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05/29/2003
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METHOD AND CIRCUIT FOR LIMITING A PUMPED VOLTAGE
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08/24/2004
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10267499
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10/09/2002
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03/13/2003
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SEMICONDUCTOR CONTAINER STRUCTURE WITH DIFFUSION BARRIER
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01/04/2005
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10267991
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10/10/2002
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02/13/2003
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SENSE AMPLIFIER AND ARCHITECTURE FOR OPEN DIGIT ARRAYS
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11/15/2005
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10268313
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10/10/2002
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04/15/2004
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BULK NODE BIASING METHOD AND APPARATUS
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12/30/2003
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10268353
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10/10/2002
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03/06/2003
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MULTIPLE BIT LINE COLUMN REDUNDANCY
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04/06/2004
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10268578
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10/10/2002
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12/16/2003
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10268715
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10/10/2002
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02/20/2003
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MULTIPLE BIT LINE COLUMN REDUNDANCY
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11/06/2007
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10268737
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10/09/2002
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03/20/2003
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INTEGRATED CIRCUITRY
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07/04/2006
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10269191
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10/11/2002
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03/20/2003
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LEAD FRAME DECOUPLING CAPACITOR, SEMICONDUCTOR DEVICE PACKAGES INCLUDING THE SAME AND METHODS
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11/18/2003
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10269302
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10/11/2002
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06/14/2005
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10/10/2002
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04/10/2003
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DUAL-PHASE DELAY-LOCKED LOOP CIRCUIT AND METHOD
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03/16/2004
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10270004
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10/15/2002
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02/13/2003
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METHOD OF CONSTRUCTING A VERY WIDE, VERY FAST, DISTRIBUTED MEMORY
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08/24/2004
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10270150
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10/15/2002
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02/27/2003
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NOVEL DRAM ACCESS TRANSISTOR
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01/04/2005
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10270866
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10/15/2002
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02/13/2003
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LIGHTLY DOPED DRAIN MOS TRANSISTOR
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05/10/2005
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10271352
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10/15/2002
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05/08/2003
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NONVOLATILE MEMORY DEVICE WITH DOUBLE SERIAL/PARALLEL COMMUNICATION INTERFACE
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10/28/2003
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10271888
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10/15/2002
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03/27/2003
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METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
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12/09/2003
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10272980
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10/18/2002
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02/13/2003
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METHOD OF FORMING NOBLE METAL PATTERN
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07/06/2004
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10273053
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Filing Dt:
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10/17/2002
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Publication #:
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Pub Dt:
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02/13/2003
| | | | |
Title:
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STACKED GATE REGION OF A NONVOLATILE MEMORY CELL FOR A COMPUTER
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Patent #:
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Issue Dt:
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12/30/2003
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Application #:
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10273667
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Filing Dt:
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10/18/2002
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Publication #:
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Pub Dt:
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03/20/2003
| | | | |
Title:
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DIELECTRIC LAYER FOR SEMICONDUCTOR DEVICE HAVING LESS CURRENT LEAKAGE AND INCREASED CAPACITANCE
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Patent #:
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Issue Dt:
|
02/03/2004
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Application #:
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10273689
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Filing Dt:
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10/18/2002
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Publication #:
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Pub Dt:
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02/27/2003
| | | | |
Title:
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GATE ENHANCED TRI-CHANNEL POSITIVE CHARGE PUMP
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Patent #:
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Issue Dt:
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04/05/2005
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Application #:
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10273869
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Filing Dt:
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10/17/2002
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Publication #:
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Pub Dt:
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04/22/2004
| | | | |
Title:
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APPARATUS AND METHOD FOR MOUNTING MICROELECTRONIC DEVICES ON A MIRRORED BOARD ASSEMBLY
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Patent #:
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Issue Dt:
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06/08/2004
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Application #:
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10274030
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Filing Dt:
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10/21/2002
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Publication #:
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Pub Dt:
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05/08/2003
| | | | |
Title:
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NOVEL RETICLE DESIGN FOR ALTERNATING PHASE SHIFT MASK
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Patent #:
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Issue Dt:
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09/07/2004
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Application #:
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10274156
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Filing Dt:
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10/21/2002
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Publication #:
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Pub Dt:
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03/27/2003
| | | | |
Title:
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METHOD OF FORMING A METAL TO POLYSILICON CONTACT IN OXYGEN ENVIRONMENT
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Patent #:
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Issue Dt:
|
05/27/2003
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Application #:
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10274773
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Filing Dt:
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10/21/2002
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Publication #:
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Pub Dt:
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02/20/2003
| | | | |
Title:
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CIRCUIT AND METHOD FOR REDUCING MEMORY IDLE CYCLES
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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10277063
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Filing Dt:
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10/21/2002
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Publication #:
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Pub Dt:
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05/08/2003
| | | | |
Title:
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SHARED REDUNDANCY FOR MEMORY HAVING COLUMN ADDRESSING
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Patent #:
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Issue Dt:
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05/18/2004
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Application #:
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10277183
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Filing Dt:
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10/21/2002
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Publication #:
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Pub Dt:
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05/15/2003
| | | | |
Title:
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EEPROM MEMORY COMPRISING MEANS FOR SIMULTANEOUS READING OF SPECIAL BITS OF A FIRST AND SECOND TYPE
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Patent #:
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Issue Dt:
|
12/02/2003
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Application #:
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10277866
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Filing Dt:
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10/22/2002
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Publication #:
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Pub Dt:
|
03/20/2003
| | | | |
Title:
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METHOD TO FIND A VALUE WITHIN A RANGE USING WEIGHTED SUBRANGES
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Patent #:
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Issue Dt:
|
09/14/2004
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Application #:
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10277923
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Filing Dt:
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10/23/2002
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Publication #:
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Pub Dt:
|
03/20/2003
| | | | |
Title:
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USE OF ATOMIC OXYGEN PROCESS FOR IMPROVED BARRIER LAYER
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Patent #:
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Issue Dt:
|
02/22/2005
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Application #:
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10278138
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Filing Dt:
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10/21/2002
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Publication #:
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Pub Dt:
|
03/27/2003
| | | | |
Title:
|
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
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Patent #:
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Issue Dt:
|
03/02/2004
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Application #:
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10278160
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Filing Dt:
|
10/21/2002
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Publication #:
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|
Pub Dt:
|
03/27/2003
| | | | |
Title:
|
METHODS AND APPARATUSES FOR MONITORING AND CONTROLLING MECHANICAL OR CHEMICAL-MECHANICAL PLANARIZATION OF MICROELECTRONIC SUBSTRATE ASSEMBLIES
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Patent #:
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Issue Dt:
|
09/23/2003
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Application #:
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10278324
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Filing Dt:
|
10/23/2002
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Publication #:
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Pub Dt:
|
02/27/2003
| | | | |
Title:
|
SEMICONDUCTOR STRUCTURE, CAPACITOR, MASK AND METHODS OF MANUFACTURE THEREOF
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Patent #:
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Issue Dt:
|
08/02/2005
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Application #:
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10279094
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Filing Dt:
|
10/24/2002
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Publication #:
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|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
USE OF GATE ELECTRODE WORKFUNCTION TO IMPROVE DRAM REFRESH
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Patent #:
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|
Issue Dt:
|
10/21/2003
|
Application #:
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10279139
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Filing Dt:
|
10/22/2002
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Title:
|
MRAM SENSE LAYER ISOLATION
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|
Patent #:
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|
Issue Dt:
|
11/25/2003
|
Application #:
|
10280180
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Filing Dt:
|
10/25/2002
|
Publication #:
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Pub Dt:
|
03/06/2003
| | | | |
Title:
|
OPEN PATTERN INDUCTOR
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|
|
Patent #:
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|
Issue Dt:
|
08/15/2006
|
Application #:
|
10280184
|
Filing Dt:
|
10/25/2002
|
Publication #:
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|
Pub Dt:
|
03/06/2003
| | | | |
Title:
|
OPEN PATTERN INDUCTOR
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|
Patent #:
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|
Issue Dt:
|
01/11/2005
|
Application #:
|
10280200
|
Filing Dt:
|
10/25/2002
|
Publication #:
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|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
SUBSTRATE MAPPING
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|
|
Patent #:
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|
Issue Dt:
|
06/05/2007
|
Application #:
|
10280387
|
Filing Dt:
|
10/25/2002
|
Publication #:
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|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
METHOD OF IMPROVED HIGH K DIELECTRIC-POLYSILICON INTERFACE FOR CMOS DEVICES
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|
|
Patent #:
|
|
Issue Dt:
|
05/03/2005
|
Application #:
|
10280415
|
Filing Dt:
|
10/25/2002
|
Publication #:
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|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
SUBSTRATE MAPPING
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|
|
Patent #:
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|
Issue Dt:
|
06/22/2004
|
Application #:
|
10280452
|
Filing Dt:
|
10/25/2002
|
Publication #:
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|
Pub Dt:
|
03/20/2003
| | | | |
Title:
|
SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
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Patent #:
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Issue Dt:
|
06/12/2007
|
Application #:
|
10280458
|
Filing Dt:
|
10/24/2002
|
Publication #:
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|
Pub Dt:
|
04/29/2004
| | | | |
Title:
|
METHOD AND APPARATUS FOR INDEPENDENT CONTROL OF DEVICES UNDER TEST CONNECTED IN PARALLEL
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Patent #:
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Issue Dt:
|
12/27/2005
|
Application #:
|
10281078
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Filing Dt:
|
10/24/2002
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
Title:
|
FAST PROGRAMMING METHOD FOR NONVOLATILE MEMORIES, IN PARTICULAR FLASH MEMORIES, AND RELATIVE MEMORY ARCHITECTURE
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Patent #:
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Issue Dt:
|
09/27/2005
|
Application #:
|
10281153
|
Filing Dt:
|
10/28/2002
|
Publication #:
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|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
AGGLOMERATION ELIMINATION FOR METAL SPUTTER DEPOSITION OF CHALCOGENIDES
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|
Patent #:
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|
Issue Dt:
|
04/12/2005
|
Application #:
|
10281159
|
Filing Dt:
|
10/28/2002
|
Publication #:
|
|
Pub Dt:
|
03/13/2003
| | | | |
Title:
|
AGGLOMERATION ELIMINATION FOR METAL SPUTTER DEPOSITION OF CHALCOGENIDES
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Patent #:
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|
Issue Dt:
|
10/30/2007
|
Application #:
|
10281857
|
Filing Dt:
|
10/28/2002
|
Publication #:
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|
Pub Dt:
|
04/29/2004
| | | | |
Title:
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ANALYZING INTERCONNECT STRUCTURES
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|
Patent #:
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|
Issue Dt:
|
08/31/2004
|
Application #:
|
10282405
|
Filing Dt:
|
10/29/2002
|
Publication #:
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|
Pub Dt:
|
04/29/2004
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE HAVING MULTI-LAYER LEADFRAME AND METHOD OF FABRICATION
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Patent #:
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Issue Dt:
|
11/04/2003
|
Application #:
|
10282534
|
Filing Dt:
|
10/28/2002
|
Publication #:
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|
Pub Dt:
|
03/27/2003
| | | | |
Title:
|
WRITE-ONCE POLYMER MEMORY WITH E-BEAM WRITING AND READING
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Patent #:
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Issue Dt:
|
03/02/2004
|
Application #:
|
10283308
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Filing Dt:
|
10/30/2002
|
Publication #:
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|
Pub Dt:
|
03/20/2003
| | | | |
Title:
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DISTRIBUTED CELL PLATE AND/OR DIGIT EQUILIBRATE VOLTAGE GENERATOR
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Patent #:
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Issue Dt:
|
09/13/2005
|
Application #:
|
10283316
|
Filing Dt:
|
10/30/2002
|
Publication #:
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|
Pub Dt:
|
03/20/2003
| | | | |
Title:
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PROCESS FOR LOW TEMPERATURE ATOMIC LAYER DEPOSITION OF RH
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Patent #:
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Issue Dt:
|
09/16/2003
|
Application #:
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10283774
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Filing Dt:
|
10/29/2002
|
Publication #:
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|
Pub Dt:
|
09/18/2003
| | | | |
Title:
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METHODS OF FORMING PROTECTIVE SEQMENTS OF MATERIAL, AND ETCH STOPS
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|
Patent #:
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Issue Dt:
|
06/26/2007
|
Application #:
|
10283920
|
Filing Dt:
|
10/30/2002
|
Publication #:
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|
Pub Dt:
|
05/06/2004
| | | | |
Title:
|
METHODS AND APPARATUS FOR CONFIGURING HARDWARE RESOURCES IN A PRE-BOOT ENVIRONMENT WITHOUT REQUIRING A SYSTEM RESET
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Patent #:
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Issue Dt:
|
08/30/2005
|
Application #:
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10284681
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Filing Dt:
|
10/31/2002
|
Publication #:
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|
Pub Dt:
|
05/06/2004
| | | | |
Title:
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GAS DELIVERY SYSTEM FOR DEPOSITION PROCESSES, AND METHODS OF USING SAME
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Patent #:
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Issue Dt:
|
01/02/2007
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Application #:
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10284724
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Filing Dt:
|
10/30/2002
|
Publication #:
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|
Pub Dt:
|
05/06/2004
| | | | |
Title:
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EFFICIENT ECHO CANCELLATION TECHNIQUES
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Patent #:
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Issue Dt:
|
07/11/2006
|
Application #:
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10284808
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Filing Dt:
|
10/31/2002
|
Publication #:
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|
Pub Dt:
|
05/06/2004
| | | | |
Title:
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METHODS, CIRCUITS, AND APPLICATIONS USING A RESISTOR AND A SCHOTTKY DIODE
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Patent #:
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Issue Dt:
|
04/05/2005
|
Application #:
|
10284905
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Filing Dt:
|
10/31/2002
|
Publication #:
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|
Pub Dt:
|
04/24/2003
| | | | |
Title:
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TRIGGERING OF IO EQUILIBRATING ENDING SIGNAL WITH FIRING OF COLUMN ACCESS SIGNAL
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Patent #:
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|
Issue Dt:
|
02/03/2004
|
Application #:
|
10284928
|
Filing Dt:
|
10/31/2002
|
Publication #:
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|
Pub Dt:
|
04/24/2003
| | | | |
Title:
|
FIRST BIT DATABURST FIRING OF IO EQUILIBRATING ENDING SIGNAL BASED ON COLUMN ACCESS SIGNAL
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Patent #:
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|
Issue Dt:
|
09/14/2004
|
Application #:
|
10285136
|
Filing Dt:
|
10/30/2002
|
Publication #:
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|
Pub Dt:
|
05/01/2003
| | | | |
Title:
|
APPARATUS AND METHOD FOR LEADLESS PACKAGING OF SEMICONDUCTOR DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
09/07/2004
|
Application #:
|
10285144
|
Filing Dt:
|
10/30/2002
|
Publication #:
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|
Pub Dt:
|
04/17/2003
| | | | |
Title:
|
APPARATUS AND METHOD FOR LEADLESS PACKAGING OF SEMICONDUCTOR DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
06/01/2004
|
Application #:
|
10285148
|
Filing Dt:
|
10/30/2002
|
Publication #:
|
|
Pub Dt:
|
04/17/2003
| | | | |
Title:
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APPARATUS AND METHOD FOR LEADLESS PACKAGING OF SEMICONDUCTOR DEVICES
|
|