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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
10/04/2005
Application #:
10323150
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
05/27/2004
Title:
PACKAGED MICROELECTRONIC COMPONENT ASSEMBLIES
2
Patent #:
Issue Dt:
07/04/2006
Application #:
10323221
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHODS AND APPARATUS FOR A FLEXIBLE CIRCUIT INTERPOSER
3
Patent #:
Issue Dt:
08/09/2005
Application #:
10323453
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
06/24/2004
Title:
METHODS OF FABRICATING MULTIPLE SETS OF FIELD EFFECT TRANSISTORS
4
Patent #:
Issue Dt:
08/10/2004
Application #:
10323525
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
07/03/2003
Title:
MICROELECTONIC DEVICE FABRICATING METHOD, AND METHOD OF FORMING A PAIR OF FIELD EFFECT TRANSISTOR GATE LINES OF DIFFERENT BASE WIDTHS FROM A COMMON DEPOSITED CONDUCTIVE LAYER
5
Patent #:
Issue Dt:
08/28/2007
Application #:
10323615
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
12/04/2003
Title:
MANUFACTURING PROCESS OF A SEMICONDUCTOR NON-VOLATILE MEMORY CELL
6
Patent #:
Issue Dt:
10/07/2003
Application #:
10324626
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
05/15/2003
Title:
DEFLECTABLE INTERCONNECT
7
Patent #:
Issue Dt:
12/16/2003
Application #:
10324627
Filing Dt:
12/18/2002
Publication #:
Pub Dt:
05/15/2003
Title:
DEFLECTABLE INTERCONNECT
8
Patent #:
Issue Dt:
02/24/2004
Application #:
10325707
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
07/03/2003
Title:
BINARY ENCODING CIRCUIT
9
Patent #:
Issue Dt:
01/31/2006
Application #:
10325739
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
06/24/2004
Title:
PARITY BIT SYSTEM FOR A CAM
10
Patent #:
Issue Dt:
12/28/2004
Application #:
10325985
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
06/24/2004
Title:
REDUCING SWING LINE DRIVER
11
Patent #:
Issue Dt:
10/10/2006
Application #:
10326651
Filing Dt:
12/19/2002
Publication #:
Pub Dt:
05/08/2003
Title:
SLURRY FOR USE IN POLISHING SEMICONDUCTOR DEVICE CONDUCTIVE STRUCTURES THAT INCLUDE COPPER AND TUNGSTEN AND POLISHING METHODS
12
Patent #:
Issue Dt:
04/20/2004
Application #:
10326725
Filing Dt:
12/20/2002
Title:
METHODS OF FORMING IMPLANT REGIONS RELATIVE TO TRANSISTOR GATES
13
Patent #:
Issue Dt:
08/09/2005
Application #:
10326901
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
06/24/2004
Title:
SURFACE MOUNT TECHNOLOGY TO VIA-IN-PAD INTERCONNECTIONS
14
Patent #:
Issue Dt:
06/26/2007
Application #:
10327071
Filing Dt:
12/24/2002
Publication #:
Pub Dt:
06/24/2004
Title:
ERROR DETECTION AND CORRECTION IN A CAM
15
Patent #:
Issue Dt:
09/20/2005
Application #:
10327075
Filing Dt:
12/24/2002
Publication #:
Pub Dt:
06/24/2004
Title:
Content addressable memory (CAM) device employing a recirculating shift register for data storage
16
Patent #:
Issue Dt:
05/24/2005
Application #:
10327469
Filing Dt:
12/20/2002
Publication #:
Pub Dt:
07/10/2003
Title:
APPARATUS TO PREVENT DAMAGE TO PROBE CARD
17
Patent #:
Issue Dt:
05/15/2007
Application #:
10329058
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
06/24/2004
Title:
ELECTROSTATIC DISCHARGE PROTECTION UNIT INCLUDING EQUALIZATION
18
Patent #:
Issue Dt:
08/02/2005
Application #:
10329792
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
07/01/2004
Title:
PROGRAMMING FLASH MEMORIES
19
Patent #:
Issue Dt:
03/15/2005
Application #:
10329876
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
07/01/2004
Title:
LOW VOLTAGE SENSE AMPLIFIER FOR OPERATION UNDER A REDUCED BIT LINE BIAS VOLTAGE
20
Patent #:
Issue Dt:
09/18/2007
Application #:
10329904
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
07/01/2004
Title:
USING CHIP SELECT TO SPECIFY BOOT MEMORY
21
Patent #:
Issue Dt:
11/02/2004
Application #:
10329913
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
07/01/2004
Title:
SEMICONDUCTOR DEVICE STRUCTURES WITH CAPACITOR CONTAINERS AND CONTACT APERTURES HAVING INCREASED ASPECT RATIOS AND METHODS FOR MAKING THE SAME
22
Patent #:
Issue Dt:
08/02/2011
Application #:
10330204
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
MULTI-PRIORITY ENCODER
23
Patent #:
Issue Dt:
10/26/2004
Application #:
10330205
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
CAM WITH AUTOMATIC NEXT FREE ADDRESS POINTER
24
Patent #:
Issue Dt:
12/13/2005
Application #:
10330208
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
PRIORITY RESOLVER AND "NEAR MATCH" DETECTION CIRCUIT
25
Patent #:
Issue Dt:
08/23/2005
Application #:
10330210
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
CAM WITH POLICY BASED BANDWIDTH ALLOCATION
26
Patent #:
Issue Dt:
11/21/2006
Application #:
10330218
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
CAM WITH AUTOMATIC WRITING TO THE NEXT FREE ADDRESS
27
Patent #:
Issue Dt:
08/29/2006
Application #:
10330243
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
DISTRIBUTED PROGRAMMABLE PRIORITY ENCODER CAPABLE OF FINDING THE LONGEST MATCH IN A SINGLE OPERATION
28
Patent #:
Issue Dt:
02/21/2006
Application #:
10330251
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
METHOD AND APPARATUS FOR DETECTING ''ALMOST MATCH'' IN A CAM
29
Patent #:
Issue Dt:
09/12/2006
Application #:
10330252
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/01/2004
Title:
AUTOMATIC LEARNING IN A CAM
30
Patent #:
Issue Dt:
12/27/2005
Application #:
10330287
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
07/10/2003
Title:
IMAGE SENSOR AND METHOD FOR FABRICATING THE SAME
31
Patent #:
Issue Dt:
12/14/2004
Application #:
10330469
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
05/15/2003
Title:
METHOD AND APPARATUS FOR MATCHED-REFERENCE SENSING ARCHITECTURE FOR NON-VOLATILE MEMORIES
32
Patent #:
Issue Dt:
09/07/2004
Application #:
10330525
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
07/17/2003
Title:
METHOD FOR FILLING STRUCTURAL GAPS AND INTEGRATED CIRCUITRY
33
Patent #:
Issue Dt:
09/26/2006
Application #:
10330719
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
07/17/2003
Title:
METHODS OF FORMING MATERIALS BETWEEN CONDUCTIVE ELECTRICAL COMPONENTS, AND INSULATING MATERIALS
34
Patent #:
Issue Dt:
04/13/2004
Application #:
10330881
Filing Dt:
12/23/2002
Publication #:
Pub Dt:
05/15/2003
Title:
METHOD OF FORMING TRENCH ISOLATION REGIONS
35
Patent #:
Issue Dt:
03/09/2004
Application #:
10331033
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
07/17/2003
Title:
SEMICONDUCTOR FUSES, METHODS OF USING THE SAME, METHODS OF MAKING THE SAME, AND SEMICONDUCTOR DEVICES CONTAINING THE SAME
36
Patent #:
Issue Dt:
11/23/2004
Application #:
10331106
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
07/31/2003
Title:
REGULATION METHOD FOR THE SOURCE TERMINAL VOLTAGE IN A NON-VOLATILE MEMORY CELL DURING A PROGRAM PHASE AND CORRESPONDING PROGRAM CIRCUIT
37
Patent #:
Issue Dt:
10/26/2004
Application #:
10331116
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
08/14/2003
Title:
REGULATION METHOD FOR THE DRAIN, BODY AND SOURCE TERMINALS VOLTAGES IN A NON-VOLATILE MEMORY CELL DURING A PROGRAM PHASE AND CORRESPONDING PROGRAM CIRCUIT
38
Patent #:
Issue Dt:
10/05/2004
Application #:
10331147
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
07/31/2003
Title:
CIRCUIT FOR CONTROLLING A REFERENCE NODE IN A SENSE AMPLIFIER
39
Patent #:
Issue Dt:
11/23/2004
Application #:
10331158
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/21/2003
Title:
SENSE AMPLIFIER STRUCTURE FOR MULTILEVEL NON-VOLATILE MEMORY DEVICES AND CORRESPONDING READING METHOD
40
Patent #:
Issue Dt:
08/08/2006
Application #:
10331161
Filing Dt:
12/26/2002
Publication #:
Pub Dt:
08/21/2003
Title:
PROGRAMMING METHOD FOR A MULTILEVEL MEMORY CELL
41
Patent #:
Issue Dt:
10/25/2005
Application #:
10331177
Filing Dt:
12/27/2002
Publication #:
Pub Dt:
08/07/2003
Title:
DECODING STRUCTURE FOR A MEMORY DEVICE WITH A CONTROL CODE
42
Patent #:
Issue Dt:
06/01/2004
Application #:
10331378
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
11/13/2003
Title:
SEMICONDUCTOR MEMORY DEVICE WITH MODE REGISTER AND METHOD FOR CONTROLLING DEEP POWER DOWN MODE THEREIN
43
Patent #:
Issue Dt:
04/10/2007
Application #:
10334113
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
03/11/2004
Title:
SYSTEM AND METHOD TO ANALYZE VLSI DESIGNS
44
Patent #:
Issue Dt:
12/07/2004
Application #:
10334126
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
08/07/2003
Title:
POWER SUPPLY CIRCUIT STRUCTURE FOR A ROW DECODER OF A MULTILEVEL NON-VOLATILE MEMORY DEVICE
45
Patent #:
Issue Dt:
03/16/2004
Application #:
10334230
Filing Dt:
12/30/2002
Publication #:
Pub Dt:
05/22/2003
Title:
SUBSTRATES AND ASSEMBLIES INCLUDING PRE-APPLIED ADHESION PROMOTER
46
Patent #:
Issue Dt:
02/22/2005
Application #:
10334407
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
05/15/2003
Title:
SEMICONDUCTOR PACKAGE HAVING STACKED DICE AND LEADFRAMES AND METHOD OF FABRICATION
47
Patent #:
Issue Dt:
11/16/2004
Application #:
10334408
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
05/22/2003
Title:
METHOD AND APPARATUS FOR STANDBY POWER REDUCTION IN SEMICONDUCTOR DEVICES
48
Patent #:
Issue Dt:
10/07/2003
Application #:
10335825
Filing Dt:
12/31/2002
Publication #:
Pub Dt:
07/17/2003
Title:
RAIL-TO-RAIL CMOS COMPARATOR
49
Patent #:
Issue Dt:
07/18/2006
Application #:
10335956
Filing Dt:
01/02/2003
Publication #:
Pub Dt:
12/25/2003
Title:
METHOD FOR FORMING A NOTCHED GATE
50
Patent #:
Issue Dt:
12/09/2003
Application #:
10336169
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
06/05/2003
Title:
METHOD FOR ASSEMBLING DIE PACKAGE
51
Patent #:
Issue Dt:
04/20/2004
Application #:
10336355
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
05/22/2003
Title:
DIGITAL LOGIC DEVICES WITH EXTREMELY SKEWED TRIP POINTS AND RESET CIRCUITRY FOR RAPIDLY PROPAGATING SIGNAL EDGES
52
Patent #:
Issue Dt:
05/10/2005
Application #:
10336357
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
05/29/2003
Title:
A SKEWED FALLING LOGIC DEVICE FOR RAPIDLY PROPAGATING A FALLING EDGE OF AN OUTPUT SIGNAL
53
Patent #:
Issue Dt:
05/08/2007
Application #:
10336358
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
07/08/2004
Title:
CAMERA MODULE HAVING GEARED LENS BARREL
54
Patent #:
Issue Dt:
07/19/2005
Application #:
10336359
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
07/17/2003
Title:
SKEWED NOR AND NAND RISING LOGIC DEVICES FOR RAPIDLY PROPAGATING A RISING EDGE OF AN OUTPUT SIGNAL
55
Patent #:
Issue Dt:
12/06/2005
Application #:
10336387
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
05/29/2003
Title:
A METHOD FOR RAPIDLY PROPAGATING A FAST EDGE OF AN OUTPUT SIGNAL THROUGH A SKEWED LOGIC DEVICE
56
Patent #:
Issue Dt:
08/30/2005
Application #:
10336502
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
05/29/2003
Title:
DIGITAL LOGIC DEVICES WITH EXTREMELY SKEWED TRIP POINTS AND RESET CIRCUITRY FOR RAPIDLY PROPAGATING SIGNAL EDGES
57
Patent #:
Issue Dt:
09/27/2005
Application #:
10336503
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
05/29/2003
Title:
DIGITAL LOGIC DEVICES WITH EXTREMELY SKEWED TRIP POINTS AND RESET CIRCUITRY FOR RAPIDLY PROPAGATING SIGNAL EDGES
58
Patent #:
Issue Dt:
07/12/2005
Application #:
10336527
Filing Dt:
01/03/2003
Publication #:
Pub Dt:
05/22/2003
Title:
DIGITAL LOGIC DEVICES WITH EXTREMELY SKEWED TRIP POINTS AND RESET CIRCUITRY FOR RAPIDLY PROPAGATING SIGNAL EDGES AND SYSTEMS INCLUDING SAME
59
Patent #:
Issue Dt:
11/07/2006
Application #:
10337438
Filing Dt:
01/06/2003
Publication #:
Pub Dt:
07/08/2004
Title:
MICROELECTRONIC COMPONENT ASSEMBLIES AND MICROELECTRONIC COMPONENT LEAD FRAME STRUCTURES
60
Patent #:
Issue Dt:
06/15/2004
Application #:
10337556
Filing Dt:
01/07/2003
Publication #:
Pub Dt:
05/22/2003
Title:
NON-VOLATILE MEMORY CELL WITH A FLOATING GATE REGION AUTOALIGNED TO THE ISOLATION AND WITH A HIGH COUPLING COEFFICIENT
61
Patent #:
Issue Dt:
04/11/2006
Application #:
10337817
Filing Dt:
01/06/2003
Publication #:
Pub Dt:
07/24/2003
Title:
DYNAMIC RANDOM ACCESS MEMORY CIRCUITRY HAVING STORAGE CAPACITORS WITHIN A WELL
62
Patent #:
Issue Dt:
11/02/2004
Application #:
10337850
Filing Dt:
01/08/2003
Publication #:
Pub Dt:
07/10/2003
Title:
LOW CAPACITANCE WIRING LAYOUT AND METHOD FOR MAKING SAME
63
Patent #:
Issue Dt:
05/10/2005
Application #:
10338286
Filing Dt:
01/08/2003
Publication #:
Pub Dt:
07/24/2003
Title:
METHODS OF FORMING SEMICONDUCTOR CAPACITORS AND MEMORY DEVICES
64
Patent #:
Issue Dt:
05/03/2005
Application #:
10338287
Filing Dt:
01/08/2003
Publication #:
Pub Dt:
05/29/2003
Title:
REDUCTION OF DAMAGE IN SEMICONDUCTOR CONTAINER CAPACITORS
65
Patent #:
Issue Dt:
05/15/2007
Application #:
10338523
Filing Dt:
01/07/2003
Publication #:
Pub Dt:
06/19/2003
Title:
METHODS TO FORM ELECTRONIC DEVICES AND METHODS TO FORM A MATERIAL OVER A SEMICONDUCTIVE SUBSTRATE
66
Patent #:
Issue Dt:
11/25/2003
Application #:
10338565
Filing Dt:
01/07/2003
Publication #:
Pub Dt:
05/22/2003
Title:
APPARATUS AND METHOD FOR GENERATING AN OSCILLATING SIGNAL
67
Patent #:
Issue Dt:
08/28/2007
Application #:
10338845
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
12/04/2003
Title:
ACID BLEND FOR REMOVING ETCH RESIDUE
68
Patent #:
Issue Dt:
09/13/2005
Application #:
10339041
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
07/24/2003
Title:
JUNCTION-ISOLATED DEPLETION MODE FERROELECTRIC MEMORY DEVICES
69
Patent #:
Issue Dt:
08/03/2004
Application #:
10339731
Filing Dt:
01/08/2003
Publication #:
Pub Dt:
07/24/2003
Title:
BARRIER IN GATE STACK FOR IMPROVED GATE DIELECTRIC INTEGRITY
70
Patent #:
Issue Dt:
03/08/2005
Application #:
10340126
Filing Dt:
01/10/2003
Publication #:
Pub Dt:
07/24/2003
Title:
METHODS OF FORMING SILICON-ON-INSULATOR COMPRISING INTEGRATED CIRCUITRY, AND WAFER BONDING METHODS OF FORMING SILICON-ON-INSULATOR COMPRISING INTEGRATED CIRCUITRY
71
Patent #:
Issue Dt:
05/10/2005
Application #:
10340207
Filing Dt:
01/10/2003
Publication #:
Pub Dt:
07/17/2003
Title:
ARCHITECTURE FOR A FLASH-EEPROM SIMULTANEOUSLY READABLE IN OTHER SECTORS WHILE ERASING AND/OR PROGRAMMING ONE OR MORE SECTORS
72
Patent #:
Issue Dt:
06/07/2005
Application #:
10340323
Filing Dt:
01/09/2003
Publication #:
Pub Dt:
07/24/2003
Title:
RING POSITIONABLE ABOUT A PERIPHERY OF A CONTACT PAD, SEMICONDUCTOR DEVICE COMPONENTS INCLUDING SAME, AND METHODS FOR POSITIONING THE RING AROUND A CONTACT PAD
73
Patent #:
Issue Dt:
01/04/2005
Application #:
10340448
Filing Dt:
01/10/2003
Publication #:
Pub Dt:
06/05/2003
Title:
METHOD AND APPARATUS FOR CONTROLLING A TEMPERATURE OF A POLISHING PAD USED IN PLANARIZING SUBSTRATES
74
Patent #:
Issue Dt:
01/30/2007
Application #:
10341610
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
06/12/2003
Title:
TREATMENT OF A GROUND SEMICONDUCTOR DIE TO IMPROVE ADHESIVE BONDING TO A SUBSTRATE
75
Patent #:
Issue Dt:
03/30/2004
Application #:
10341655
Filing Dt:
01/14/2003
Publication #:
Pub Dt:
07/24/2003
Title:
THREE TERMINAL MAGNETIC RANDOM ACCESS MEMORY
76
Patent #:
Issue Dt:
12/30/2003
Application #:
10341925
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
07/17/2003
Title:
SEMICONDUCTOR STRUCTURES
77
Patent #:
Issue Dt:
12/25/2007
Application #:
10342632
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
05/01/2003
Title:
CHIP SCALE PACKAGE WITH HEAT SPREADER
78
Patent #:
Issue Dt:
09/23/2003
Application #:
10342955
Filing Dt:
01/15/2003
Publication #:
Pub Dt:
06/05/2003
Title:
METHOD AND APPARATUS FOR FORMING SOLDER BALLS
79
Patent #:
Issue Dt:
03/29/2005
Application #:
10345008
Filing Dt:
01/13/2003
Publication #:
Pub Dt:
07/15/2004
Title:
METHOD AND APPARATUS FOR ENHANCED SENSING OF LOW VOLTAGE MEMORY
80
Patent #:
Issue Dt:
08/31/2004
Application #:
10345384
Filing Dt:
01/16/2003
Publication #:
Pub Dt:
08/07/2003
Title:
METHOD AND APPARATUS FOR SENSING RESISTANCE VALUES OF MEMORY CELLS
81
Patent #:
Issue Dt:
05/11/2004
Application #:
10345542
Filing Dt:
01/16/2003
Title:
TECHNIQUES FOR IMPROVING WORDLINE FABRICATION OF A MEMORY DEVICE
82
Patent #:
Issue Dt:
12/16/2003
Application #:
10345895
Filing Dt:
01/15/2003
Publication #:
Pub Dt:
07/10/2003
Title:
UTILIZATION OF DIE ACTIVE SURFACES FOR LATERALLY EXTENDING DIE INTERNAL AND EXTERNAL CONNECTIONS
83
Patent #:
Issue Dt:
07/11/2006
Application #:
10346233
Filing Dt:
01/16/2003
Publication #:
Pub Dt:
07/22/2004
Title:
CARRIER ASSEMBLIES, POLISHING MACHINES INCLUDING CARRIER ASSEMBLIES, AND METHODS FOR POLISHING MICRO-DEVICE WORKPIECES
84
Patent #:
Issue Dt:
08/24/2004
Application #:
10346643
Filing Dt:
01/16/2003
Publication #:
Pub Dt:
06/19/2003
Title:
SYSTEM AND METHOD FOR INHIBITING IMPRINTING OF CAPACITOR STRUCTURES OF A MEMORY
85
Patent #:
Issue Dt:
03/23/2004
Application #:
10346869
Filing Dt:
01/17/2003
Publication #:
Pub Dt:
07/10/2003
Title:
TRANSISTOR STRUCTURES
86
Patent #:
Issue Dt:
06/01/2004
Application #:
10347027
Filing Dt:
01/17/2003
Title:
WAFER-LEVEL TESTING APPARATUS AND METHOD
87
Patent #:
Issue Dt:
10/19/2004
Application #:
10347041
Filing Dt:
01/17/2003
Publication #:
Pub Dt:
07/22/2004
Title:
METHOD AND SYSTEM FOR SELECTING REDUNDANT ROWS AND COLUMNS OF MEMORY CELLS
88
Patent #:
Issue Dt:
01/27/2004
Application #:
10347043
Filing Dt:
01/17/2003
Publication #:
Pub Dt:
07/10/2003
Title:
METHODS OF FORMING CAPACITOR CONSTRUCTIONS
89
Patent #:
Issue Dt:
09/27/2005
Application #:
10348535
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
06/12/2003
Title:
LEAD-OVER-CHIP LEAD FRAMES
90
Patent #:
Issue Dt:
09/25/2007
Application #:
10348537
Filing Dt:
01/21/2003
Publication #:
Pub Dt:
06/12/2003
Title:
MEMORY DEVICE POWER DISTRIBUTION IN MEMORY ASSEMBLIES
91
Patent #:
Issue Dt:
07/13/2004
Application #:
10348635
Filing Dt:
01/21/2003
Title:
METHOD AND APPARATUS FOR FORMING THIN MICROELECTRONIC DIES
92
Patent #:
Issue Dt:
02/07/2006
Application #:
10349796
Filing Dt:
01/22/2003
Publication #:
Pub Dt:
07/22/2004
Title:
TERNARY CONTENT ADDRESSABLE MEMORY WITH ENHANCED PRIORITY MATCHING
93
Patent #:
Issue Dt:
10/12/2004
Application #:
10350745
Filing Dt:
01/24/2003
Publication #:
Pub Dt:
09/04/2003
Title:
METHOD OF ADJUSTING PROGRAM VOLTAGE IN NON-VOLATILE MEMORIES, AND PROCESS FOR FABRICATING A NON-VOLATILE MEMORY DEVICE
94
Patent #:
Issue Dt:
02/03/2004
Application #:
10350990
Filing Dt:
01/24/2003
Publication #:
Pub Dt:
06/12/2003
Title:
TEMPERATURE COMPENSATED REFERENCE VOLTAGE CIRCUIT
95
Patent #:
Issue Dt:
06/17/2008
Application #:
10351888
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
07/29/2004
Title:
SEMICONDUCTOR COMPONENTS HAVING STACKED DICE
96
Patent #:
Issue Dt:
07/20/2004
Application #:
10352278
Filing Dt:
01/27/2003
Publication #:
Pub Dt:
06/19/2003
Title:
MAGNETO-RESISTIVE MEMORY ARRAY
97
Patent #:
Issue Dt:
08/30/2005
Application #:
10352397
Filing Dt:
01/28/2003
Publication #:
Pub Dt:
06/19/2003
Title:
TRI-STATING OUTPUT BUFFER DURING INITIALIZATION OF SYNCHRONOUS MEMORY
98
Patent #:
Issue Dt:
03/30/2004
Application #:
10352581
Filing Dt:
01/28/2003
Publication #:
Pub Dt:
07/17/2003
Title:
FLASH MEMORY INCLUDING MEANS OF CHECKING MEMORY CELL THRESHOLD VOLTAGES
99
Patent #:
Issue Dt:
09/14/2004
Application #:
10352594
Filing Dt:
01/29/2003
Publication #:
Pub Dt:
07/31/2003
Title:
IMAGE FORMING APPARATUS FOR REDUCING A SYSTEM RETURN TIME
100
Patent #:
Issue Dt:
06/07/2005
Application #:
10352603
Filing Dt:
01/28/2003
Publication #:
Pub Dt:
06/19/2003
Title:
FLASH MEMORY DEVICE WITH A VARIABLE ERASE PULSE
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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