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NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
12/19/2006
Application #:
10751443
Filing Dt:
01/06/2004
Publication #:
Pub Dt:
07/15/2004
Title:
FULLY-DEPLETED (FD) (SOI) MOSFET ACCESS TRANSISTOR
2
Patent #:
Issue Dt:
05/31/2005
Application #:
10751941
Filing Dt:
01/07/2004
Title:
APPARATUS WITH SILICIDE ON CONDUCTIVE STRUCTURES
3
Patent #:
Issue Dt:
07/04/2006
Application #:
10752555
Filing Dt:
01/08/2004
Publication #:
Pub Dt:
12/16/2004
Title:
METHOD AND APPARATUS FOR REDUCING IMAGER FLOATING DIFFUSION LEAKAGE
4
Patent #:
Issue Dt:
07/04/2006
Application #:
10753041
Filing Dt:
01/07/2004
Publication #:
Pub Dt:
07/22/2004
Title:
METHOD OF FORMING A CONTACT STRUCTURE INCLUDING A VERTICAL BARRIER STRUCTURE AND TWO BARRIER LAYERS
5
Patent #:
Issue Dt:
06/07/2005
Application #:
10753914
Filing Dt:
01/07/2004
Title:
SEMICONDUCTOR DEVICES, CAPACITOR ANTIFUSES, DYNAMIC RANDOM ACCESS MEMORIES, AND CELL PLATE BIAS CONNECTION METHODS
6
Patent #:
Issue Dt:
05/03/2005
Application #:
10754129
Filing Dt:
01/09/2004
Publication #:
Pub Dt:
07/22/2004
Title:
TEST SYSTEM AND TEST CONTACTOR FOR ELECTRONIC MODULES
7
Patent #:
Issue Dt:
09/12/2006
Application #:
10754658
Filing Dt:
01/08/2004
Publication #:
Pub Dt:
07/22/2004
Title:
ASYNCHRONOUS INTERFACE CIRCUIT AND METHOD FOR A PSEUDO-STATIC MEMORY DEVICE
8
Patent #:
Issue Dt:
06/05/2007
Application #:
10755097
Filing Dt:
01/09/2004
Publication #:
Pub Dt:
11/24/2005
Title:
METHODS AND APPARATUS FOR FORMING RHODIUM-CONTAINING LAYERS
9
Patent #:
Issue Dt:
11/04/2008
Application #:
10755411
Filing Dt:
01/13/2004
Publication #:
Pub Dt:
07/14/2005
Title:
WIDE DYNAMIC RANGE OPERATIONS FOR IMAGING
10
Patent #:
Issue Dt:
01/08/2008
Application #:
10755905
Filing Dt:
01/12/2004
Publication #:
Pub Dt:
07/14/2005
Title:
METHODS OF FABRICATING SUBSTRATES INCLUDING AT LEAST ONE CONDUCTIVE VIA
11
Patent #:
Issue Dt:
04/25/2006
Application #:
10756621
Filing Dt:
01/12/2004
Publication #:
Pub Dt:
11/25/2004
Title:
METHODS OF FORMING CAPACITOR CONSTRUCTIONS
12
Patent #:
Issue Dt:
03/28/2006
Application #:
10756622
Filing Dt:
01/12/2004
Publication #:
Pub Dt:
07/29/2004
Title:
ION IMPLANT LITHOGRAPHY METHOD OF PROCESSING A SEMICONDUCTOR SUBSTRATE
13
Patent #:
Issue Dt:
07/03/2007
Application #:
10756901
Filing Dt:
01/14/2004
Publication #:
Pub Dt:
07/22/2004
Title:
SELECTIVE DEPOSITION OF SOLDER BALL CONTACTS
14
Patent #:
Issue Dt:
07/25/2006
Application #:
10757252
Filing Dt:
01/13/2004
Publication #:
Pub Dt:
09/16/2004
Title:
CMOS CONSTRUCTIONS
15
Patent #:
Issue Dt:
08/07/2007
Application #:
10757253
Filing Dt:
01/13/2004
Publication #:
Pub Dt:
09/16/2004
Title:
METHODS OF FORMING TRANSISTOR DEVICES AND CAPACITOR CONSTRUCTIONS
16
Patent #:
Issue Dt:
07/26/2005
Application #:
10757638
Filing Dt:
01/13/2004
Publication #:
Pub Dt:
07/29/2004
Title:
TECHNIQUE FOR HIGH EFFICIENCY METALORGANIC CHEMICAL VAPOR DEPOSITION
17
Patent #:
Issue Dt:
12/13/2005
Application #:
10758008
Filing Dt:
01/16/2004
Publication #:
Pub Dt:
07/29/2004
Title:
AGGLOMERATION ELIMINATION FOR METAL SPUTTER DEPOSITION OF CHALCOGENIDES
18
Patent #:
Issue Dt:
05/05/2009
Application #:
10758009
Filing Dt:
01/16/2004
Publication #:
Pub Dt:
07/29/2004
Title:
AGGLOMERATION ELIMINATION FOR METAL SPUTTER DEPOSITION OF CHALCOGENIDES
19
Patent #:
Issue Dt:
10/24/2006
Application #:
10758102
Filing Dt:
01/16/2004
Publication #:
Pub Dt:
09/16/2004
Title:
A MEMORY CELL INTERMEDIATE STRUCTURE
20
Patent #:
Issue Dt:
03/27/2007
Application #:
10759388
Filing Dt:
01/15/2004
Publication #:
Pub Dt:
06/09/2005
Title:
SELECTABLE MEMORY WORD LINE DEACTIVATION
21
Patent #:
Issue Dt:
08/14/2007
Application #:
10759641
Filing Dt:
01/16/2004
Publication #:
Pub Dt:
07/29/2004
Title:
PURGING GAS FROM A PHOTOLITHOGRAPHY ENCLOSURE BETWEEN A MASK PROTECTIVE DEVICE AND A PATTERNED MASK
22
Patent #:
Issue Dt:
02/27/2007
Application #:
10761247
Filing Dt:
01/22/2004
Publication #:
Pub Dt:
08/05/2004
Title:
MRAM MEMORY CELL HAVING AN ELECTROPLATED BOTTOM LAYER
23
Patent #:
Issue Dt:
03/28/2006
Application #:
10761739
Filing Dt:
01/21/2004
Publication #:
Pub Dt:
08/26/2004
Title:
STACKABLE BALL GRID ARRAY
24
Patent #:
Issue Dt:
11/30/2004
Application #:
10761782
Filing Dt:
01/20/2004
Publication #:
Pub Dt:
08/05/2004
Title:
METHOD AND APPARATUS FOR REGULATING PREDRIVER FOR OUTPUT BUFFER
25
Patent #:
Issue Dt:
11/16/2004
Application #:
10762061
Filing Dt:
01/21/2004
Publication #:
Pub Dt:
09/23/2004
Title:
WRITE AND ERASE PROTECTION IN A SYNCHRONOUS MEMORY
26
Patent #:
Issue Dt:
07/11/2006
Application #:
10762195
Filing Dt:
01/20/2004
Publication #:
Pub Dt:
11/18/2004
Title:
PARALLEL SENSE AMPLIFIER WITH MIRRORING OF THE CURRENT TO BE MEASURED INTO EACH REFERENCE BRANCH
27
Patent #:
Issue Dt:
10/12/2004
Application #:
10763038
Filing Dt:
01/21/2004
Publication #:
Pub Dt:
08/05/2004
Title:
DELAY-LOCKED LOOP CIRCUIT AND METHOD USING A RING OSCILLATOR AND COUNTER-BASED DELAY
28
Patent #:
Issue Dt:
02/27/2007
Application #:
10763044
Filing Dt:
01/22/2004
Publication #:
Pub Dt:
04/28/2005
Title:
MANUFACTURING PROCESS FOR A FLASH MEMORY AND FLASH MEMORY THUS PRODUCED
29
Patent #:
Issue Dt:
01/31/2006
Application #:
10764675
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
07/28/2005
Title:
METHOD AND APPARATUS FOR IDENTIFYING SHORT CIRCUITS IN AN INTEGRATED CIRCUIT DEVICE
30
Patent #:
Issue Dt:
08/01/2006
Application #:
10764832
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
07/28/2005
Title:
MAGNETIC ANNEALING SEQUENCES FOR PATTERNED MRAM SYNTHETIC ANTIFERROMAGNETIC PINNED LAYERS
31
Patent #:
Issue Dt:
02/28/2006
Application #:
10764954
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
07/28/2005
Title:
MEMORY REDUNDANCY PROGRAMMING
32
Patent #:
Issue Dt:
05/13/2008
Application #:
10765301
Filing Dt:
01/27/2004
Publication #:
Pub Dt:
07/28/2005
Title:
SELECTIVE EPITAXY VERTICAL INTEGRATED CIRCUIT COMPONENTS
33
Patent #:
Issue Dt:
11/25/2008
Application #:
10765314
Filing Dt:
01/27/2004
Publication #:
Pub Dt:
09/23/2004
Title:
ATOMIC LAYER DEPOSITION WITH POINT OF USE GENERATED REACTIVE GAS SPECIES
34
Patent #:
Issue Dt:
02/15/2005
Application #:
10765396
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
03/10/2005
Title:
CUTTING CAM PEAK POWER BY CLOCK REGIONING
35
Patent #:
Issue Dt:
12/07/2010
Application #:
10765481
Filing Dt:
01/27/2004
Publication #:
Pub Dt:
07/28/2005
Title:
METHOD AND APPARATUS FOR A TWO-STEP RESIST SOFT BAKE TO PREVENT ILD OUTGASSING DURING SEMICONDUCTOR PROCESSING
36
Patent #:
Issue Dt:
03/29/2005
Application #:
10765546
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
08/12/2004
Title:
METHOD FOR MANUFACTURE OF MAGNETO-RESISTIVE BIT STRUCTURE
37
Patent #:
Issue Dt:
05/02/2006
Application #:
10765699
Filing Dt:
01/26/2004
Publication #:
Pub Dt:
07/28/2005
Title:
METHODS OF FORMING PLANARIZED SURFACES OVER SEMICONDUCTOR SUBSTRATES
38
Patent #:
Issue Dt:
09/12/2006
Application #:
10765911
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
08/04/2005
Title:
NON-VOLATILE ZERO FIELD SPLITTING RESONANCE MEMORY
39
Patent #:
Issue Dt:
07/25/2006
Application #:
10766004
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
08/04/2005
Title:
INDIVIDUAL I/O MODULATION IN MEMORY DEVICES
40
Patent #:
Issue Dt:
04/29/2008
Application #:
10766010
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
12/01/2005
Title:
SIMULTANEOUS READ CIRCUIT FOR MULTIPLE MEMORY CELLS
41
Patent #:
Issue Dt:
05/17/2005
Application #:
10766376
Filing Dt:
01/27/2004
Publication #:
Pub Dt:
09/23/2004
Title:
MICROELECTRONIC DEVICE FABRICATING METHOD, METHOD OF FORMING A PAIR OF CONDUCTIVE DEVICE COMPONENTS OF DIFFERENT BASE WIDTHS FROM A COMMON DEPOSITED CONDUCTIVE LAYER, AND INTEGRATED CIRCUITRY
42
Patent #:
Issue Dt:
02/27/2007
Application #:
10767232
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
10/07/2004
Title:
MICROELECTRONIC DEVICES WITH IMPROVED HEAT DISSIPATION AND METHODS FOR COOLING MICROELECTRONIC DEVICES
43
Patent #:
Issue Dt:
01/11/2005
Application #:
10767290
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
09/23/2004
Title:
MULTI-SUBSTRATE MICROELECTRONIC PACKAGES AND METHODS FOR MANUFACTURE
44
Patent #:
Issue Dt:
03/15/2011
Application #:
10767298
Filing Dt:
01/28/2004
Publication #:
Pub Dt:
07/28/2005
Title:
METHODS FOR FORMING SMALL-SCALE CAPACITOR STRUCTURES
45
Patent #:
Issue Dt:
11/20/2007
Application #:
10767555
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
08/04/2005
Title:
DUAL EDGE COMMAND IN DRAM
46
Patent #:
Issue Dt:
01/15/2008
Application #:
10767764
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
08/04/2005
Title:
METHODS FOR FORMING A METALLIC DAMASCENE STRUCTURE
47
Patent #:
Issue Dt:
10/17/2006
Application #:
10767921
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
08/04/2005
Title:
DIE-WAFER PACKAGE AND METHOD OF FABRICATING SAME
48
Patent #:
Issue Dt:
11/21/2006
Application #:
10768019
Filing Dt:
02/02/2004
Publication #:
Pub Dt:
08/05/2004
Title:
MULTILEVEL INTERCONNECT STRUCTURE WITH LOW-K DIELECTRIC
49
Patent #:
Issue Dt:
10/10/2006
Application #:
10768081
Filing Dt:
02/02/2004
Publication #:
Pub Dt:
08/05/2004
Title:
DOUBLE BLANKET ION IMPLANT METHOD AND STRUCTURE
50
Patent #:
Issue Dt:
06/21/2005
Application #:
10768568
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
09/23/2004
Title:
PEROVSKITE-TYPE MATERIAL FORMING METHODS, CAPACITOR DIELECTRIC FORMING METHODS, AND CAPACITOR CONSTRUCTIONS
51
Patent #:
Issue Dt:
03/15/2005
Application #:
10768573
Filing Dt:
01/29/2004
Publication #:
Pub Dt:
09/23/2004
Title:
HIGH VOLTAGE POSITIVE AND NEGATIVE TWO-PHASE DISCHARGE SYSTEM AND METHOD FOR CHANNEL ERASE IN FLASH MEMORY DEVICES
52
Patent #:
Issue Dt:
06/20/2006
Application #:
10768678
Filing Dt:
02/02/2004
Publication #:
Pub Dt:
08/05/2004
Title:
Method for fabricating sensor devices having improved switching properties
53
Patent #:
Issue Dt:
09/20/2005
Application #:
10768829
Filing Dt:
01/30/2004
Publication #:
Pub Dt:
09/23/2004
Title:
REDUCING DIGIT EQUILIBRATE CURRENT DURING SELF-REFRESH MODE
54
Patent #:
Issue Dt:
03/06/2007
Application #:
10769079
Filing Dt:
01/30/2004
Publication #:
Pub Dt:
08/04/2005
Title:
BUFFER CONTROL SYSTEM AND METHOD FOR A MEMORY SYSTEM HAVING OUTSTANDING READ AND WRITE REQUEST BUFFERS
55
Patent #:
Issue Dt:
04/12/2005
Application #:
10769116
Filing Dt:
01/30/2004
Title:
VERTICAL DEVICE 4F2 EEPROM MEMORY
56
Patent #:
Issue Dt:
09/19/2006
Application #:
10769433
Filing Dt:
01/30/2004
Publication #:
Pub Dt:
08/04/2005
Title:
SOLID SOURCE PRECURSOR DELIVERY SYSTEM
57
Patent #:
Issue Dt:
11/28/2006
Application #:
10769573
Filing Dt:
01/30/2004
Publication #:
Pub Dt:
09/23/2004
Title:
GATED SEMICONDUCTOR ASSEMBLIES AND METHODS OF FORMING GATED SEMICONDUCTOR ASSEMBLIES
58
Patent #:
Issue Dt:
10/26/2004
Application #:
10770611
Filing Dt:
02/02/2004
Publication #:
Pub Dt:
08/12/2004
Title:
INPUT STAGE APPARATUS AND METHOD HAVING A VARIABLE REFERENCE VOLTAGE
59
Patent #:
Issue Dt:
10/24/2006
Application #:
10770800
Filing Dt:
02/03/2004
Publication #:
Pub Dt:
08/12/2004
Title:
CIRCUITS AND METHODS TO PROTECT A GATE DIELECTRIC ANTIFUSE
60
Patent #:
Issue Dt:
09/20/2005
Application #:
10770801
Filing Dt:
02/03/2004
Publication #:
Pub Dt:
08/12/2004
Title:
METHOD FOR PRETREATING A SUBSTRATE PRIOR TO APPLICATION OF A POLYMERIC COAT
61
Patent #:
Issue Dt:
05/15/2007
Application #:
10770941
Filing Dt:
02/03/2004
Publication #:
Pub Dt:
08/12/2004
Title:
STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE
62
Patent #:
Issue Dt:
03/01/2005
Application #:
10771050
Filing Dt:
02/03/2004
Publication #:
Pub Dt:
08/12/2004
Title:
METHODS FOR PLANARIZATION OF METAL-CONTAINING SURFACES USING HALOGENS AND HALIDE SALTS
63
Patent #:
Issue Dt:
04/18/2006
Application #:
10771085
Filing Dt:
02/03/2004
Publication #:
Pub Dt:
08/12/2004
Title:
STACKED DIE MODULE AND TECHNIQUES FOR FORMING A STACKED DIE MODULE
64
Patent #:
Issue Dt:
06/21/2005
Application #:
10771291
Filing Dt:
02/05/2004
Publication #:
Pub Dt:
08/12/2004
Title:
WAFER ALIGNMENT SYSTEM
65
Patent #:
Issue Dt:
03/01/2005
Application #:
10771436
Filing Dt:
02/05/2004
Publication #:
Pub Dt:
08/12/2004
Title:
PHYSICALLY ALTERNATING SENSE AMPLIFIER ACTIVATION
66
Patent #:
Issue Dt:
05/01/2007
Application #:
10771611
Filing Dt:
02/04/2004
Publication #:
Pub Dt:
08/12/2004
Title:
MEASURE-CONTROLLED CIRCUIT WITH FREQUENCY CONTROL
67
Patent #:
Issue Dt:
07/12/2005
Application #:
10772204
Filing Dt:
02/03/2004
Publication #:
Pub Dt:
08/12/2004
Title:
BOARD-ON-CHIP PACKAGES
68
Patent #:
Issue Dt:
06/07/2005
Application #:
10772312
Filing Dt:
02/06/2004
Publication #:
Pub Dt:
08/12/2004
Title:
CAPACITOR CHARGE SHARING CHARGE PUMP
69
Patent #:
Issue Dt:
02/07/2006
Application #:
10772606
Filing Dt:
02/05/2004
Publication #:
Pub Dt:
08/12/2004
Title:
INTEGRATED CIRCUITS USING OPTICAL FIBER INTERCONNECTS FORMED THROUGH A SEMICONDUCTOR WAFER
70
Patent #:
Issue Dt:
01/04/2005
Application #:
10772834
Filing Dt:
02/05/2004
Publication #:
Pub Dt:
08/12/2004
Title:
ULTRA LOW POWER TRACKED LOW VOLTAGE REFERENCE SOURCE
71
Patent #:
Issue Dt:
08/12/2008
Application #:
10773520
Filing Dt:
02/05/2004
Publication #:
Pub Dt:
08/11/2005
Title:
SYSTEM AND METHOD FOR ARBITRATION OF MEMORY RESPONSES IN A HUB-BASED MEMORY SYSTEM
72
Patent #:
Issue Dt:
08/31/2010
Application #:
10773583
Filing Dt:
02/05/2004
Publication #:
Pub Dt:
08/11/2005
Title:
APPARATUS AND METHOD FOR DATA BYPASS FOR A BI-DIRECTIONAL DATA BUS IN A HUB-BASED MEMORY SUB-SYSTEM
73
Patent #:
Issue Dt:
02/22/2005
Application #:
10773780
Filing Dt:
02/09/2004
Publication #:
Pub Dt:
08/19/2004
Title:
COMPRISING AGGLOMERATES OF ONE OR MORE NOBLE METALS
74
Patent #:
Issue Dt:
02/03/2009
Application #:
10774762
Filing Dt:
02/09/2004
Publication #:
Pub Dt:
09/30/2004
Title:
APPROACH TO AVOID BUCKLING IN BPSG BY USING AN INTERMEDIATE BARRIER LAYER
75
Patent #:
Issue Dt:
01/25/2005
Application #:
10774868
Filing Dt:
02/09/2004
Publication #:
Pub Dt:
08/19/2004
Title:
MEMORY WITH ROW REDUNDANCY
76
Patent #:
Issue Dt:
11/09/2004
Application #:
10775231
Filing Dt:
02/11/2004
Publication #:
Pub Dt:
08/12/2004
Title:
BALANCED SENSE AMPLIFIER CONTROL FOR OPEN DIGIT LINE ARCHITECTURE MEMORY DEVICES
77
Patent #:
Issue Dt:
08/30/2005
Application #:
10775299
Filing Dt:
02/09/2004
Publication #:
Pub Dt:
08/12/2004
Title:
CACHE INVALIDATION METHOD AND APPARATUS FOR A GRAPHICS PROCESSING SYSTEM
78
Patent #:
Issue Dt:
12/07/2004
Application #:
10775363
Filing Dt:
02/10/2004
Publication #:
Pub Dt:
08/12/2004
Title:
APPARATUS AND METHOD FOR DYNAMICALLY REPAIRING A SEMICONDUCTOR MEMORY
79
Patent #:
Issue Dt:
10/23/2007
Application #:
10775394
Filing Dt:
02/10/2004
Publication #:
Pub Dt:
08/12/2004
Title:
LOAD BOARD SOCKET ADAPTER AND INTERFACE METHOD
80
Patent #:
Issue Dt:
03/08/2005
Application #:
10775582
Filing Dt:
02/10/2004
Publication #:
Pub Dt:
08/19/2004
Title:
BRIDGE-TYPE MAGNETIC RANDOM ACCESS MEMORY (MRAM) LATCH
81
Patent #:
Issue Dt:
08/30/2005
Application #:
10775703
Filing Dt:
02/10/2004
Publication #:
Pub Dt:
08/19/2004
Title:
MICROELECTRONIC ASSEMBLIES AND ELECTRONIC DEVICES INCLUDING CONNECTION STRUCTURES WITH MULTIPLE ELONGATED MEMBERS
82
Patent #:
Issue Dt:
05/22/2007
Application #:
10775908
Filing Dt:
02/10/2004
Publication #:
Pub Dt:
08/11/2005
Title:
NROM FLASH MEMORY WITH A HIGH-PERMITTIVITY GATE DIELECTRIC
83
Patent #:
Issue Dt:
03/24/2009
Application #:
10777457
Filing Dt:
02/12/2004
Publication #:
Pub Dt:
11/18/2004
Title:
SENSE AMPLIFIER FOR LOW-SUPPLY-VOLTAGE NONVOLATILE MEMORY CELLS
84
Patent #:
Issue Dt:
06/14/2005
Application #:
10777582
Filing Dt:
02/12/2004
Publication #:
Pub Dt:
08/19/2004
Title:
SEMICONDUCTOR PACKAGE AND METHOD PRODUCING SAME
85
Patent #:
Issue Dt:
02/14/2006
Application #:
10777674
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
08/19/2004
Title:
HIGH SPEED WORDLINE DECODER FOR DRIVING A LONG WORDLINE
86
Patent #:
Issue Dt:
06/13/2006
Application #:
10777684
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
08/19/2004
Title:
NON-VOLATILE RESISTANCE VARIABLE DEVICES AND METHOD OF FORMING SAME, ANALOG MEMORY DEVICES AND METHOD OF FORMING SAME, PROGRAMMABLE MEMORY CELL AND METHOD OF FORMING SAME, AND METHOD OF STRUCTURALLY CHANGING A NON-VOLATILE DEVICE
87
Patent #:
Issue Dt:
08/22/2006
Application #:
10778277
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
08/19/2004
Title:
METHODS FOR MARKING A PACKAGED SEMICONDUCTOR DIE INCLUDING APPLYLING TAPE AND SUBSEQUENTLY MARKING THE TAPE
88
Patent #:
Issue Dt:
04/19/2005
Application #:
10778440
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
08/19/2004
Title:
METHOD TO FABRICATE AN INTRINSIC POLYCRYSTALLINE SILICON FILM
89
Patent #:
Issue Dt:
12/26/2006
Application #:
10779244
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
08/19/2004
Title:
METHODS OF FORMING CAPACITORS AND METHODS OF FORMING CAPACITOR DIELECTRIC LAYERS
90
Patent #:
Issue Dt:
12/09/2008
Application #:
10779305
Filing Dt:
02/13/2004
Publication #:
Pub Dt:
04/14/2005
Title:
STRUCTURE AND METHOD FOR FORMING A CAPACITIVELY COUPLED CHIP-TO-CHIP SIGNALING INTERFACE
91
Patent #:
Issue Dt:
03/22/2005
Application #:
10779748
Filing Dt:
02/18/2004
Title:
DOUBLE THROUGHPUT ANALOG TO DIGITAL CONVERTER
92
Patent #:
Issue Dt:
10/10/2006
Application #:
10779856
Filing Dt:
02/17/2004
Publication #:
Pub Dt:
11/11/2004
Title:
METHOD FOR SOFT-PROGRAMMING AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE, AND AN ELECTRICALLY ERASABLE NONVOLATILE MEMORY DEVICE IMPLEMENTING THE SOFT-PROGRAMMING METHOD
93
Patent #:
Issue Dt:
09/26/2006
Application #:
10781035
Filing Dt:
02/18/2004
Publication #:
Pub Dt:
08/19/2004
Title:
GRADED COMPOSITION METAL OXIDE TUNNEL BARRIER INTERPOLY INSULATORS
94
Patent #:
Issue Dt:
03/01/2005
Application #:
10781468
Filing Dt:
02/17/2004
Publication #:
Pub Dt:
08/19/2004
Title:
METHODS OF FORMING SPACED CONDUCTIVE REGIONS, AND METHODS OF FORMING CAPACITOR CONSTRUCTIONS
95
Patent #:
Issue Dt:
01/03/2006
Application #:
10781588
Filing Dt:
02/17/2004
Publication #:
Pub Dt:
08/19/2004
Title:
SEMICONDUCTOR DEVICES, AND ELECTRONIC SYSTEMS COMPRISING SEMICONDUCTOR DEVICES
96
Patent #:
Issue Dt:
02/17/2009
Application #:
10781706
Filing Dt:
02/20/2004
Publication #:
Pub Dt:
08/25/2005
Title:
REDUCED CROSSTALK SENSOR AND METHOD OF FORMATION
97
Patent #:
Issue Dt:
07/24/2007
Application #:
10781974
Filing Dt:
02/18/2004
Publication #:
Pub Dt:
10/14/2004
Title:
SEMICONDUCTOR MEMORY WITH ACCESS PROTECTION SCHEME
98
Patent #:
Issue Dt:
10/10/2006
Application #:
10782246
Filing Dt:
02/19/2004
Publication #:
Pub Dt:
08/19/2004
Title:
INTEGRATED CIRCUIT SCHEMATICS AND LAYOUTS
99
Patent #:
Issue Dt:
09/13/2005
Application #:
10782247
Filing Dt:
02/19/2004
Publication #:
Pub Dt:
08/19/2004
Title:
CHECKING LAYOUT ACCURACY IN INTEGRATED CIRCUIT DESIGNS
100
Patent #:
Issue Dt:
09/12/2006
Application #:
10782252
Filing Dt:
02/19/2004
Publication #:
Pub Dt:
08/19/2004
Title:
LINE WIDTH CHECK IN LAYOUT DATABASE
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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