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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 18018
Page 80 of 181
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1
Patent #:
7135363
Issue Dt:
11/14/2006
Application #:
10844714
Filing Dt:
05/12/2004
Publication #:
US20040209421
Pub Dt:
10/21/2004
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY
2
Patent #:
6909167
Issue Dt:
06/21/2005
Application #:
10845983
Filing Dt:
05/14/2004
Publication #:
US20040212052
Pub Dt:
10/28/2004
Title:
COUPLING SPACED BOND PADS TO A CONTACT
3
Patent #:
7200736
Issue Dt:
04/03/2007
Application #:
10846070
Filing Dt:
05/14/2004
Publication #:
US20040215935
Pub Dt:
10/28/2004
Title:
METHOD AND SYSTEM FOR SUBSTANTIALLY REGISTERLESS PROCESSING
4
Patent #:
7112544
Issue Dt:
09/26/2006
Application #:
10846425
Filing Dt:
05/13/2004
Publication #:
US20040235302
Pub Dt:
11/25/2004
Title:
METHOD OF ATOMIC LAYER DEPOSITION ON PLURAL SEMICONDUCTOR SUBSTRATES SIMULTANEOUSLY
5
Patent #:
7605852
Issue Dt:
10/20/2009
Application #:
10846513
Filing Dt:
05/17/2004
Publication #:
US20050253944
Pub Dt:
11/17/2005
Title:
REAL-TIME EXPOSURE CONTROL FOR AUTOMATIC LIGHT CONTROL
6
Patent #:
7196935
Issue Dt:
03/27/2007
Application #:
10847840
Filing Dt:
05/18/2004
Publication #:
US20050259475
Pub Dt:
11/24/2005
Title:
BALLISTIC INJECTION NROM FLASH MEMORY
7
Patent #:
7115524
Issue Dt:
10/03/2006
Application #:
10848030
Filing Dt:
05/17/2004
Publication #:
US20050255702
Pub Dt:
11/17/2005
Title:
METHODS OF PROCESSING A SEMICONDUCTOR SUBSTRATE
8
Patent #:
7115512
Issue Dt:
10/03/2006
Application #:
10848247
Filing Dt:
05/17/2004
Publication #:
US20050255701
Pub Dt:
11/17/2005
Title:
METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS
9
Patent #:
7421606
Issue Dt:
09/02/2008
Application #:
10848261
Filing Dt:
05/18/2004
Publication #:
US20050262373
Pub Dt:
11/24/2005
Title:
DLL PHASE DETECTION USING ADVANCED PHASE EQUALIZATION
10
Patent #:
7071531
Issue Dt:
07/04/2006
Application #:
10848389
Filing Dt:
05/19/2004
Publication #:
US20040262641
Pub Dt:
12/30/2004
Title:
TRENCH ISOLATION FOR SEMICONDUCTOR DEVICES
11
Patent #:
7222213
Issue Dt:
05/22/2007
Application #:
10848606
Filing Dt:
05/17/2004
Publication #:
US20050257021
Pub Dt:
11/17/2005
Title:
SYSTEM AND METHOD FOR COMMUNICATING THE SYNCHRONIZATION STATUS OF MEMORY MODULES DURING INITIALIZATION OF THE MEMORY MODULES
12
Patent #:
7176576
Issue Dt:
02/13/2007
Application #:
10850168
Filing Dt:
05/19/2004
Publication #:
US20040212093
Pub Dt:
10/28/2004
Title:
CONDUCTIVE CONNECTION FORMING METHODS, OXIDATION REDUCING METHODS, AND INTEGRATED CIRCUITS FORMED THEREBY
13
Patent #:
7304485
Issue Dt:
12/04/2007
Application #:
10850834
Filing Dt:
05/21/2004
Publication #:
US20040268275
Pub Dt:
12/30/2004
Title:
ANALYSIS OF THE QUALITY OF CONTACTS AND VIAS IN MULTI-METAL FABRICATION PROCESSES OF SEMICONDUCTOR DEVICES, METHOD AND TEST CHIP ARCHITECTURE
14
Patent #:
6949430
Issue Dt:
09/27/2005
Application #:
10851616
Filing Dt:
05/20/2004
Publication #:
US20040214438
Pub Dt:
10/28/2004
Title:
SEMICONDUCTOR PROCESSING METHODS
15
Patent #:
6949792
Issue Dt:
09/27/2005
Application #:
10852312
Filing Dt:
05/24/2004
Publication #:
US20040245565
Pub Dt:
12/09/2004
Title:
POLYSILICON STRUCTURE IN A STACKED GATE REGION OF A SEMICONDUCTOR DEVICE
16
Patent #:
7224070
Issue Dt:
05/29/2007
Application #:
10852315
Filing Dt:
05/24/2004
Publication #:
US20040212082
Pub Dt:
10/28/2004
Title:
A PLURALITY OF SEMICONDUCTOR DIE IN AN ASSEMBLY
17
Patent #:
7078264
Issue Dt:
07/18/2006
Application #:
10852316
Filing Dt:
05/24/2004
Publication #:
US20040212083
Pub Dt:
10/28/2004
Title:
STACKED SEMICONDUCTOR DIE
18
Patent #:
7183194
Issue Dt:
02/27/2007
Application #:
10852318
Filing Dt:
05/24/2004
Publication #:
US20040211061
Pub Dt:
10/28/2004
Title:
METHOD OF FORMING SOCKET CONTACTS
19
Patent #:
7393562
Issue Dt:
07/01/2008
Application #:
10852784
Filing Dt:
05/24/2004
Publication #:
US20040213908
Pub Dt:
10/28/2004
Title:
DEPOSITION METHODS FOR IMPROVED DELIVERY OF METASTABLE SPECIES
20
Patent #:
6901023
Issue Dt:
05/31/2005
Application #:
10852899
Filing Dt:
05/25/2004
Publication #:
US20040218442
Pub Dt:
11/04/2004
Title:
WORD LINE DRIVER FOR NEGATIVE VOLTAGE
21
Patent #:
7516281
Issue Dt:
04/07/2009
Application #:
10853319
Filing Dt:
05/25/2004
Publication #:
US20050268059
Pub Dt:
12/01/2005
Title:
ON-DIE TERMINATION SNOOPING FOR 2T APPLICATIONS IN A MEMORY SYSTEM IMPLEMENTING NON-SELF-TERMINATING ODT SCHEMES
22
Patent #:
7189593
Issue Dt:
03/13/2007
Application #:
10853377
Filing Dt:
05/25/2004
Publication #:
US20040219713
Pub Dt:
11/04/2004
Title:
ELIMINATION OF RDL USING TAPE BASE FLIP CHIP ON FLEX FOR DIE STACKING
23
Patent #:
7253064
Issue Dt:
08/07/2007
Application #:
10853538
Filing Dt:
05/25/2004
Publication #:
US20040219760
Pub Dt:
11/04/2004
Title:
CASCODE I/O DRIVER WITH IMPROVED ESD OPERATION
24
Patent #:
7341947
Issue Dt:
03/11/2008
Application #:
10853941
Filing Dt:
05/25/2004
Publication #:
US20070190781
Pub Dt:
08/16/2007
Title:
METHODS OF FORMING METAL-CONTAINING FILMS OVER SURFACES OF SEMICONDUCTOR SUBSTRATES
25
Patent #:
7221597
Issue Dt:
05/22/2007
Application #:
10854396
Filing Dt:
05/26/2004
Publication #:
US20050276117
Pub Dt:
12/15/2005
Title:
BALLISTIC DIRECT INJECTION FLASH MEMORY CELL ON STRAINED SILICON STRUCTURES
26
Patent #:
7143255
Issue Dt:
11/28/2006
Application #:
10854397
Filing Dt:
05/26/2004
Publication #:
US20050138274
Pub Dt:
06/23/2005
Title:
CHIP PROTECTION REGISTER LOCK CIRCUIT IN A FLASH MEMORY DEVICE
27
Patent #:
8779596
Issue Dt:
07/15/2014
Application #:
10854552
Filing Dt:
05/26/2004
Publication #:
US20040217481
Pub Dt:
11/04/2004
Title:
STRUCTURES AND METHODS TO ENHANCE COPPER METALLIZATION
28
Patent #:
7042775
Issue Dt:
05/09/2006
Application #:
10854686
Filing Dt:
05/26/2004
Publication #:
US20040218444
Pub Dt:
11/04/2004
Title:
SEMICONDUCTOR MEMORY WITH WORDLINE TIMING
29
Patent #:
7612816
Issue Dt:
11/03/2009
Application #:
10854775
Filing Dt:
05/26/2004
Publication #:
US20050179470
Pub Dt:
08/18/2005
Title:
LOW POWER COMPARATOR
30
Patent #:
7084686
Issue Dt:
08/01/2006
Application #:
10854849
Filing Dt:
05/25/2004
Publication #:
US20050264325
Pub Dt:
12/01/2005
Title:
SYSTEM AND METHOD FOR OPEN-LOOP SYNTHESIS OF OUTPUT CLOCK SIGNALS HAVING A SELECTED PHASE RELATIVE TO AN INPUT CLOCK SIGNAL
31
Patent #:
7646099
Issue Dt:
01/12/2010
Application #:
10854891
Filing Dt:
05/27/2004
Publication #:
US20040217484
Pub Dt:
11/04/2004
Title:
SELF-ALIGNED, INTEGRATED CIRCUIT CONTACT
32
Patent #:
7098105
Issue Dt:
08/29/2006
Application #:
10855429
Filing Dt:
05/26/2004
Publication #:
US20050277249
Pub Dt:
12/15/2005
Title:
METHODS FOR FORMING SEMICONDUCTOR STRUCTURES
33
Patent #:
7112488
Issue Dt:
09/26/2006
Application #:
10855844
Filing Dt:
05/27/2004
Publication #:
US20050266678
Pub Dt:
12/01/2005
Title:
SOURCE LINES FOR NAND MEMORY DEVICES
34
Patent #:
7211849
Issue Dt:
05/01/2007
Application #:
10856356
Filing Dt:
05/28/2004
Publication #:
US20040264240
Pub Dt:
12/30/2004
Title:
PROTECTIVE LAYERS FOR MRAM DEVICES
35
Patent #:
7363419
Issue Dt:
04/22/2008
Application #:
10857467
Filing Dt:
05/28/2004
Publication #:
US20050268060
Pub Dt:
12/01/2005
Title:
METHOD AND SYSTEM FOR TERMINATING WRITE COMMANDS IN A HUB-BASED MEMORY SYSTEM
36
Patent #:
7285796
Issue Dt:
10/23/2007
Application #:
10857876
Filing Dt:
06/02/2004
Publication #:
US20050269606
Pub Dt:
12/08/2005
Title:
RAISED PHOTODIODE SENSOR TO INCREASE FILL FACTOR AND QUANTUM EFFICIENCY IN SCALED PIXELS
37
Patent #:
7280278
Issue Dt:
10/09/2007
Application #:
10857948
Filing Dt:
06/02/2004
Publication #:
US20050270651
Pub Dt:
12/08/2005
Title:
APPARATUS AND METHOD FOR MANUFACTURING POSITIVE OR NEGATIVE MICROLENSES
38
Patent #:
6951791
Issue Dt:
10/04/2005
Application #:
10859016
Filing Dt:
06/01/2004
Publication #:
US20040222441
Pub Dt:
11/11/2004
Title:
GLOBAL COLUMN SELECT STRUCTURE FOR ACCESSING A MEMORY
39
Patent #:
7019378
Issue Dt:
03/28/2006
Application #:
10859543
Filing Dt:
06/03/2004
Publication #:
US20050258490
Pub Dt:
11/24/2005
Title:
FIELD-SHIELDED SOI-MOS STRUCTURE FREE FROM FLOATING BODY EFFECTS, AND METHOD OF FABRICATION THEREFOR
40
Patent #:
7095088
Issue Dt:
08/22/2006
Application #:
10859814
Filing Dt:
06/03/2004
Publication #:
US20040217476
Pub Dt:
11/04/2004
Title:
SYSTEM AND DEVICE INCLUDING A BARRIER LAYER
41
Patent #:
7699932
Issue Dt:
04/20/2010
Application #:
10859883
Filing Dt:
06/02/2004
Publication #:
US20050268856
Pub Dt:
12/08/2005
Title:
REACTORS, SYSTEMS AND METHODS FOR DEPOSITING THIN FILMS ONTO MICROFEATURE WORKPIECES
42
Patent #:
7039751
Issue Dt:
05/02/2006
Application #:
10860013
Filing Dt:
06/04/2004
Publication #:
US20040220978
Pub Dt:
11/04/2004
Title:
PROGRAMMABLE CACHE SYSTEM
43
Patent #:
7148715
Issue Dt:
12/12/2006
Application #:
10860699
Filing Dt:
06/02/2004
Publication #:
US20050270055
Pub Dt:
12/08/2005
Title:
SYSTEMS AND METHODS FOR TESTING MICROELECTRONIC IMAGERS AND MICROFEATURE DEVICES
44
Patent #:
7109112
Issue Dt:
09/19/2006
Application #:
10860939
Filing Dt:
06/03/2004
Publication #:
US20040219738
Pub Dt:
11/04/2004
Title:
METHOD OF PROVIDING A STRUCTURE USING SELF-ALIGNED FEATURES
45
Patent #:
6839821
Issue Dt:
01/04/2005
Application #:
10861074
Filing Dt:
06/04/2004
Publication #:
US20040221095
Pub Dt:
11/04/2004
Title:
METHOD AND APPARATUS FOR MEMORY CONTROL CIRCUIT
46
Patent #:
7519788
Issue Dt:
04/14/2009
Application #:
10861145
Filing Dt:
06/04/2004
Publication #:
US20050286506
Pub Dt:
12/29/2005
Title:
SYSTEM AND METHOD FOR AN ASYNCHRONOUS DATA BUFFER HAVING BUFFER WRITE AND READ POINTERS
47
Patent #:
7310748
Issue Dt:
12/18/2007
Application #:
10861163
Filing Dt:
06/04/2004
Publication #:
US20050283681
Pub Dt:
12/22/2005
Title:
MEMORY HUB TESTER INTERFACE AND METHOD FOR USE THEREOF
48
Patent #:
7006025
Issue Dt:
02/28/2006
Application #:
10861340
Filing Dt:
06/04/2004
Publication #:
US20050040977
Pub Dt:
02/24/2005
Title:
METHOD FOR GENERATING A REFERENCE CURRENT FOR SENSE AMPLIFIERS AND CORRESPONDING GENERATOR
49
Patent #:
6889289
Issue Dt:
05/03/2005
Application #:
10861499
Filing Dt:
06/07/2004
Publication #:
US20040222997
Pub Dt:
11/11/2004
Title:
METHOD OF DISTRIBUTED CACHING
50
Patent #:
7535759
Issue Dt:
05/19/2009
Application #:
10861645
Filing Dt:
06/04/2004
Publication #:
US20050273548
Pub Dt:
12/08/2005
Title:
MEMORY SYSTEM WITH USER CONFIGURABLE DENSITY/PERFORMANCE OPTION
51
Patent #:
8082382
Issue Dt:
12/20/2011
Application #:
10861646
Filing Dt:
06/04/2004
Publication #:
US20050273549
Pub Dt:
12/08/2005
Title:
MEMORY DEVICE WITH USER CONFIGURABLE DENSITY/PERFORMANCE
52
Patent #:
7161203
Issue Dt:
01/09/2007
Application #:
10861744
Filing Dt:
06/04/2004
Publication #:
US20050269648
Pub Dt:
12/08/2005
Title:
GATED FIELD EFFECT DEVICE COMPRISING GATE DIELECTRIC HAVING DIFFERENT K REGIONS
53
Patent #:
7181837
Issue Dt:
02/27/2007
Application #:
10861847
Filing Dt:
06/04/2004
Publication #:
US20050269130
Pub Dt:
12/08/2005
Title:
PLATING BUSS AND A METHOD OF USE THEREOF
54
Patent #:
7109576
Issue Dt:
09/19/2006
Application #:
10862102
Filing Dt:
06/04/2004
Publication #:
US20040227240
Pub Dt:
11/18/2004
Title:
SEMICONDUCTOR COMPONENT HAVING ENCAPSULATED DIE STACK
55
Patent #:
7006393
Issue Dt:
02/28/2006
Application #:
10862284
Filing Dt:
06/07/2004
Publication #:
US20050270841
Pub Dt:
12/08/2005
Title:
METHOD AND APPARATUS FOR SEMICONDUCTOR DEVICE REPAIR WITH REDUCED NUMBER OF PROGRAMMABLE ELEMENTS
56
Patent #:
7006394
Issue Dt:
02/28/2006
Application #:
10862532
Filing Dt:
06/07/2004
Publication #:
US20050270862
Pub Dt:
12/08/2005
Title:
APPARATUS AND METHOD FOR SEMICONDUCTOR DEVICE REPAIR WITH REDUCED NUMBER OF PROGRAMMABLE ELEMENTS
57
Patent #:
6987701
Issue Dt:
01/17/2006
Application #:
10862807
Filing Dt:
06/07/2004
Publication #:
US20040223367
Pub Dt:
11/11/2004
Title:
PHASE DETECTOR FOR ALL-DIGITAL PHASE LOCKED AND DELAY LOCKED LOOPS
58
Patent #:
7149876
Issue Dt:
12/12/2006
Application #:
10863202
Filing Dt:
06/09/2004
Publication #:
US20040250047
Pub Dt:
12/09/2004
Title:
METHOD AND APPARATUS FOR A SHIFT REGISTER BASED INTERCONNECTION FOR A MASSIVELY PARALLEL PROCESSOR ARRAY
59
Patent #:
6969882
Issue Dt:
11/29/2005
Application #:
10863203
Filing Dt:
06/09/2004
Publication #:
US20040262657
Pub Dt:
12/30/2004
Title:
INTERCONNECT LINE SELECTIVELY ISOLATED FROM AN UNDERLYING CONTACT PLUG
60
Patent #:
7274095
Issue Dt:
09/25/2007
Application #:
10863447
Filing Dt:
06/08/2004
Publication #:
US20040217459
Pub Dt:
11/04/2004
Title:
INTERPOSERS WITH RECEPTACLES FOR RECEIVING SEMICONDUCTOR DEVICES AND ASSEMBLIES AND PACKAGES INCLUDING SUCH INTERPOSERS
61
Patent #:
7441268
Issue Dt:
10/21/2008
Application #:
10863661
Filing Dt:
06/08/2004
Publication #:
US20050270983
Pub Dt:
12/08/2005
Title:
METHOD AND APPARATUS TO MANAGE EXCEPTIONS IN NETWORK PROCESSORS
62
Patent #:
7205620
Issue Dt:
04/17/2007
Application #:
10863953
Filing Dt:
06/09/2004
Publication #:
US20040222476
Pub Dt:
11/11/2004
Title:
HIGHLY RELIABLE AMORPHOUS HIGH-K GATE DIELECTRIC ZROXNY
63
Patent #:
6912439
Issue Dt:
06/28/2005
Application #:
10863966
Filing Dt:
06/08/2004
Publication #:
US20040220693
Pub Dt:
11/04/2004
Title:
SYNTHESIZING SEMICONDUCTOR PROCESS FLOW MODELS
64
Patent #:
7498647
Issue Dt:
03/03/2009
Application #:
10864974
Filing Dt:
06/10/2004
Publication #:
US20050275049
Pub Dt:
12/15/2005
Title:
PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
65
Patent #:
7327620
Issue Dt:
02/05/2008
Application #:
10865218
Filing Dt:
06/10/2004
Publication #:
US20050276145
Pub Dt:
12/15/2005
Title:
DIFFERENTIAL INPUT BUFFER FOR RECEIVING SIGNALS RELEVANT TO LOW POWER
66
Patent #:
7071730
Issue Dt:
07/04/2006
Application #:
10865725
Filing Dt:
06/09/2004
Publication #:
US20050275389
Pub Dt:
12/15/2005
Title:
VOLTAGE LEVEL TRANSLATOR CIRCUITRY
67
Patent #:
7550816
Issue Dt:
06/23/2009
Application #:
10866290
Filing Dt:
06/11/2004
Publication #:
US20040235263
Pub Dt:
11/25/2004
Title:
FILLED TRENCH ISOLATION STRUCTURE
68
Patent #:
7253089
Issue Dt:
08/07/2007
Application #:
10867023
Filing Dt:
06/14/2004
Publication #:
US20050277279
Pub Dt:
12/15/2005
Title:
MICROFEATURE DEVICES AND METHODS FOR MANUFACTURING MICROFEATURE DEVICES
69
Patent #:
7050335
Issue Dt:
05/23/2006
Application #:
10867378
Filing Dt:
06/14/2004
Publication #:
US20050018490
Pub Dt:
01/27/2005
Title:
FLASH MEMORY COMPRISING MEANS FOR CHECKING AND REFRESHING MEMORY CELLS IN THE ERASED STATE
70
Patent #:
7079448
Issue Dt:
07/18/2006
Application #:
10867381
Filing Dt:
06/14/2004
Publication #:
US20050024952
Pub Dt:
02/03/2005
Title:
WORD-PROGRAMMABLE FLASH MEMORY
71
Patent #:
7253022
Issue Dt:
08/07/2007
Application #:
10867530
Filing Dt:
06/14/2004
Publication #:
US20040232564
Pub Dt:
11/25/2004
Title:
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE WITH MULTI-LAYER METAL BUMPS
72
Patent #:
7215580
Issue Dt:
05/08/2007
Application #:
10867800
Filing Dt:
06/14/2004
Publication #:
US20050018527
Pub Dt:
01/27/2005
Title:
NON-VOLATILE MEMORY CONTROL
73
Patent #:
6934187
Issue Dt:
08/23/2005
Application #:
10868306
Filing Dt:
06/15/2004
Publication #:
US20040228189
Pub Dt:
11/18/2004
Title:
PROGRAMMABLE SOFT-START CONTROL FOR CHARGE PUMP
74
Patent #:
7390690
Issue Dt:
06/24/2008
Application #:
10869868
Filing Dt:
06/18/2004
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Title:
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Assignor
1
MICRON TECHNOLOGY, INC.
Exec Dt:
04/26/2016
Assignee
1
U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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