skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
06/20/2000
Application #:
08818325
Filing Dt:
03/14/1997
Title:
ETCHING PROCESS USING A BUFFER LAYER
2
Patent #:
Issue Dt:
02/15/2000
Application #:
08818456
Filing Dt:
03/17/1997
Title:
DIRECT CONNECT INTERCONNECT FOR TESTING SEMICONDUCTOR DICE AND WAFERS
3
Patent #:
Issue Dt:
07/28/1998
Application #:
08818597
Filing Dt:
03/14/1997
Title:
METHOD OF MAKING A CAPACITOR
4
Patent #:
Issue Dt:
02/09/1999
Application #:
08818629
Filing Dt:
03/14/1997
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING A CONTACT OPENING TO A SEMICONDUCTOR SUBSTRATE
5
Patent #:
Issue Dt:
06/27/2000
Application #:
08818636
Filing Dt:
03/14/1997
Title:
COMBINATION OF SEMICONDUCTOR INTERCONNECT
6
Patent #:
Issue Dt:
08/31/1999
Application #:
08818637
Filing Dt:
03/14/1997
Title:
METHOD OF FORMING A LOCAL INTERCONNECT BETWEEN ELECTRONIC DEVICES ON A SEMICONTDUCTOR SUBSTRATE
7
Patent #:
Issue Dt:
12/12/2000
Application #:
08819172
Filing Dt:
03/17/1997
Title:
GRADED LDD IMPLANT PROCESS FOR SUB-HALF-MICRON MOS DEVICES
8
Patent #:
Issue Dt:
09/28/1999
Application #:
08819519
Filing Dt:
03/17/1997
Title:
CIRCUIT FOR DETECTING THE COINCIDENCE BETWEEN A BINARY INFORMATION UNIT STORED THEREIN AND AN EXTERNAL DATUM
9
Patent #:
Issue Dt:
10/05/1999
Application #:
08819618
Filing Dt:
03/17/1997
Title:
METHOD FOR FORMING FIELD OXIDE OR OTHER INSULATORS DURING THE FORMATION OF A SEMICONDUCTOR DEVICE
10
Patent #:
Issue Dt:
07/28/1998
Application #:
08819991
Filing Dt:
03/18/1997
Title:
METHOD AND APPARATUS FOR READING OUT A PROGRAMMABLE RESISTOR MEMORY
11
Patent #:
Issue Dt:
02/09/1999
Application #:
08820267
Filing Dt:
03/17/1997
Title:
METHOD OF FORMING A CAPACITOR
12
Patent #:
Issue Dt:
08/14/2007
Application #:
08820374
Filing Dt:
03/12/1997
Title:
THREE-LAYER LOWER CAPACITOR ELECTRODE
13
Patent #:
Issue Dt:
08/03/1999
Application #:
08820815
Filing Dt:
03/19/1997
Title:
DISPLAY DEVICE WITH GRILLE HAVING GETTER MATERIAL
14
Patent #:
Issue Dt:
04/07/1998
Application #:
08821244
Filing Dt:
03/20/1997
Title:
METHODS OF FORMING NON-VOLATILE MEMORY ARRAYS
15
Patent #:
Issue Dt:
02/15/2000
Application #:
08821468
Filing Dt:
03/21/1997
Title:
HYBRID INTERCONNECT AND SYSTEM FOR TESTING SEMICONDUCTOR DICE
16
Patent #:
Issue Dt:
08/28/2001
Application #:
08821611
Filing Dt:
03/20/1997
Title:
SPREAD SPECTRUM CODES FOR USE IN COMMUNICATION
17
Patent #:
Issue Dt:
12/29/1998
Application #:
08821804
Filing Dt:
03/21/1997
Title:
SECTORIZED ELECTRICALLY ERASABLE AND PROGRAMMABLE NON-VOLATILE MEMORY DEVICE WITH REDUNDANCY
18
Patent #:
Issue Dt:
04/25/2000
Application #:
08821805
Filing Dt:
03/21/1997
Title:
APPARATUS AND METHOD FOR MAINTAINING SYNCHRONISM BETWEEN A PICTURE SIGNAL AND A MATRIX SCANNED ARRAY
19
Patent #:
Issue Dt:
08/15/2000
Application #:
08822074
Filing Dt:
03/20/1997
Title:
METHODS FOR TESTING SEMICONDUCTOR DEVICES
20
Patent #:
Issue Dt:
01/05/1999
Application #:
08822731
Filing Dt:
03/24/1997
Title:
METHOD FOR CONTINUOUS, NON LOT-BASED INTEGRATED CIRCUIT MANUFACTURING
21
Patent #:
Issue Dt:
09/29/1998
Application #:
08822743
Filing Dt:
03/25/1997
Title:
PACKAGING MULTIPLE DIES ON A BALL GRID ARRAY SUBSTRATE
22
Patent #:
Issue Dt:
05/26/1998
Application #:
08822991
Filing Dt:
03/21/1997
Title:
METHOD OF JOINTLY FORMING STACKED CAPACITORS AND ANTIFUSES
23
Patent #:
Issue Dt:
07/04/2000
Application #:
08823020
Filing Dt:
03/21/1997
Title:
METHOD OF REDUCING CARBON INCORPORATION INTO FILMS PRODUCED BY CHEMICAL VAPOR DEPOSITION INVOLVING ORGANIC PRECURSOR COMPOUNDS
24
Patent #:
Issue Dt:
03/23/1999
Application #:
08823214
Filing Dt:
03/24/1997
Title:
METHOD AND APPARATUS FOR APPLICATION OF DE-WETTING MATERIAL FOR GLOB TOP APPLICATIONS
25
Patent #:
Issue Dt:
10/26/1999
Application #:
08823234
Filing Dt:
03/20/1997
Title:
COMMUNICATION CONTROL FOR A USER OF A CENTRAL COMMUNICATION CENTER
26
Patent #:
Issue Dt:
01/18/2000
Application #:
08823490
Filing Dt:
03/25/1997
Title:
METHOD, APPARATUS AND SYSTEM FOR TESTING BUMPED SEMICONDUCTOR COMPONENTS
27
Patent #:
Issue Dt:
08/01/2000
Application #:
08823609
Filing Dt:
03/25/1997
Title:
SELF-ALIGNED ISOLATION TRENCH
28
Patent #:
Issue Dt:
08/22/2000
Application #:
08823799
Filing Dt:
03/24/1997
Title:
TEMPERTURE CONTROLLED SPIN CHUCK
29
Patent #:
Issue Dt:
09/21/1999
Application #:
08823815
Filing Dt:
03/24/1997
Title:
SOFT IMPACT DISPENSE NOZZLE
30
Patent #:
Issue Dt:
02/17/2004
Application #:
08824110
Filing Dt:
03/25/1997
Title:
ELECTRONIC TOY USING PRERECORDED MESSAGES
31
Patent #:
Issue Dt:
12/08/1998
Application #:
08824616
Filing Dt:
03/27/1997
Title:
ROW DECODING CIRCUIT FOR SEMICONDUCTOR NON-VOLATILE ELECTRICALLY PROGRAMMABLE MEMORY AND CORRESPONDING METHOD
32
Patent #:
Issue Dt:
11/02/1999
Application #:
08824888
Filing Dt:
03/18/1997
Title:
HIGH-VOLTAGE-RESISTANT MOS TRANSISTOR, AND CORRESPONDING MANUFACTURING PROCESS
33
Patent #:
Issue Dt:
09/08/1998
Application #:
08824958
Filing Dt:
03/27/1997
Title:
VOLTAGE BOOSTER FOR MEMORY DEVICES
34
Patent #:
Issue Dt:
03/09/1999
Application #:
08825098
Filing Dt:
03/27/1997
Title:
DATA SENSING TIMING MODULATING CIRCUIT, PARTICULARLY FOR NON-VOLATILE MEMORIES
35
Patent #:
Issue Dt:
03/23/1999
Application #:
08825138
Filing Dt:
03/28/1997
Title:
CIRCUIT AND METHOD TO ADJUST MEMORY TIMING
36
Patent #:
Issue Dt:
11/03/1998
Application #:
08825327
Filing Dt:
03/28/1997
Title:
CIRCUIT AND METHOD FOR REGULATING A VOLTAGE
37
Patent #:
Issue Dt:
02/02/1999
Application #:
08825644
Filing Dt:
04/03/1997
Title:
SEMICONDUCTOR PROCESSING METHOD OF FORMING A CONTACT OPENING TO A REGION ADJACENT A FIELD ISOLATION MASS
38
Patent #:
Issue Dt:
09/29/1998
Application #:
08825871
Filing Dt:
04/02/1997
Title:
MODULAR MEMORY CIRCUIT AND METHOD FOR FORMING SAME
39
Patent #:
Issue Dt:
03/30/1999
Application #:
08826008
Filing Dt:
03/27/1997
Title:
STANDBY VOLTAGE BOOSTING STAGE AND METHOD FOR A MEMORY DEVICE
40
Patent #:
Issue Dt:
01/12/1999
Application #:
08826009
Filing Dt:
03/27/1997
Title:
PULSE GENERATION CIRCUIT AND METHOD FOR SYNCHRONIZED DATA LOADING IN AN OUTPUT PRE-BUFFER
41
Patent #:
Issue Dt:
05/12/1998
Application #:
08826223
Filing Dt:
03/27/1997
Title:
DRIVER DEVICE FOR SELECTION LINES FOR A MULTIPLEXER, TO BE USED IN A WIDE RANGE OF SUPPLY VOLTAGES, PARTICULARLY FOR NON-VOLATILE MEMORIES
42
Patent #:
Issue Dt:
08/31/1999
Application #:
08826489
Filing Dt:
03/27/1997
Title:
NONVOLATILE MEMORY DEVICE CAPABLE OF READING DATA WITH AN APPROPRIATE SELF-TIMING AND A REDUCED NUMBER OF REFERENCE LINES
43
Patent #:
Issue Dt:
10/31/2000
Application #:
08826548
Filing Dt:
04/03/1997
Title:
METHOD AND SYSTEM FOR AVOIDING LIVELOCK CONDITIONS ON A COMPUTER BUS BY INSURING THAT THE FIRST RETIRED BUS MASTER IS THE FIRST TO RESUBMIT ITS RETIRED TRANSACTION
44
Patent #:
Issue Dt:
12/07/1999
Application #:
08827022
Filing Dt:
03/25/1997
Title:
MATRIX DISPLAY WITH PERIPHERAL DRIVE SIGNAL SOURCES
45
Patent #:
Issue Dt:
01/11/2000
Application #:
08827042
Filing Dt:
03/25/1997
Title:
METHOD AND APPARATUS FOR SELECTIVELY DISPLAYING A PARAMETER IN A SEPARATE PANEL
46
Patent #:
Issue Dt:
01/26/1999
Application #:
08827409
Filing Dt:
03/27/1997
Title:
SYSTEM FOR DETERMINING THE PROGRAMMED/NON PROGRAMMED STATUS OF A MEMORY CELL
47
Patent #:
Issue Dt:
08/07/2001
Application #:
08827886
Filing Dt:
04/07/1997
Title:
INTERDIGITATED LEADS-OVER-CHIP LEAD FRAME, DEVICE, AND METHOD FOR SUPPORTING AN INTEGRATED CIRCUIT DIE
48
Patent #:
Issue Dt:
11/17/1998
Application #:
08828039
Filing Dt:
03/27/1997
Title:
METHOD AND APPARATUS FOR REDUNDANCY MANAGEMENT OF NON-VOLATILE MEMORIES
49
Patent #:
Issue Dt:
07/27/1999
Application #:
08828255
Filing Dt:
03/26/1997
Title:
PROJECTED CONTACT STRUCTURE FOR BUMPED SEMICONDUCTOR DEVICE AND RESULTING ARTICLES AND ASSEMBLIES
50
Patent #:
Issue Dt:
12/01/1998
Application #:
08828364
Filing Dt:
03/28/1997
Title:
METHOD AND APPARATUS FOR PROGRAMMING ANTI-FUSES
51
Patent #:
Issue Dt:
05/04/1999
Application #:
08828790
Filing Dt:
03/27/1997
Title:
GAIN MODULATED SENSE AMPLIFIER
52
Patent #:
Issue Dt:
09/28/1999
Application #:
08828791
Filing Dt:
03/27/1997
Title:
CIRCUIT AND METHOD FOR GENERATING A POWER-ON RESET SIGNAL
53
Patent #:
Issue Dt:
10/10/2000
Application #:
08828877
Filing Dt:
03/31/1997
Title:
BONDING AND INSPECTION SYSTEM
54
Patent #:
Issue Dt:
10/05/1999
Application #:
08829193
Filing Dt:
03/31/1997
Title:
INLTERCONNECT HAVING RECESSED CONTACT MEMBERS WITH PENETRATING BLADES FOR TESTING SEMICONDUCTOR DICE AND PACKAGES WITH CONTACT BUMPS
55
Patent #:
Issue Dt:
06/02/1998
Application #:
08829403
Filing Dt:
03/31/1997
Title:
METHOD FOR MAKING MULTI-PHASE, PHASE SHIFTING MASKS
56
Patent #:
Issue Dt:
07/20/1999
Application #:
08829594
Filing Dt:
03/31/1997
Title:
PERIPHERAL DEVICE PREVENTING POST-SCAN MODIFICATION
57
Patent #:
Issue Dt:
02/20/2001
Application #:
08829608
Filing Dt:
03/31/1997
Title:
EMPLOYING A LOOK-UP SERVICE AND A CALLEE CONNECTION SERVICE TO ESTABLISH A NETWORK PHONE CALL BETWEEN A CALLER AND A CALLEE
58
Patent #:
Issue Dt:
12/14/1999
Application #:
08829856
Filing Dt:
04/01/1997
Title:
METHOD FOR PERFORMING COMMON SUBEXPRESSION ELIMINATION ON A RACK-N STATIC SINGLE ASSIGNMENT LANGUAGE
59
Patent #:
Issue Dt:
12/22/1998
Application #:
08831066
Filing Dt:
04/01/1997
Title:
ATOM LITHOGRAPHIC MASK HAVING DIFFRACTION GRATING AND ATTENUATED PHASE SHIFTERS
60
Patent #:
Issue Dt:
05/25/1999
Application #:
08831266
Filing Dt:
03/31/1997
Title:
MOVING SECTORS WITHIN A BLOCK OF INFORMATION IN A FLASH MEMORY MASS STORAGE ARCHITECTURE
61
Patent #:
Issue Dt:
07/20/1999
Application #:
08831529
Filing Dt:
04/01/1997
Title:
SEMICONDUCTOR WAFER WAFER ALIGNMENT PATTERNS
62
Patent #:
Issue Dt:
06/16/1998
Application #:
08831578
Filing Dt:
04/09/1997
Title:
METHOD AND APPARATUS FOR CONNECTING A TELEPHONE TO A VOICE CAPABLE MODEM
63
Patent #:
Issue Dt:
10/05/1999
Application #:
08831611
Filing Dt:
04/10/1997
Title:
METHOD FOR CLEANING SEMICONDUCTOR WAFERS
64
Patent #:
Issue Dt:
01/18/2000
Application #:
08831739
Filing Dt:
04/01/1997
Title:
METHOD FOR USING STATIC SINGLE ASSIGNMENT TO COLOR OUT ARTIFICIAL REGISTER DEPENDENCIES
65
Patent #:
Issue Dt:
11/10/1998
Application #:
08832039
Filing Dt:
04/03/1997
Title:
CIRCUIT AND METHOD FOR GENERATING A CONTROL SIGNAL FOR A MEMORY DEVICE
66
Patent #:
Issue Dt:
09/15/1998
Application #:
08832387
Filing Dt:
04/02/1997
Title:
CONTACT OPENINGS AND AN ELECTRONIC COMPONENT FORMED FROM THE SAME
67
Patent #:
Issue Dt:
09/22/1998
Application #:
08832437
Filing Dt:
04/03/1997
Title:
INTEGRATED CIRCUIT CLOCK INPUT BUFFER
68
Patent #:
Issue Dt:
07/18/2000
Application #:
08832979
Filing Dt:
04/04/1997
Title:
POLISHING PAD, METHODS OF MANUFACTURING AND USE
69
Patent #:
Issue Dt:
01/16/2001
Application #:
08833336
Filing Dt:
04/04/1997
Title:
VOLTAGE REGULATOR FOR PROGRAMMING ELECTRICALLY PROGRAMMABLE NON-VOLATILE MEMORY CELLS IN A CELL MATRIX
70
Patent #:
Issue Dt:
06/23/1998
Application #:
08833863
Filing Dt:
04/10/1997
Title:
METHOD OF LEADS BETWEEN CHIPS ASSEMBLY
71
Patent #:
Issue Dt:
12/15/1998
Application #:
08833925
Filing Dt:
04/10/1997
Title:
FLASH-EPROM WITH EMBEDDED EEPROM
72
Patent #:
Issue Dt:
08/03/1999
Application #:
08834026
Filing Dt:
04/11/1997
Title:
SELF-CONFIGURING INTERFACE ARCHITECTURE ON FLASH MEMORIES
73
Patent #:
Issue Dt:
09/30/2003
Application #:
08834029
Filing Dt:
04/11/1997
Title:
SELF-CONTAINING INPUT BUFFER ON FLASH MEMORIES
74
Patent #:
Issue Dt:
05/11/1999
Application #:
08834032
Filing Dt:
04/11/1997
Title:
SELF-CONFIGURING OUTPUT BUFFER ON FLASH MEMORIES
75
Patent #:
Issue Dt:
05/16/2000
Application #:
08834524
Filing Dt:
04/04/1997
Title:
VARIABLE ABRASIVE POLISHING PAD FOR MECHANICAL AND CHEMICAL-MECHANICAL PLANARIZATION
76
Patent #:
Issue Dt:
11/14/2000
Application #:
08835030
Filing Dt:
03/28/1997
Title:
A MEMORY UNDER TEST PROGRAMMING AND READING DEVICE
77
Patent #:
Issue Dt:
09/01/1998
Application #:
08835031
Filing Dt:
03/27/1997
Title:
CIRCUIT FOR THE GENERATION OF A VOLTAGE AS A FUNCTION OF THE CONDUCTIVITY OF AN ELEMENTARY CELL OF A NON-VOLATILE MEMORY
78
Patent #:
Issue Dt:
05/19/1998
Application #:
08835033
Filing Dt:
03/27/1997
Title:
REFERENCE WORD LINE AND DATA PROPAGATION REPRODUCTION CIRCUIT FOR MEMORIES PROVIDED WITH HIERARCHICAL DECODERS
79
Patent #:
Issue Dt:
04/06/1999
Application #:
08835155
Filing Dt:
04/04/1997
Title:
FIELD EMISSION DISPLAY WITH SELF-ALIGNED GRID
80
Patent #:
Issue Dt:
05/19/1998
Application #:
08835294
Filing Dt:
04/07/1997
Title:
CIRCUIT FOR THE SWITCHING OF SUPPLY VOLTAGES IN ELECTRICALLY PROGRAMMABLE AND CANCELABLE NON-VOLATILE SEMICONDUCTOR MEMORY DEVICES
81
Patent #:
Issue Dt:
09/12/2000
Application #:
08835295
Filing Dt:
04/07/1997
Title:
BLACK MATRIX MATERIAL AND METHODS RELATED THERETO
82
Patent #:
Issue Dt:
01/26/1999
Application #:
08835296
Filing Dt:
04/07/1997
Title:
AUTO-SAVING CIRCUIT FOR PROGRAMMING CONFIGURATION ELEMENTS IN NON-VOLATILE MEMORY DEVICES
83
Patent #:
Issue Dt:
05/09/2000
Application #:
08835347
Filing Dt:
04/07/1997
Title:
PRE-CHARGE STEP DETERMINING CIRCUIT OF A GENERIC BIT LINE PARTICULARLY FOR NON-VOLATILE MEMORIES
84
Patent #:
Issue Dt:
02/02/1999
Application #:
08835763
Filing Dt:
04/08/1997
Title:
SWITCH FOR MINIMIZING TRANSISTOR EXPOSURE TO HIGH VOLTAGE
85
Patent #:
Issue Dt:
02/29/2000
Application #:
08837820
Filing Dt:
04/22/1997
Title:
APPARATUS AND METHOD IMPLEMENTING REPAIRS ON A MEMORY DEVICE
86
Patent #:
Issue Dt:
06/20/2000
Application #:
08839033
Filing Dt:
04/23/1997
Title:
MEMORY SYSTEM HAVING FLEXIBLE ADDRESSING AND METHOD USING TAG AND DATA BUS COMMUNICATION
87
Patent #:
Issue Dt:
06/06/2000
Application #:
08839034
Filing Dt:
04/23/1997
Title:
MEMORY SYSTEM HAVING FLEXIBLE ARCHITECTURE AND METHOD
88
Patent #:
Issue Dt:
01/18/2000
Application #:
08840022
Filing Dt:
04/24/1997
Title:
VOIDLESS METALLIZATION ON TITANIUM ALUMINIDE IN AN INTERCONNECT
89
Patent #:
Issue Dt:
03/02/1999
Application #:
08840056
Filing Dt:
04/24/1997
Title:
CIRCUITS AND METHODS FOR READ-ENABLING MEMORY DEVICES SYNCHRONOUSLY WITHTHE REACHING OF THE MINIMUM FUNCTIONALITY CONDITIONS OF THE MEMORY CELLS AND READING CIRCUITS, PARTICULARLY FOR NON-VOLATILE MEMORIES
90
Patent #:
Issue Dt:
06/02/1998
Application #:
08840084
Filing Dt:
04/09/1997
Title:
PROCESS FOR PREPARING A PRASEODYMIUM-MANGANESE OXIDE MATERIAL FOR USE IN FIELD EMISSION DISPLAYS
91
Patent #:
Issue Dt:
01/25/2000
Application #:
08840403
Filing Dt:
04/29/1997
Title:
METHOD OF ATTACHING A LEADFRAME TO SINGULATED SEMICONDUCTOR DICE
92
Patent #:
Issue Dt:
05/08/2001
Application #:
08840503
Filing Dt:
04/21/1997
Title:
CIRCUIT AND METHOD FOR MEASURING AND FORCING AN INTERNAL VOLTAGE OF AN INTEGRATED CIRCUIT
93
Patent #:
Issue Dt:
01/05/1999
Application #:
08840599
Filing Dt:
04/22/1997
Title:
LOW VOLTAGE DYNAMIC MEMORY
94
Patent #:
Issue Dt:
05/11/1999
Application #:
08841524
Filing Dt:
04/23/1997
Title:
CONDUCTIVE BUMPS ON DIE FOR FLIP CHIP APPLICATION
95
Patent #:
Issue Dt:
11/21/2000
Application #:
08841886
Filing Dt:
05/05/1997
Title:
SUPERCRITICAL ETCHING COMPOSITIONS AND METHOD OF USING SAME
96
Patent #:
Issue Dt:
09/22/1998
Application #:
08841903
Filing Dt:
04/17/1997
Title:
REDUNDANCY MEMORY REGISTER
97
Patent #:
Issue Dt:
11/17/1998
Application #:
08841904
Filing Dt:
04/17/1997
Title:
METHOD FOR DETECTING REDUNDED DEFECTIVE ADDRESSES IN A MEMORY DEVICE WITH REDUNDANCY
98
Patent #:
Issue Dt:
04/22/2003
Application #:
08841908
Filing Dt:
04/17/1997
Title:
METHOD FOR IMPROVING THICKNESS UNIFORMITY OF DEPOSITED OZONE-TEOS SILICATE GLASS LAYERS
99
Patent #:
Issue Dt:
01/16/2001
Application #:
08842030
Filing Dt:
04/23/1997
Title:
MEMORY SYSTEM HAVING SERIAL SELECTION OF MEMORY DEVICES AND METHOD
100
Patent #:
Issue Dt:
03/30/1999
Application #:
08842835
Filing Dt:
04/17/1997
Title:
SEMICONDUCTOR MEMORY DEVICE WITH ROW REDUNDANCY
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

Search Results as of: 05/14/2024 06:59 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT