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Reel/Frame:038669/0001   Pages: 961
Recorded: 05/12/2016
Attorney Dkt #:4816.228
Conveyance: SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
1
Patent #:
Issue Dt:
11/13/2007
Application #:
11218239
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD AND APPARATUS FOR REMOVING MATERIAL FROM MICROFEATURE WORKPIECES
2
Patent #:
Issue Dt:
08/28/2007
Application #:
11218243
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
MICROFEATURE WORKPIECES AND METHODS FOR FORMING INTERCONNECTS IN MICROFEATURE WORKPIECES
3
Patent #:
Issue Dt:
09/18/2007
Application #:
11218254
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
MICROFEATURE WORKPIECES AND METHODS OF FORMING A REDISTRIBUTION LAYER ON MICROFEATURE WORKPIECES
4
Patent #:
Issue Dt:
05/08/2012
Application #:
11218256
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
MICROELECTRONIC DEVICES AND MICROELECTRONIC SUPPORT DEVICES, AND ASSOCIATED ASSEMBLIES AND METHODS
5
Patent #:
Issue Dt:
09/01/2009
Application #:
11218347
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD OF SELECTIVELY DEPOSITING MATERIALS ON A SUBSTRATE USING A SUPERCRITICAL FLUID
6
Patent #:
Issue Dt:
11/24/2009
Application #:
11218352
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
MICROFEATURE WORKPIECE SUBSTRATES HAVING THROUGH-SUBSTRATE VIAS, AND ASSOCIATED METHODS OF FORMATION
7
Patent #:
Issue Dt:
11/03/2009
Application #:
11218371
Filing Dt:
09/02/2005
Publication #:
Pub Dt:
03/08/2007
Title:
POWER LOSS RECOVERY IN NON-VOLATILE MEMORY
8
Patent #:
Issue Dt:
08/10/2010
Application #:
11218705
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHODS FOR FORMING THROUGH-WAFER INTERCONNECTS, INTERMEDIATE STRUCTURES SO FORMED, AND DEVICES AND SYSTEMS HAVING AT LEAST ONE SOLDER DAM STRUCTURE
9
Patent #:
Issue Dt:
04/12/2011
Application #:
11218773
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
04/06/2006
Title:
METHOD AND SYSTEM FOR BINDING HALIDE-BASED CONTAMINANTS
10
Patent #:
Issue Dt:
08/21/2007
Application #:
11218848
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
OPERATION OF MULTIPLE SELECT GATE ARCHITECTURE
11
Patent #:
Issue Dt:
09/30/2008
Application #:
11218849
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
HIGH PERFORMANCE MULTI-LEVEL NON-VOLATILE MEMORY DEVICE
12
Patent #:
Issue Dt:
08/25/2009
Application #:
11218851
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
PROGRAM AND READ TRIM SETTING
13
Patent #:
Issue Dt:
08/07/2007
Application #:
11218988
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
OUTPUT DRIVER ROBUST TO DATA DEPENDENT NOISE
14
Patent #:
Issue Dt:
08/19/2008
Application #:
11218990
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
01/12/2006
Title:
VERTICAL TUNNELING TRANSISTOR
15
Patent #:
Issue Dt:
02/19/2008
Application #:
11218992
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
TECHNIQUES FOR GENERATING TEST PATTERNS IN HIGH SPEED MEMORY DEVICES
16
Patent #:
NONE
Issue Dt:
Application #:
11218994
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
Techniques for dynamically selecting an input buffer
17
Patent #:
Issue Dt:
08/21/2007
Application #:
11219020
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
01/12/2006
Title:
FLASH MEMORY
18
Patent #:
Issue Dt:
07/20/2010
Application #:
11219067
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD OF FORMING ISOLATED FEATURES USING PITCH MULTIPLICATION
19
Patent #:
Issue Dt:
01/11/2011
Application #:
11219077
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
TRANSISTOR GATE FORMING METHODS AND TRANSISTOR STRUCTURES
20
Patent #:
Issue Dt:
05/26/2009
Application #:
11219079
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
TRANSISTOR GATE FORMING METHODS AND INTEGRATED CIRCUITS
21
Patent #:
Issue Dt:
11/04/2008
Application #:
11219085
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
DRAM TUNNELING ACCESS TRANSISTOR
22
Patent #:
Issue Dt:
04/14/2009
Application #:
11219132
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHODS FOR FORMING THROUGH-WAFER INTERCONNECTS AND STRUCTURES RESULTING THEREFROM
23
Patent #:
Issue Dt:
09/25/2007
Application #:
11219302
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
04/19/2007
Title:
MEASURE CONTROL DELAY AND METHOD HAVING LATCHING CIRCUIT INTEGRAL WITH DELAY CIRCUIT
24
Patent #:
Issue Dt:
07/07/2009
Application #:
11219303
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
SILICIDED RECESSED SILICON
25
Patent #:
Issue Dt:
08/26/2008
Application #:
11219304
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
PERIPHERAL GATE STACKS AND RECESSED ARRAY GATES
26
Patent #:
Issue Dt:
08/17/2010
Application #:
11219346
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
PITCH MULTIPLICATION SPACERS AND METHODS OF FORMING THE SAME
27
Patent #:
Issue Dt:
03/30/2010
Application #:
11219349
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD OF MANUFACTURING A MEMORY DEVICE
28
Patent #:
Issue Dt:
04/21/2009
Application #:
11219535
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/15/2007
Title:
NON-VOLATILE MEMORY WITH ERROR DETECTION
29
Patent #:
Issue Dt:
12/25/2007
Application #:
11219540
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
01/12/2006
Title:
METHOD AND SYSTEM FOR MONITORING PLASMA USING OPTICAL EMISSION SPECTROMETRY
30
Patent #:
Issue Dt:
07/01/2008
Application #:
11219604
Filing Dt:
09/01/2005
Publication #:
Pub Dt:
03/01/2007
Title:
PROTECTIVE COATING FOR PLANARIZATION
31
Patent #:
Issue Dt:
06/26/2007
Application #:
11220202
Filing Dt:
09/06/2005
Publication #:
Pub Dt:
01/19/2006
Title:
LOW VOLTAGE COMPARATOR
32
Patent #:
Issue Dt:
11/21/2006
Application #:
11220231
Filing Dt:
09/06/2005
Publication #:
Pub Dt:
03/02/2006
Title:
ZERO-ENABLED FUSE-SET
33
Patent #:
Issue Dt:
06/05/2007
Application #:
11220670
Filing Dt:
09/08/2005
Publication #:
Pub Dt:
01/12/2006
Title:
PHOTODIODE WITH ULTRA-SHALLOW JUNCTION FOR HIGH QUANTUM EFFICIENCY CMOS IMAGE SENSOR AND METHOD OF FORMATION
34
Patent #:
Issue Dt:
10/02/2007
Application #:
11221521
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/12/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
35
Patent #:
Issue Dt:
05/05/2009
Application #:
11221539
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/05/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
36
Patent #:
Issue Dt:
03/20/2007
Application #:
11222365
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/05/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
37
Patent #:
Issue Dt:
12/04/2007
Application #:
11222462
Filing Dt:
09/07/2005
Publication #:
Pub Dt:
01/12/2006
Title:
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
38
Patent #:
Issue Dt:
06/30/2009
Application #:
11223045
Filing Dt:
09/12/2005
Publication #:
Pub Dt:
03/01/2007
Title:
METHOD AND APPARATUS PROVIDING PIXEL ARRAY HAVING AUTOMATIC LIGHT CONTROL PIXELS AND IMAGE CAPTURE PIXELS
39
Patent #:
Issue Dt:
03/06/2007
Application #:
11225450
Filing Dt:
09/13/2005
Publication #:
Pub Dt:
01/12/2006
Title:
METHOD AND STRUCTURE FOR REDUCING RESISTANCE OF A SEMICONDUCTOR DEVICE FEATURE
40
Patent #:
Issue Dt:
04/07/2009
Application #:
11226978
Filing Dt:
09/15/2005
Publication #:
Pub Dt:
01/12/2006
Title:
SEMICONDUCTOR DEVICE
41
Patent #:
Issue Dt:
05/15/2007
Application #:
11230773
Filing Dt:
09/20/2005
Publication #:
Pub Dt:
01/19/2006
Title:
SMALL GRAIN SIZE, CONFORMAL ALUMINUM INTERCONNECTS AND METHOD FOR THEIR FORMATION
42
Patent #:
Issue Dt:
01/29/2008
Application #:
11232202
Filing Dt:
09/21/2005
Publication #:
Pub Dt:
02/02/2006
Title:
APPARATUS AND METHOD FOR PRINTING MICRO METAL STRUCTURES
43
Patent #:
Issue Dt:
01/27/2009
Application #:
11233464
Filing Dt:
09/22/2005
Publication #:
Pub Dt:
03/23/2006
Title:
MEMORY DEVICE WITH UNIPOLAR AND BIPOLAR SELECTORS
44
Patent #:
Issue Dt:
08/28/2007
Application #:
11233569
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
01/26/2006
Title:
REDUCTION OF FIELD EDGE THINNING IN PERIPHERAL DEVICES
45
Patent #:
Issue Dt:
01/26/2010
Application #:
11233714
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
01/26/2006
Title:
ANIMATION PACKAGER FOR AN ON-LINE BOOK
46
Patent #:
Issue Dt:
04/29/2008
Application #:
11233967
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
02/02/2006
Title:
METHODS OF FORMING METAL OXIDE AND SEMIMETAL OXIDE
47
Patent #:
Issue Dt:
04/15/2008
Application #:
11234000
Filing Dt:
09/23/2005
Publication #:
Pub Dt:
01/26/2006
Title:
DEVICE HAVING CONTACT PAD WITH A CONDUCTIVE LAYER AND A CONDUCTIVE PASSIVATION LAYER
48
Patent #:
Issue Dt:
06/26/2007
Application #:
11236115
Filing Dt:
09/26/2005
Publication #:
Pub Dt:
02/02/2006
Title:
SEMICONDUCTOR PROCESSING METHODS OF FORMING INTEGRATED CIRCUITRY AND SEMICONDUCTOR PROCESSING METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY
49
Patent #:
Issue Dt:
01/02/2007
Application #:
11237396
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
03/02/2006
Title:
SEMICONDUCTOR CONSTRUCTIONS
50
Patent #:
Issue Dt:
07/10/2007
Application #:
11238137
Filing Dt:
09/28/2005
Publication #:
Pub Dt:
04/13/2006
Title:
READING CIRCUIT AND METHOD FOR A NONVOLATILE MEMORY DEVICE
51
Patent #:
Issue Dt:
09/16/2008
Application #:
11240004
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
04/05/2007
Title:
METHOD AND APPARATUS FOR OPTIMIZING FLASH DEVICE ERASE DISTRIBUTION
52
Patent #:
Issue Dt:
02/10/2009
Application #:
11240099
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SYSTEM AND METHOD FOR PROCESSOR WITH PREDICTIVE MEMORY RETRIEVAL ASSIST
53
Patent #:
Issue Dt:
07/22/2008
Application #:
11241486
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
02/09/2006
Title:
ATOMIC LAYER DEPOSITION METHODS
54
Patent #:
Issue Dt:
08/12/2008
Application #:
11241488
Filing Dt:
09/29/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SEMICONDUCTOR SUBSTRATE
55
Patent #:
Issue Dt:
04/01/2008
Application #:
11241517
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
01/26/2006
Title:
METHODS OF FORMING A TRANSISTOR WITH AN INTEGRATED METAL SILICIDE GATE ELECTRODE
56
Patent #:
Issue Dt:
01/29/2008
Application #:
11241729
Filing Dt:
09/30/2005
Publication #:
Pub Dt:
08/03/2006
Title:
MEMORY DEVICE AND METHOD FOR OPERATING THE SAME WITH HIGH REJECTION OF THE NOISE ON THE HIGH-VOLTAGE SUPPLY LINE
57
Patent #:
Issue Dt:
01/20/2009
Application #:
11242224
Filing Dt:
10/03/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE WITH CIRCUIT SIDE POLYMER LAYER
58
Patent #:
Issue Dt:
09/11/2007
Application #:
11242557
Filing Dt:
10/03/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHODS FOR SECURING COMPONENTS OF SEMICONDUCTOR DEVICE ASSEMBLIES TO EACH OTHER WITH ADHESIVE MATERIALS THAT INCLUDE PRESSURE-SENSITIVE AND CURABLE COMPONENTS
59
Patent #:
Issue Dt:
01/20/2009
Application #:
11242905
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
04/13/2006
Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS
60
Patent #:
Issue Dt:
01/08/2008
Application #:
11243702
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
02/09/2006
Title:
INTERCONNECT FOR BUMPED SEMICONDUCTOR COMPONENTS
61
Patent #:
Issue Dt:
03/13/2007
Application #:
11243825
Filing Dt:
10/05/2005
Publication #:
Pub Dt:
02/09/2006
Title:
TECHNIQUE TO SIMULTANEOUSLY DISTRIBUTE CLOCK SIGNALS AND DATA ON INTEGRATED CIRCUITS, INTERPOSERS, AND CIRCUIT BOARDS
62
Patent #:
Issue Dt:
06/11/2013
Application #:
11243925
Filing Dt:
10/04/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SUBSTRATE COMPRISING A PLURALITY OF INTEGRATED CIRCUITRY DIE, AND A SUBSTRATE
63
Patent #:
Issue Dt:
09/01/2009
Application #:
11244859
Filing Dt:
10/06/2005
Publication #:
Pub Dt:
04/12/2007
Title:
ATOMIC LAYER DEPOSITION METHODS
64
Patent #:
Issue Dt:
07/31/2007
Application #:
11245725
Filing Dt:
10/06/2005
Publication #:
Pub Dt:
02/23/2006
Title:
DEVICE AND METOD HAVING A MEMORY ARRAY STORING EACH BIT IN MULTIPLE MEMORY CELLS
65
Patent #:
Issue Dt:
12/19/2006
Application #:
11245765
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
6F2 3-TRANSISTOR DRAM GAIN CELL
66
Patent #:
Issue Dt:
02/20/2007
Application #:
11246469
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
VARIABLE RESISTANCE CIRCUIT
67
Patent #:
Issue Dt:
01/02/2007
Application #:
11246515
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHOD AND APPARATUS FOR FORMING METAL CONTACTS ON A SUBSTRATE
68
Patent #:
Issue Dt:
07/18/2006
Application #:
11246755
Filing Dt:
10/07/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHODS OF FABRICATING INTEGRATED CIRCUITRY
69
Patent #:
Issue Dt:
04/10/2007
Application #:
11247043
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
02/09/2006
Title:
SOURCE LINES FOR NAND MEMORY DEVICES
70
Patent #:
Issue Dt:
09/12/2006
Application #:
11247495
Filing Dt:
10/10/2005
Publication #:
Pub Dt:
02/09/2006
Title:
Semiconductor assemblies having electrophoretically insulated vias
71
Patent #:
Issue Dt:
01/13/2009
Application #:
11247727
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
05/04/2006
Title:
MEMORY CELL HAVING AN ELECTRICALLY FLOATING BODY TRANSISTOR AND PROGRAMMING TECHNIQUE THEREFOR
72
Patent #:
Issue Dt:
07/31/2007
Application #:
11247774
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
05/11/2006
Title:
CIRCUITRY FOR AND METHOD OF IMPROVING STATISTICAL DISTRIBUTION OF INTEGRATED CIRCUITS
73
Patent #:
Issue Dt:
10/17/2006
Application #:
11248106
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
02/09/2006
Title:
METHODS FOR PLANARIZING MICROELECTRONIC WORKPIECES
74
Patent #:
Issue Dt:
11/13/2007
Application #:
11248144
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
02/23/2006
Title:
SYSTEM-ON-A-CHIP WITH MULTI-LAYERED METALLIZED THROUGH-HOLE INTERCONNECTION
75
Patent #:
Issue Dt:
02/12/2008
Application #:
11248384
Filing Dt:
10/11/2005
Publication #:
Pub Dt:
02/09/2006
Title:
PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR PACKAGING MICROELECTRONIC DEVICES
76
Patent #:
Issue Dt:
05/06/2008
Application #:
11249540
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
03/02/2006
Title:
INTERPOSERS FOR CHIP-SCALE PACKAGES AND INTERMEDIATES THEREOF
77
Patent #:
Issue Dt:
03/27/2007
Application #:
11249763
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
04/20/2006
Title:
MEMORY DEVICE
78
Patent #:
Issue Dt:
04/01/2008
Application #:
11250176
Filing Dt:
10/13/2005
Publication #:
Pub Dt:
04/20/2006
Title:
MEMORY DEVICE
79
Patent #:
Issue Dt:
06/05/2007
Application #:
11250600
Filing Dt:
10/14/2005
Publication #:
Pub Dt:
04/19/2007
Title:
CLOCK GENERATOR HAVING A DELAY LOCKED LOOP AND DUTY CYCLE CORRECTION CIRCUIT IN A PARALLEL CONFIGURATION
80
Patent #:
Issue Dt:
06/19/2007
Application #:
11251985
Filing Dt:
10/17/2005
Publication #:
Pub Dt:
02/16/2006
Title:
TRANSISTOR WITH NITROGEN-HARDENED GATE OXIDE
81
Patent #:
Issue Dt:
10/06/2009
Application #:
11252465
Filing Dt:
10/17/2005
Publication #:
Pub Dt:
04/19/2007
Title:
HIGH RESOLUTION PRINTING TECHNIQUE
82
Patent #:
Issue Dt:
04/10/2007
Application #:
11253390
Filing Dt:
10/19/2005
Publication #:
Pub Dt:
02/16/2006
Title:
METHOD AND APPARATUS FOR READING NAND FLASH MEMORY ARRAY
83
Patent #:
Issue Dt:
10/02/2007
Application #:
11255613
Filing Dt:
10/21/2005
Publication #:
Pub Dt:
02/23/2006
Title:
METHODS OF FORMING INTEGRATED CIRCUITS, AND DRAM CIRCUITRY MEMORY CELLS
84
Patent #:
Issue Dt:
12/05/2006
Application #:
11255646
Filing Dt:
10/21/2005
Publication #:
Pub Dt:
02/16/2006
Title:
PRECONDITIONING OF DEFECTIVE AND REDUNDANT COLUMNS IN A MEMORY DEVICE
85
Patent #:
Issue Dt:
02/19/2008
Application #:
11255972
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
05/11/2006
Title:
METHOD OF MANUFACTURING A CAPACITOR
86
Patent #:
Issue Dt:
10/02/2007
Application #:
11256424
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF FORMING A VERTICAL TRANSISTOR
87
Patent #:
Issue Dt:
04/14/2009
Application #:
11256430
Filing Dt:
10/20/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF FORMING A VERTICAL TRANSISTOR
88
Patent #:
Issue Dt:
06/15/2010
Application #:
11257157
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
02/23/2006
Title:
DRAM LAYOUT WITH VERTICAL FETS AND METHOD OF FORMATION
89
Patent #:
Issue Dt:
12/11/2007
Application #:
11257636
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
03/02/2006
Title:
STEPPED GATE CONFIGURATION FOR NON-VOLATILE MEMORY
90
Patent #:
Issue Dt:
09/04/2007
Application #:
11257637
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
03/02/2006
Title:
STEPPED GATE CONFIGURATION FOR NON-VOLATILE MEMORY
91
Patent #:
Issue Dt:
10/16/2007
Application #:
11257785
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
04/27/2006
Title:
CATADIOPTRIC PROJECTION OPTICAL SYSTEM, EXPOSURE APPARATUS HAVING THE SAME, DEVICE FABRICATION METHOD
92
Patent #:
Issue Dt:
10/04/2011
Application #:
11257946
Filing Dt:
10/24/2005
Publication #:
Pub Dt:
02/23/2006
Title:
METHODS OF FORMING MATERIAL ON A SUBSTRATE, AND A METHOD OF FORMING A FIELD EFFECT TRANSISTOR GATE OXIDE ON A SUBSTRATE
93
Patent #:
Issue Dt:
11/25/2008
Application #:
11258675
Filing Dt:
10/25/2005
Publication #:
Pub Dt:
03/02/2006
Title:
PROCESS FOR MANUFACTURING A BYTE SELECTION TRANSISTOR FOR A MATRIX OF NON VOLATILE MEMORY CELLS AND CORRESPONDING STRUCTURE
94
Patent #:
Issue Dt:
11/13/2007
Application #:
11258921
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
03/02/2006
Title:
METHOD OF FORMING A MEMORY CELL
95
Patent #:
Issue Dt:
10/03/2006
Application #:
11259841
Filing Dt:
10/26/2005
Publication #:
Pub Dt:
03/09/2006
Title:
ACCESS CIRCUIT AND METHOD FOR ALLOWING EXTERNAL TEST VOLTAGE TO BE APPLIED TO ISOLATED WELLS
96
Patent #:
Issue Dt:
08/10/2010
Application #:
11260339
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
05/03/2007
Title:
NON-VOLATILE MEMORY DEVICE WITH TENSILE STRAINED SILICON LAYER
97
Patent #:
Issue Dt:
06/24/2008
Application #:
11260597
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
04/13/2006
Title:
LOW VOLTAGE SENSE AMPLIFIER FOR OPERATION UNDER A REDUCED BIT LINE BIAS VOLTAGE
98
Patent #:
Issue Dt:
04/16/2013
Application #:
11261131
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
05/04/2006
Title:
Flash memory device with a low pin count (LPC) communication interface
99
Patent #:
Issue Dt:
09/12/2006
Application #:
11261530
Filing Dt:
10/28/2005
Publication #:
Pub Dt:
03/09/2006
Title:
COMPOSITE DIELECTRIC FORMING METHODS AND COMPOSITE DIELECTRICS
100
Patent #:
Issue Dt:
01/08/2008
Application #:
11261903
Filing Dt:
10/27/2005
Publication #:
Pub Dt:
06/08/2006
Title:
PROGRAMMING METHOD OF MULTILEVEL MEMORIES AND CORRESPONDING CIRCUIT
Assignor
1
Exec Dt:
04/26/2016
Assignee
1
633 WEST FIFTH STREET, 24TH FLOOR
LOS ANGELES, CALIFORNIA 90071
Correspondence name and address
WSGR, C/O QUI LU, SENIOR PARALEGAL
650 PAGE MILL ROAD
FH 2-1 P12
PALO ALTO, CA 94304

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