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Reel/Frame:	038669/0001			Pages:	961
		Recorded:	05/12/2016
Attorney Dkt #:	4816.228
Conveyance:	SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).

Total properties: 18018
Page 98 of 181
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Patent #:	7432197	Issue Dt:	10/07/2008	Application #:	11341201	Filing Dt:	01/27/2006
Publication #:	US20070178711	Pub Dt:	08/02/2007
Title:	METHODS OF PATTERNING PHOTORESIST, AND METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	7671647	Issue Dt:	03/02/2010	Application #:	11341774	Filing Dt:	01/26/2006
Publication #:	US20070171760	Pub Dt:	07/26/2007
Title:	APPARATUS AND METHOD FOR TRIMMING STATIC DELAY OF A SYNCHRONIZING CIRCUIT

Patent #:	7383147	Issue Dt:	06/03/2008	Application #:	11342425	Filing Dt:	01/30/2006
Publication #:	US20060125509	Pub Dt:	06/15/2006
Title:	DYNAMICALLY ADAPTABLE SEMICONDUCTOR PARAMETRIC TESTING

Patent #:	7211997	Issue Dt:	05/01/2007	Application #:	11343502	Filing Dt:	01/30/2006
Publication #:	US20060125471	Pub Dt:	06/15/2006
Title:	PLANARITY DIAGNOSTIC SYSTEM, E.G., FOR MICROELECTRONIC COMPONENT TEST SYSTEMS

Patent #:	7388801	Issue Dt:	06/17/2008	Application #:	11343517	Filing Dt:	01/30/2006
Publication #:	US20060140016	Pub Dt:	06/29/2006
Title:	REDUCTION OF FUSIBLE LINKS AND ASSOCIATED CIRCUITRY ON MEMORY DIES

Patent #:	7102955	Issue Dt:	09/05/2006	Application #:	11343525	Filing Dt:	01/30/2006
Publication #:	US20060164892	Pub Dt:	07/27/2006
Title:	REDUCTION OF FUSIBLE LINKS AND ASSOCIATED CIRCUITRY ON MEMORY DIES

Patent #:	7102956	Issue Dt:	09/05/2006	Application #:	11343526	Filing Dt:	01/30/2006
Publication #:	US20060126409	Pub Dt:	06/15/2006
Title:	REDUCTION OF FUSIBLE LINKS AND ASSOCIATED CIRCUITRY ON MEMORY DIES

Patent #:	7102957	Issue Dt:	09/05/2006	Application #:	11343527	Filing Dt:	01/30/2006
Publication #:	US20060126410	Pub Dt:	06/15/2006
Title:	REDUCTION OF FUSIBLE LINKS AND ASSOCIATED CIRCUITRY ON MEMORY DIES

Patent #:	7566610	Issue Dt:	07/28/2009	Application #:	11343593	Filing Dt:	01/30/2006
Publication #:	US20060141730	Pub Dt:	06/29/2006
Title:	PROCESS FOR MANUFACTURING INTEGRATED RESISTIVE ELEMENTS WITH SILICIDATION PROTECTION

Patent #:	7363452	Issue Dt:	04/22/2008	Application #:	11343818	Filing Dt:	01/31/2006
Publication #:	US20060126411	Pub Dt:	06/15/2006
Title:	PIPELINED BURST MEMORY ACCESS

Patent #:	7656676	Issue Dt:	02/02/2010	Application #:	11344519	Filing Dt:	01/31/2006
Publication #:	US20060176673	Pub Dt:	08/10/2006
Title:	REMOVABLE DATA STORAGE DEVICE AND RELATED ASSEMBLING METHOD

Patent #:	7327173	Issue Dt:	02/05/2008	Application #:	11344988	Filing Dt:	01/31/2006
Publication #:	US20060120208	Pub Dt:	06/08/2006
Title:	DELAY-LOCKED LOOP HAVING A PRE-SHIFT PHASE DETECTOR

Patent #:	7196936	Issue Dt:	03/27/2007	Application #:	11345080	Filing Dt:	02/01/2006
Publication #:	US20060124989	Pub Dt:	06/15/2006
Title:	BALLISTIC INJECTION NROM FLASH MEMORY

Patent #:	7239575	Issue Dt:	07/03/2007	Application #:	11345552	Filing Dt:	01/31/2006
Publication #:	US20060126425	Pub Dt:	06/15/2006
Title:	DELAY-LOCKED LOOP HAVING A PRE-SHIFT PHASE DETECTOR

Patent #:	7269071	Issue Dt:	09/11/2007	Application #:	11345982	Filing Dt:	02/02/2006
Publication #:	US20060128103	Pub Dt:	06/15/2006
Title:	NROM MEMORY CELL, MEMORY ARRAY, RELATED DEVICES AND METHODS

Patent #:	7535048	Issue Dt:	05/19/2009	Application #:	11346049	Filing Dt:	02/02/2006
Publication #:	US20090072303	Pub Dt:	03/19/2009
Title:	NROM MEMORY CELL, MEMORY ARRAY, RELATED DEVICES AND METHODS

Patent #:	7269072	Issue Dt:	09/11/2007	Application #:	11346063	Filing Dt:	02/02/2006
Publication #:	US20060124992	Pub Dt:	06/15/2006
Title:	NROM MEMORY CELL, MEMORY ARRAY, RELATED DEVICES AND METHODS

Patent #:	7301804	Issue Dt:	11/27/2007	Application #:	11346131	Filing Dt:	02/02/2006
Publication #:	US20060128104	Pub Dt:	06/15/2006
Title:	NROM MEMORY CELL, MEMORY ARRAY, RELATED DEVICES AND METHODS

Patent #:	7139188	Issue Dt:	11/21/2006	Application #:	11346386	Filing Dt:	02/03/2006
Publication #:	US20060126370	Pub Dt:	06/15/2006
Title:	MEMORY ARCHITECTURE AND METHOD OF MANUFACTURE AND OPERATION THEREOF

Patent #:	7541242	Issue Dt:	06/02/2009	Application #:	11346413	Filing Dt:	02/02/2006
Publication #:	US20090010075	Pub Dt:	01/08/2009
Title:	NROM MEMORY CELL, MEMORY ARRAY, RELATED DEVICES AND METHODS

Patent #:	7750389	Issue Dt:	07/06/2010	Application #:	11346421	Filing Dt:	02/02/2006
Publication #:	US20060124967	Pub Dt:	06/15/2006
Title:	NROM MEMORY CELL, MEMORY ARRAY, RELATED DEVICES AND METHODS

Patent #:	7361559	Issue Dt:	04/22/2008	Application #:	11346870	Filing Dt:	02/02/2006
Publication #:	US20060128096	Pub Dt:	06/15/2006
Title:	MANUFACTURING METHOD FOR A MOS TRANSISTOR COMPRISING LAYERED RELAXED AND STRAINED SIGE LAYERS AS A CHANNEL REGION

Patent #:	7700441	Issue Dt:	04/20/2010	Application #:	11346914	Filing Dt:	02/02/2006
Publication #:	US20070178641	Pub Dt:	08/02/2007
Title:	METHODS OF FORMING FIELD EFFECT TRANSISTORS, METHODS OF FORMING FIELD EFFECT TRANSISTOR GATES, METHODS OF FORMING INTEGRATED CIRCUITRY COMPRISING A TRANSISTOR GATE ARRAY AND CIRCUITRY PERIPHERAL TO THE GATE ARRAY, AND METHODS OF FORMING INTEGRATED CIRCUITRY COMPRIS

Patent #:	7268030	Issue Dt:	09/11/2007	Application #:	11346963	Filing Dt:	02/03/2006
Publication #:	US20060138425	Pub Dt:	06/29/2006
Title:	METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	7250680	Issue Dt:	07/31/2007	Application #:	11346985	Filing Dt:	02/02/2006
Publication #:	US20060125058	Pub Dt:	06/15/2006
Title:	SEMICONDUCTOR CIRCUITRY CONSTRUCTIONS

Patent #:	7411300	Issue Dt:	08/12/2008	Application #:	11347051	Filing Dt:	02/03/2006
Publication #:	US20060138661	Pub Dt:	06/29/2006
Title:	AGGLOMERATION CONTROL USING EARLY TRANSITION METAL ALLOYS

Patent #:	7892972	Issue Dt:	02/22/2011	Application #:	11347153	Filing Dt:	02/03/2006
Publication #:	US20070184654	Pub Dt:	08/09/2007
Title:	METHODS FOR FABRICATING AND FILLING CONDUCTIVE VIAS AND CONDUCTIVE VIAS SO FORMED

Patent #:	7425847	Issue Dt:	09/16/2008	Application #:	11347477	Filing Dt:	02/03/2006
Publication #:	US20070182454	Pub Dt:	08/09/2007
Title:	INPUT BUFFER WITH OPTIMAL BIASING AND METHOD THEREOF

Patent #:	7601283	Issue Dt:	10/13/2009	Application #:	11347858	Filing Dt:	02/06/2006
Publication #:	US20060125138	Pub Dt:	06/15/2006
Title:	METHODS AND APPARATUSES FOR SHAPING A PRINTED CIRCUIT BOARD

Patent #:	7863727	Issue Dt:	01/04/2011	Application #:	11347863	Filing Dt:	02/06/2006
Publication #:	US20070181992	Pub Dt:	08/09/2007
Title:	MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING MICROELECTRONIC DEVICES

Patent #:	7391117	Issue Dt:	06/24/2008	Application #:	11347930	Filing Dt:	02/06/2006
Publication #:	US20060125106	Pub Dt:	06/15/2006
Title:	METHOD FOR FABRICATING SEMICONDUCTOR COMPONENTS WITH CONDUCTIVE SPRING CONTACTS

Patent #:	7433249	Issue Dt:	10/07/2008	Application #:	11347961	Filing Dt:	02/06/2006
Publication #:	US20060126405	Pub Dt:	06/15/2006
Title:	APPARATUS WITH EQUALIZING VOLTAGE GENERATION CIRCUIT AND METHODS OF USE

Patent #:	7471571	Issue Dt:	12/30/2008	Application #:	11348513	Filing Dt:	02/06/2006
Publication #:	US20060203544	Pub Dt:	09/14/2006
Title:	METHOD FOR PROGRAMMING A MEMORY DEVICE SUITABLE TO MINIMIZE THE LATERAL COUPLING EFFECTS BETWEEN MEMORY CELLS

Patent #:	7625803	Issue Dt:	12/01/2009	Application #:	11348571	Filing Dt:	02/06/2006
Publication #:	US20060128107	Pub Dt:	06/15/2006
Title:	MEMORY DEVICES, ELECTRONIC SYSTEMS, AND METHODS OF FORMING MEMORY DEVICES

Patent #:	7483311	Issue Dt:	01/27/2009	Application #:	11348678	Filing Dt:	02/07/2006
Publication #:	US20070183220	Pub Dt:	08/09/2007
Title:	ERASE OPERATION IN A FLASH MEMORY DEVICE

Patent #:	7263591	Issue Dt:	08/28/2007	Application #:	11348724	Filing Dt:	02/06/2006
Publication #:	US20060155923	Pub Dt:	07/13/2006
Title:	INCREASING THE MEMORY PERFORMANCE OF FLASH MEMORY DEVICES BY WRITING SECTORS SIMULTANEOUSLY TO MULTIPLE FLASH MEMORY DEVICES

Patent #:	7417478	Issue Dt:	08/26/2008	Application #:	11349397	Filing Dt:	02/06/2006
Publication #:	US20070183227	Pub Dt:	08/09/2007
Title:	DELAY LINE CIRCUIT

Patent #:	7276949	Issue Dt:	10/02/2007	Application #:	11349801	Filing Dt:	02/08/2006
Publication #:	US20060156084	Pub Dt:	07/13/2006
Title:	MULTIPHASE CLOCK GENERATION

Patent #:	7616489	Issue Dt:	11/10/2009	Application #:	11349854	Filing Dt:	02/08/2006
Publication #:	US20070183202	Pub Dt:	08/09/2007
Title:	MEMORY ARRAY SEGMENTATION AND METHODS

Patent #:	7675770	Issue Dt:	03/09/2010	Application #:	11349959	Filing Dt:	02/09/2006
Publication #:	US20060176724	Pub Dt:	08/10/2006
Title:	PHASE CHANGE MEMORY DEVICE

Patent #:	7291519	Issue Dt:	11/06/2007	Application #:	11350061	Filing Dt:	02/08/2006
Publication #:	US20060125010	Pub Dt:	06/15/2006
Title:	METHODS OF FORMING TRANSISTOR CONSTRUCTIONS

Patent #:	7529951	Issue Dt:	05/05/2009	Application #:	11350961	Filing Dt:	02/08/2006
Publication #:	US20060129853	Pub Dt:	06/15/2006
Title:	MEMORY SUBSYSTEM VOLTAGE CONTROL AND METHOD THAT REPROGRAMS A PREFERRED OPERATING VOLTAGE

Patent #:	7282784	Issue Dt:	10/16/2007	Application #:	11351006	Filing Dt:	02/08/2006
Publication #:	US20060125109	Pub Dt:	06/15/2006
Title:	METHODS OF MANUFACTURE OF A VIA STRUCTURE COMPRISING A PLURALITY OF CONDUCTIVE ELEMENTS AND METHODS OF FORMING MULTICHIP MODULES INCLUDING SUCH VIA STRUCTURES

Patent #:	7278038	Issue Dt:	10/02/2007	Application #:	11351008	Filing Dt:	02/08/2006
Publication #:	US20060129854	Pub Dt:	06/15/2006
Title:	OPERATIONAL VOLTAGE CONTROL CIRCUIT AND METHOD

Patent #:	7663206	Issue Dt:	02/16/2010	Application #:	11351009	Filing Dt:	02/08/2006
Publication #:	US20060125047	Pub Dt:	06/15/2006
Title:	INTERPOSER INCLUDING AT LEAST ONE PASSIVE ELEMENT AT LEAST PARTIALLY DEFINED BY A RECESS FORMED THEREIN, SYSTEM INCLUDING SAME, AND WAFER-SCALE INTERPOSER

Patent #:	7936203	Issue Dt:	05/03/2011	Application #:	11351037	Filing Dt:	02/08/2006
Publication #:	US20070182469	Pub Dt:	08/09/2007
Title:	TEMPERATURE COMPENSATION VIA POWER SUPPLY MODIFICATION TO PRODUCE A TEMPERATURE-INDEPENDENT DELAY IN AN INTEGRATED CIRCUIT

Patent #:	7206956	Issue Dt:	04/17/2007	Application #:	11351277	Filing Dt:	02/08/2006
Publication #:	US20060195713	Pub Dt:	08/31/2006
Title:	DUTY CYCLE DISTORTION COMPENSATION FOR THE DATA OUTPUT OF A MEMORY DEVICE

Patent #:	8076244	Issue Dt:	12/13/2011	Application #:	11351640	Filing Dt:	02/10/2006
Publication #:	US20070190785	Pub Dt:	08/16/2007
Title:	METHODS FOR CAUSING FLUID TO FLOW THROUGH OR INTO VIA HOLES, VENTS, AND OTHER OPENINGS OR RECESSES THAT COMMUNICATE WITH SURFACES OF SUBSTRATES OF SEMICONDUCTOR DEVICE COMPONENTS

Patent #:	7514743	Issue Dt:	04/07/2009	Application #:	11351644	Filing Dt:	02/09/2006
Publication #:	US20070052060	Pub Dt:	03/08/2007
Title:	DMOS TRANSISTOR WITH FLOATING POLY-FILLED TRENCH FOR IMPROVED PERFORMANCE THROUGH 3-D FIELD SHAPING

Patent #:	7187617	Issue Dt:	03/06/2007	Application #:	11351836	Filing Dt:	02/10/2006
Publication #:	US20060133165	Pub Dt:	06/22/2006
Title:	MEMORY SYSTEM AND METHOD FOR STROBING DATA, COMMAND AND ADDRESS SIGNALS

Patent #:	7349991	Issue Dt:	03/25/2008	Application #:	11351934	Filing Dt:	02/09/2006
Publication #:	US20060168442	Pub Dt:	07/27/2006
Title:	A HOST COMPUTER USING BASIC INPUT AND OUTPUT SYSTEM TO PROCESS CONTROL COMMAND RECEIVED FROM A REMOTE COMPUTER ACCORDING TO TIMER INTERRUPTS

Patent #:	7203767	Issue Dt:	04/10/2007	Application #:	11351991	Filing Dt:	02/09/2006
Publication #:	US20060168311	Pub Dt:	07/27/2006
Title:	A SYSTEM PROCESSING DATA PACKETS RECEIVED FROM REMOTE HOST TO CONTROL SYSTEM OPERATION ACCORDING TO ADJUSTABLE TIMER INTERRUPTS BASED ON DATA FLOW RATE

Patent #:	7251194	Issue Dt:	07/31/2007	Application #:	11352078	Filing Dt:	02/10/2006
Publication #:	US20060140023	Pub Dt:	06/29/2006
Title:	MEMORY SYSTEM AND METHOD FOR STROBING DATA, COMMAND AND ADDRESS SIGNALS

Patent #:	7269094	Issue Dt:	09/11/2007	Application #:	11352131	Filing Dt:	02/10/2006
Publication #:	US20060143491	Pub Dt:	06/29/2006
Title:	MEMORY SYSTEM AND METHOD FOR STROBING DATA, COMMAND AND ADDRESS SIGNALS

Patent #:	7245553	Issue Dt:	07/17/2007	Application #:	11352142	Filing Dt:	02/10/2006
Publication #:	US20060126406	Pub Dt:	06/15/2006
Title:	MEMORY SYSTEM AND METHOD FOR STROBING DATA, COMMAND AND ADDRESS SIGNALS

Patent #:	7964124	Issue Dt:	06/21/2011	Application #:	11353406	Filing Dt:	02/14/2006
Publication #:	US20060138708	Pub Dt:	06/29/2006
Title:	METHOD OF FORMING CELLULAR MATERIAL

Patent #:	7205227	Issue Dt:	04/17/2007	Application #:	11353592	Filing Dt:	02/14/2006
Publication #:	US20060160296	Pub Dt:	07/20/2006
Title:	METHODS OF FORMING CMOS CONSTRUCTIONS

Patent #:	7474846	Issue Dt:	01/06/2009	Application #:	11354126	Filing Dt:	02/15/2006
Publication #:	US20070187572	Pub Dt:	08/16/2007
Title:	METHOD AND APPARATUS OF DETERMINING THE BEST FOCUS POSITION OF A LENS

Patent #:	7506126	Issue Dt:	03/17/2009	Application #:	11354786	Filing Dt:	02/14/2006
Publication #:	US20060136692	Pub Dt:	06/22/2006
Title:	DETECTION CIRCUIT FOR MIXED ASYNCHRONOUS AND SYNCHRONOUS MEMORY OPERATION

Patent #:	7709402	Issue Dt:	05/04/2010	Application #:	11355490	Filing Dt:	02/16/2006
Publication #:	US20070187831	Pub Dt:	08/16/2007
Title:	CONDUCTIVE LAYERS FOR HAFNIUM SILICON OXYNITRIDE FILMS

Patent #:	7355920	Issue Dt:	04/08/2008	Application #:	11355802	Filing Dt:	02/16/2006
Publication #:	US20070189103	Pub Dt:	08/16/2007
Title:	WRITE LATENCY TRACKING USING A DELAY LOCK LOOP IN A SYNCHRONOUS DRAM

Patent #:	7400532	Issue Dt:	07/15/2008	Application #:	11355830	Filing Dt:	02/16/2006
Publication #:	US20070189073	Pub Dt:	08/16/2007
Title:	PROGRAMMING METHOD TO REDUCE GATE COUPLING INTERFERENCE FOR NON-VOLATILE MEMORY

Patent #:	7544584	Issue Dt:	06/09/2009	Application #:	11356335	Filing Dt:	02/16/2006
Publication #:	US20070187683	Pub Dt:	08/16/2007
Title:	LOCALIZED COMPRESSIVE STRAINED SEMICONDUCTOR

Patent #:	7728574	Issue Dt:	06/01/2010	Application #:	11356910	Filing Dt:	02/17/2006
Publication #:	US20070194770	Pub Dt:	08/23/2007
Title:	REFERENCE CIRCUIT WITH START-UP CONTROL,GENERATOR,DEVICE,SYSTEM AND METHOD INCLUDIND SAME

Patent #:	7466615	Issue Dt:	12/16/2008	Application #:	11358089	Filing Dt:	02/21/2006
Publication #:	US20070177442	Pub Dt:	08/02/2007
Title:	LOW VOLTAGE DATA PATH AND CURRENT SENSE AMPLIFIER

Patent #:	7257043	Issue Dt:	08/14/2007	Application #:	11358234	Filing Dt:	02/21/2006
Publication #:	US20060139988	Pub Dt:	06/29/2006
Title:	ISOLATION DEVICE OVER FIELD IN A MEMORY DEVICE

Patent #:	7161376	Issue Dt:	01/09/2007	Application #:	11358235	Filing Dt:	02/21/2006
Publication #:	US20060139051	Pub Dt:	06/29/2006
Title:	VARIABLE IMPEDENCE OUTPUT BUFFER

Patent #:	7836363	Issue Dt:	11/16/2010	Application #:	11358265	Filing Dt:	02/21/2006
Publication #:	US20070208978	Pub Dt:	09/06/2007
Title:	DVI LINK WITH CIRCUIT AND METHOD FOR TEST

Patent #:	7443761	Issue Dt:	10/28/2008	Application #:	11358266	Filing Dt:	02/21/2006
Publication #:	US20070195637	Pub Dt:	08/23/2007
Title:	LOOP FILTERING FOR FAST PLL LOCKING

Patent #:	7344921	Issue Dt:	03/18/2008	Application #:	11358268	Filing Dt:	02/21/2006
Publication #:	US20060141673	Pub Dt:	06/29/2006
Title:	INTEGRATED CIRCUIT DEVICE HAVING REDUCED BOW AND METHOD FOR MAKING SAME

Patent #:	7282400	Issue Dt:	10/16/2007	Application #:	11358583	Filing Dt:	02/21/2006
Publication #:	US20060141697	Pub Dt:	06/29/2006
Title:	METHOD AND APPARATUS ON (110) SURFACES OF SILICON STRUCTURES WITH CONDUCTION IN THE <110> DIRECTION

Patent #:	7489000	Issue Dt:	02/10/2009	Application #:	11358647	Filing Dt:	02/21/2006
Publication #:	US20060138594	Pub Dt:	06/29/2006
Title:	CAPACITOR STRUCTURES WITH OXYNITRIDE LAYER BETWEEN CAPACITOR PLATE AND CAPACITOR DIELECTRIC LAYER

Patent #:	7608195	Issue Dt:	10/27/2009	Application #:	11358659	Filing Dt:	02/21/2006
Publication #:	US20070197033	Pub Dt:	08/23/2007
Title:	HIGH ASPECT RATIO CONTACTS

Patent #:	7351620	Issue Dt:	04/01/2008	Application #:	11359001	Filing Dt:	02/21/2006
Publication #:	US20060141687	Pub Dt:	06/29/2006
Title:	METHODS OF FORMING SEMICONDUCTOR CONSTRUCTIONS

Patent #:	7576012	Issue Dt:	08/18/2009	Application #:	11359098	Filing Dt:	02/21/2006
Publication #:	US20060172534	Pub Dt:	08/03/2006
Title:	ATOMIC LAYER DEPOSITION METHODS

Patent #:	7408810	Issue Dt:	08/05/2008	Application #:	11359104	Filing Dt:	02/22/2006
Publication #:	US20070195603	Pub Dt:	08/23/2007
Title:	MINIMIZING EFFECTS OF PROGRAM DISTURB IN A MEMORY DEVICE

Patent #:	7245785	Issue Dt:	07/17/2007	Application #:	11359275	Filing Dt:	02/21/2006
Publication #:	US20060140505	Pub Dt:	06/29/2006
Title:	SUPPRESSION OF RINGING ARTIFACTS DURING IMAGE RESIZING

Patent #:	7333674	Issue Dt:	02/19/2008	Application #:	11359311	Filing Dt:	02/21/2006
Publication #:	US20060140506	Pub Dt:	06/29/2006
Title:	SUPPRESSION OF RINGING ARTIFACTS DURING IMAGE RESIZING

Patent #:	7767913	Issue Dt:	08/03/2010	Application #:	11359863	Filing Dt:	02/22/2006
Publication #:	US20070194431	Pub Dt:	08/23/2007
Title:	ELECTRONIC DEVICES INCLUDING CONDUCTIVE VIAS HAVING TWO OR MORE CONDUCTIVE ELEMENTS FOR PROVIDING ELECTRICAL COMMUNICATION BETWEEN TRACES IN DIFFERENT PLANES IN A SUBSTRATE, AND ACCOMPANYING METHODS

Patent #:	8384200	Issue Dt:	02/26/2013	Application #:	11359985	Filing Dt:	02/22/2006
Publication #:	US20070194415	Pub Dt:	08/23/2007
Title:	SEMICONDUCTOR DEVICE ASSEMBLIES INCLUDING FACE-TO-FACE SEMICONDUCTOR DICE AND SYSTEMS INCLUDING SUCH ASSEMBLIES

Patent #:	8073890	Issue Dt:	12/06/2011	Application #:	11360093	Filing Dt:	02/22/2006
Publication #:	US20070194821	Pub Dt:	08/23/2007
Title:	CONTINUOUS HIGH-FREQUENCY EVENT FILTER

Patent #:	NONE	Issue Dt:		Application #:	11360868	Filing Dt:	02/23/2006
Publication #:	US20070193637	Pub Dt:	08/23/2007
Title:	Systems and methods for controlling fluid flow

Patent #:	7551466	Issue Dt:	06/23/2009	Application #:	11360873	Filing Dt:	02/23/2006
Publication #:	US20070195571	Pub Dt:	08/23/2007
Title:	BIT LINE COUPLING

Patent #:	8533395	Issue Dt:	09/10/2013	Application #:	11361228	Filing Dt:	02/24/2006
Publication #:	US20070204121	Pub Dt:	08/30/2007
Title:	MOVEABLE LOCKED LINES IN A MULTI-LEVEL CACHE

Patent #:	7358188	Issue Dt:	04/15/2008	Application #:	11362119	Filing Dt:	02/23/2006
Publication #:	US20070059930	Pub Dt:	03/15/2007
Title:	METHOD OF FORMING CONDUCTIVE METAL SILICIDES BY REACTION OF METAL WITH SILICON

Patent #:	7713430	Issue Dt:	05/11/2010	Application #:	11362409	Filing Dt:	02/23/2006
Publication #:	US20070193975	Pub Dt:	08/23/2007
Title:	USING POSITIVE DC OFFSET OF BIAS RF TO NEUTRALIZE CHARGE BUILD-UP OF ETCH FEATURES

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Title:	INTEGRATED DRAM-NVRAM MULTI-LEVEL MEMORY

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Title:	INTEGRATED DRAM-NVRAM MULTI-LEVEL MEMORY

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100

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Publication #:	US20060148248	Pub Dt:	07/06/2006
Title:	ELECTRODE STRUCTURES AND METHOD TO FORM ELECTRODE STRUCTURES THAT MINIMIZE ELECTRODE WORK FUNCTION VARIATION

Assignor

MICRON TECHNOLOGY, INC.

Exec Dt:

04/26/2016

Assignee

U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT

633 WEST FIFTH STREET, 24TH FLOOR

LOS ANGELES, CALIFORNIA 90071

Correspondence name and address
	WSGR, C/O QUI LU, SENIOR PARALEGAL
	650 PAGE MILL ROAD
	FH 2-1 P12
	PALO ALTO, CA 94304

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