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Patent #:
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Issue Dt:
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12/04/2007
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Application #:
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11174234
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Filing Dt:
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07/01/2005
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Publication #:
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Pub Dt:
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01/04/2007
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Title:
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REVERSE-BIAS METHOD FOR WRITING MEMORY CELLS IN A MEMORY ARRAY
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Patent #:
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Issue Dt:
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11/18/2008
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Application #:
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11174240
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Filing Dt:
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07/01/2005
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Publication #:
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Pub Dt:
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01/04/2007
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Title:
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MEMORY CELL WITH HIGH-K ANTIFUSE FOR REVERSE BIAS PROGRAMMING
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Patent #:
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Issue Dt:
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04/22/2008
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Application #:
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11179077
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Filing Dt:
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07/11/2005
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Publication #:
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Pub Dt:
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01/11/2007
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Title:
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APPARATUS AND METHOD FOR PROGRAMMING AN ARRAY OF NONVOLATILE MEMORY CELLS INCLUDING SWITCHABLE RESISTOR MEMORY ELEMENTS
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Patent #:
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Issue Dt:
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09/16/2008
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Application #:
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11179122
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Filing Dt:
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07/11/2005
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Publication #:
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Pub Dt:
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01/11/2007
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Title:
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SWITCHABLE RESISTIVE MEMORY WITH OPPOSITE POLARITY WRITE PULSES
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Patent #:
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Issue Dt:
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03/18/2008
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Application #:
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11179123
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Filing Dt:
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07/11/2005
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Publication #:
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Pub Dt:
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01/11/2007
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Title:
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APPARATUS AND METHOD FOR READING AN ARRAY OF NONVOLATILE MEMORY CELLS INCLUDING SWITCHABLE RESISTOR MEMORY ELEMENTS
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11179360
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Filing Dt:
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07/11/2005
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Publication #:
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Pub Dt:
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01/11/2007
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Title:
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THREE-DIMENSIONAL NON-VOLATILE SRAM INCORPORATING THIN-FILM DEVICE LAYER
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Patent #:
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Issue Dt:
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08/12/2008
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Application #:
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11191686
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Filing Dt:
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07/27/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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NON-VOLATILE MEMORY AND METHOD WITH MULTI-STREAM UPDATING
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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11191823
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Filing Dt:
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07/27/2005
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Publication #:
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Pub Dt:
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11/24/2005
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Title:
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REDUCING THE EFFECTS OF NOISE IN NON-VOLATILE MEMORIES THROUGH MULTIPLE READS
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Patent #:
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Issue Dt:
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04/29/2008
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Application #:
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11192220
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Filing Dt:
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07/27/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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NON-VOLATILE MEMORY AND METHOD WITH MULTI-STREAM UPDATE TRACKING
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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11192386
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Filing Dt:
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07/27/2005
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Publication #:
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Pub Dt:
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07/13/2006
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Title:
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NON-VOLATILE MEMORY AND METHOD WITH IMPROVED INDEXING FOR SCRATCH PAD AND UPDATE BLOCKS
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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11194439
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Filing Dt:
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08/01/2005
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Publication #:
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Pub Dt:
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02/01/2007
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Title:
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METHOD FOR PROGRAMMING NON-VOLATILE MEMORY WITH SELF-ADJUSTING MAXIMUM PROGRAM LOOP
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Patent #:
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Issue Dt:
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04/04/2006
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Application #:
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11194827
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Filing Dt:
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08/01/2005
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Title:
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SYSTEM FOR PROGRAMMING NON-VOLATILE MEMORY WITH SELF-ADJUSTING MAXIMUM PROGRAM LOOP
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Patent #:
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Issue Dt:
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12/18/2007
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Application #:
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11196160
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Filing Dt:
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08/02/2005
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Publication #:
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Pub Dt:
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04/20/2006
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Title:
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MEMORY CARD WITH INTEGRAL COVERED SECOND DEVICE CONNECTOR FOR USE WITH COMPUTING DEVICES WITHOUT A MEMORY CARD SLOT
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Patent #:
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Issue Dt:
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03/10/2009
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Application #:
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11196161
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Filing Dt:
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08/02/2005
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Publication #:
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Pub Dt:
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02/08/2007
| | | | |
Title:
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SITUATION SENSITIVE MEMORY PERFORMANCE
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Patent #:
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Issue Dt:
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12/01/2009
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Application #:
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11196168
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Filing Dt:
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08/03/2005
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Publication #:
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Pub Dt:
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02/08/2007
| | | | |
Title:
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METHOD AND SYSTEM FOR DUAL MODE ACCESS FOR STORAGE DEVICES
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Patent #:
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Issue Dt:
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12/08/2009
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Application #:
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11196547
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Filing Dt:
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08/02/2005
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Publication #:
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Pub Dt:
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12/28/2006
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Title:
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SYSTEM AND METHOD FOR PROGRAMMING CELLS IN NON-VOLATILE INTEGRATED MEMORY DEVICES
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Patent #:
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Issue Dt:
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08/11/2015
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Application #:
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11196826
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Filing Dt:
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08/03/2005
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Publication #:
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Pub Dt:
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02/08/2007
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Title:
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SYSTEMS AND METHODS FOR A MASS DATA STORAGE SYSTEM HAVING A FILE-BASED INTERFACE TO A HOST AND A NON-FILE-BASED INTERFACE TO SECONDARY STORAGE
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Patent #:
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Issue Dt:
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01/20/2009
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Application #:
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11196869
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Filing Dt:
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08/03/2005
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Publication #:
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Pub Dt:
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02/08/2007
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Title:
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INTERFACING SYSTEMS OPERATING THROUGH A LOGICAL ADDRESS SPACE AND ON A DIRECT DATA FILE BASIS
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Patent #:
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Issue Dt:
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06/12/2007
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Application #:
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11198261
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Filing Dt:
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08/04/2005
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Publication #:
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Pub Dt:
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06/29/2006
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Title:
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SUBSTRATE ELECTRON INJECTION TECHNIQUES FOR PROGRAMMING NON-VOLATILE CHARGE STORAGE MEMORY CELLS
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Patent #:
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Issue Dt:
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02/06/2007
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Application #:
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11201000
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Filing Dt:
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08/09/2005
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Publication #:
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Pub Dt:
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01/26/2006
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Title:
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SOURCE CONTROLLED OPERATION OF NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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11201007
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Filing Dt:
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08/09/2005
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Publication #:
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Pub Dt:
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01/19/2006
| | | | |
Title:
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SYMBOL FREQUENCY LEVELING IN A STORAGE SYSTEM
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Patent #:
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Issue Dt:
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02/13/2007
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Application #:
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11205342
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Filing Dt:
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08/16/2005
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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MULTIPLE REMOVABLE NON-VOLATILE MEMORY CARDS SERIALLY COMMUNICATING WITH A HOST
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Patent #:
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Issue Dt:
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10/09/2007
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Application #:
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11207260
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Filing Dt:
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08/18/2005
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Publication #:
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Pub Dt:
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03/09/2006
| | | | |
Title:
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BITLINE GOVERNED APPROACH FOR PROGRAMMING NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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08/08/2006
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Application #:
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11207427
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Filing Dt:
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08/18/2005
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Publication #:
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Pub Dt:
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02/23/2006
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Title:
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BITLINE GOVERNED APPROACH FOR COARSE/FINE PROGRAMMING
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Patent #:
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Issue Dt:
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09/04/2007
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Application #:
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11215951
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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01/12/2006
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Title:
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ULTRATHIN CHEMICALLY GROWN OXIDE FILM AS A DOPANT DIFFUSION BARRIER IN SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
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05/27/2008
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Application #:
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11223055
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Filing Dt:
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09/08/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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ERASE INHIBIT IN NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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11223273
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Filing Dt:
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09/09/2005
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Title:
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LAST-FIRST MODE AND APPARATUS FOR PROGRAMMING OF NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB
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Patent #:
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Issue Dt:
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05/15/2007
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Application #:
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11223623
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Filing Dt:
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09/09/2005
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Title:
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LAST-FIRST MODE AND METHOD FOR PROGRAMMING OF NON-VOLATILE MEMORY WITH REDUCED PROGRAM DISTURB
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Patent #:
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Issue Dt:
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08/22/2006
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Application #:
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11223709
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Filing Dt:
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09/09/2005
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Publication #:
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Pub Dt:
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01/12/2006
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Title:
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METHOD AND SYSTEM FOR PROGRAMMING AND INHIBITING MULTI-LEVEL, NON-VOLATILE MEMORY CELLS
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Patent #:
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Issue Dt:
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01/23/2007
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Application #:
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11225312
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Filing Dt:
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09/12/2005
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Publication #:
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Pub Dt:
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01/12/2006
| | | | |
Title:
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VOLTAGE BUFFER FOR CAPACITIVE LOADS
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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11235985
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Filing Dt:
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09/26/2005
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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NON-VOLATILE MEMORY AND METHOD WITH REDUCED NEIGHBORING FIELD ERRORS
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Patent #:
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Issue Dt:
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09/21/2010
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Application #:
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11237167
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Filing Dt:
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09/28/2005
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Publication #:
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Pub Dt:
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04/26/2007
| | | | |
Title:
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MEMORY CELL COMPRISING SWITCHABLE SEMICONDUCTOR MEMORY ELEMENT WITH TRIMMABLE RESISTANCE
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Patent #:
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Issue Dt:
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07/03/2007
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Application #:
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11237169
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Filing Dt:
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09/28/2005
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Publication #:
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Pub Dt:
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03/16/2006
| | | | |
Title:
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METHOD TO MINIMIZE FORMATION OF RECESS AT SURFACE PLANARIZED BY CHEMICAL MECHANICAL PLANARIZATION
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Patent #:
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Issue Dt:
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12/05/2006
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Application #:
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11238911
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Filing Dt:
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09/28/2005
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Publication #:
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Pub Dt:
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02/02/2006
| | | | |
Title:
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METHOD OF REDUCING DISTURBS IN NON-VOLATILE MEMORY
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Patent #:
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|
Issue Dt:
|
09/08/2009
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Application #:
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11241000
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Filing Dt:
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09/29/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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DYNAMIC COLUMN BLOCK SELECTION
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Patent #:
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Issue Dt:
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06/10/2008
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Application #:
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11243344
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Filing Dt:
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10/03/2005
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Publication #:
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|
Pub Dt:
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02/16/2006
| | | | |
Title:
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NOVEL MULTI-STATE MEMORY
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Patent #:
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Issue Dt:
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12/29/2009
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Application #:
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11250094
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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INITIALIZATION OF FLASH STORAGE VIA AN EMBEDDED CONTROLLER
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Patent #:
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Issue Dt:
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10/19/2010
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Application #:
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11250238
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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02/09/2006
| | | | |
Title:
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PARTIAL BLOCK DATA PROGRAMMING AND READING OPERATIONS IN A NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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05/05/2009
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Application #:
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11250299
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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METHOD OF STORING TRANSFORMED UNITS OF DATA IN A MEMORY SYSTEM HAVING FIXED SIZED STORAGE BLOCKS
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Patent #:
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Issue Dt:
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05/08/2007
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Application #:
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11250357
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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02/16/2006
| | | | |
Title:
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NON-VOLATILE MEMORY AND METHOD WITH BIT LINE COMPENSATION DEPENDENT ON NEIGHBORING OPERATING MODES
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Patent #:
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Issue Dt:
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10/12/2010
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Application #:
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11250794
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Filing Dt:
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10/13/2005
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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MEMORY SYSTEM STORING TRANSFORMED UNITS OF DATA IN FIXED SIZED STORAGE BLOCKS
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Patent #:
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|
Issue Dt:
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08/26/2008
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Application #:
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11251386
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Filing Dt:
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10/14/2005
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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SELF-ALIGNED TRENCH FILLING FOR NARROW GAP ISOLATION REGIONS
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Patent #:
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Issue Dt:
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07/22/2008
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Application #:
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11251400
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Filing Dt:
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10/14/2005
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Publication #:
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Pub Dt:
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05/25/2006
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Title:
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MEMORY WITH SELF-ALIGNED TRENCHES FOR NARROW GAP ISOLATION REGIONS
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Patent #:
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Issue Dt:
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04/17/2007
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Application #:
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11251458
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Filing Dt:
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10/14/2005
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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APPARATUS FOR CONTROLLED PROGRAMMING OF NON-VOLATILE MEMORY EXHIBITING BIT LINE COUPLING
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Patent #:
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Issue Dt:
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02/06/2007
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Application #:
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11253531
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Filing Dt:
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10/18/2005
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Publication #:
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Pub Dt:
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02/23/2006
| | | | |
Title:
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CORRECTED DATA STORAGE AND HANDLING METHODS
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Patent #:
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Issue Dt:
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06/02/2009
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Application #:
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11254142
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Filing Dt:
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10/18/2005
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Publication #:
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Pub Dt:
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04/19/2007
| | | | |
Title:
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INTEGRATION PROCESS FLOW FOR FLASH DEVICES WITH LOW GAP FILL ASPECT RATIO
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Patent #:
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Issue Dt:
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08/05/2008
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Application #:
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11259423
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Filing Dt:
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10/25/2005
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Publication #:
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Pub Dt:
|
02/08/2007
| | | | |
Title:
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SCHEDULING OF RECLAIM OPERATIONS IN NON-VOLATILE MEMORY
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Patent #:
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|
Issue Dt:
|
07/19/2011
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Application #:
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11259439
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Filing Dt:
|
10/25/2005
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Publication #:
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Pub Dt:
|
02/08/2007
| | | | |
Title:
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NON-VOLATILE MEMORY WITH SCHEDULED RECLAIM OPERATIONS
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Patent #:
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Issue Dt:
|
04/29/2008
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Application #:
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11259799
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Filing Dt:
|
10/27/2005
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Publication #:
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|
Pub Dt:
|
05/03/2007
| | | | |
Title:
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APPARATUS FOR PROGRAMMING OF MULTI-STATE NON-VOLATILE MEMORY USING SMART VERIFY
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|
Patent #:
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|
Issue Dt:
|
11/27/2007
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Application #:
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11260658
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Filing Dt:
|
10/27/2005
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Publication #:
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|
Pub Dt:
|
05/03/2007
| | | | |
Title:
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METHOD FOR PROGRAMMING OF MULTI-STATE NON-VOLATILE MEMORY USING SMART VERIFY
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Patent #:
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|
Issue Dt:
|
03/24/2009
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Application #:
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11261138
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Filing Dt:
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10/27/2005
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Publication #:
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|
Pub Dt:
|
05/03/2007
| | | | |
Title:
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METHODS FOR ADAPTIVELY HANDLING DATA WRITES IN NON-VOLATILE MEMORIES
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Patent #:
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|
Issue Dt:
|
12/08/2009
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Application #:
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11261150
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Filing Dt:
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10/27/2005
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Publication #:
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|
Pub Dt:
|
05/03/2007
| | | | |
Title:
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NON-VOLATILE MEMORY WITH ADAPTIVE HANDLING OF DATA WRITES
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Patent #:
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Issue Dt:
|
03/31/2009
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Application #:
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11264112
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Filing Dt:
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11/01/2005
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Publication #:
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Pub Dt:
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05/03/2007
| | | | |
Title:
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MULTIPLE DIE INTEGRATED CIRCUIT PACKAGE
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Patent #:
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Issue Dt:
|
04/01/2008
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Application #:
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11264556
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Filing Dt:
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11/01/2005
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Publication #:
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Pub Dt:
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05/03/2007
| | | | |
Title:
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METHODS FOR A MULTIPLE DIE INTEGRATED CIRCUIT PACKAGE
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Patent #:
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Issue Dt:
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02/16/2010
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Application #:
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11264889
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Filing Dt:
|
11/02/2005
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Publication #:
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Pub Dt:
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05/03/2007
| | | | |
Title:
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HIGH DENSITY THREE DIMENSIONAL SEMICONDUCTOR DIE PACKAGE
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Patent #:
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Issue Dt:
|
02/03/2009
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Application #:
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11265337
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Filing Dt:
|
11/02/2005
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Publication #:
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Pub Dt:
|
05/03/2007
| | | | |
Title:
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METHOD OF MANUFACTURING FLASH MEMORY CARDS
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Patent #:
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Issue Dt:
|
12/15/2009
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Application #:
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11267534
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Filing Dt:
|
11/04/2005
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Publication #:
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Pub Dt:
|
07/19/2007
| | | | |
Title:
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IN-LINE CACHE USING NONVOLATILE MEMORY BETWEEN HOST AND DISK DEVICE
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Patent #:
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Issue Dt:
|
05/27/2008
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Application #:
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11270198
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Filing Dt:
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11/08/2005
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Publication #:
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|
Pub Dt:
|
05/10/2007
| | | | |
Title:
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RETARGETABLE MEMORY CELL REDUNDANCY METHODS
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Patent #:
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Issue Dt:
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11/04/2008
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Application #:
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11270410
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Filing Dt:
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11/08/2005
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Publication #:
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Pub Dt:
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05/10/2007
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Title:
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MEMORY WITH RETARGETABLE MEMORY CELL REDUNDANCY
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Patent #:
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Issue Dt:
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10/30/2007
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Application #:
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11271241
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Filing Dt:
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11/10/2005
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Publication #:
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Pub Dt:
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05/10/2007
| | | | |
Title:
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REVERSE COUPLING EFFECT WITH TIMING INFORMATION FOR NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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05/29/2007
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Application #:
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11271553
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Filing Dt:
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11/10/2005
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Publication #:
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Pub Dt:
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03/23/2006
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Title:
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FLASH MEMORY DATA CORRECTION AND SCRUB TECHNIQUES
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Patent #:
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Issue Dt:
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03/11/2008
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Application #:
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11273729
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Filing Dt:
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11/14/2005
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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MEMORY DEVICE WITH LATCHING CAP FOR USB PLUG
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Patent #:
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Issue Dt:
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08/24/2010
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Application #:
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11273773
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Filing Dt:
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11/14/2005
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Publication #:
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Pub Dt:
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05/17/2007
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Title:
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STRUCTURES FOR THE MANAGEMENT OF ERASE OPERATIONS IN NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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11/24/2009
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Application #:
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11273774
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Filing Dt:
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11/14/2005
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
Title:
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METHODS FOR THE MANAGEMENT OF ERASE OPERATIONS IN NON-VOLATILE MEMORIES
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Patent #:
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Issue Dt:
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08/07/2007
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Application #:
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11277907
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Filing Dt:
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03/29/2006
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Publication #:
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Pub Dt:
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07/20/2006
| | | | |
Title:
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PILLAR CELL FLASH MEMORY TECHNOLOGY
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Patent #:
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Issue Dt:
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11/11/2008
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Application #:
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11278778
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Filing Dt:
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04/05/2006
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Publication #:
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Pub Dt:
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07/27/2006
| | | | |
Title:
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EEPROM WITH SPLIT GATE SOURCE SIDE INJECTION
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Patent #:
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Issue Dt:
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05/31/2011
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Application #:
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11279725
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Filing Dt:
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04/13/2006
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Publication #:
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Pub Dt:
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10/18/2007
| | | | |
Title:
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METHODS OF MAKING FLASH MEMORY CELL ARRAYS HAVING DUAL CONTROL GATES PER MEMORY CELL CHARGE STORAGE ELEMENT
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Patent #:
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Issue Dt:
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06/28/2011
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Application #:
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11280419
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Filing Dt:
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11/16/2005
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Publication #:
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Pub Dt:
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05/17/2007
| | | | |
Title:
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PADLESS SUBSTRATE FOR SURFACE MOUNTED COMPONENTS
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Patent #:
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Issue Dt:
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08/19/2008
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Application #:
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11280716
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Filing Dt:
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11/16/2005
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Publication #:
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Pub Dt:
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03/30/2006
| | | | |
Title:
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VARIABLE CURRENT SINKING FOR COARSE/FINE PROGRAMMING OF NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
|
04/10/2012
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Application #:
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11283221
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Filing Dt:
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11/18/2005
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Publication #:
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Pub Dt:
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05/24/2007
| | | | |
Title:
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METHOD FOR MANAGING KEYS AND/OR RIGHTS OBJECTS
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|
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Patent #:
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Issue Dt:
|
05/19/2009
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Application #:
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11284623
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Filing Dt:
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11/21/2005
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Publication #:
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Pub Dt:
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03/15/2007
| | | | |
Title:
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METHOD OF HARDWARE DRIVER INTEGRITY CHECK OF MEMORY CARD CONTROLLER FIRMWARE
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|
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Patent #:
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Issue Dt:
|
02/24/2015
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Application #:
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11285600
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Filing Dt:
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11/21/2005
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Publication #:
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Pub Dt:
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03/15/2007
| | | | |
Title:
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HARDWARE DRIVER INTEGRITY CHECK OF MEMORY CARD CONTROLLER FIRMWARE
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Patent #:
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Issue Dt:
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06/29/2010
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Application #:
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11285992
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Filing Dt:
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11/22/2005
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Publication #:
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Pub Dt:
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06/14/2007
| | | | |
Title:
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METHOD FOR ADAPTING A MEMORY SYSTEM TO OPERATE WITH A LEGACY HOST ORIGINALLY DESIGNED TO OPERATE WITH A DIFFERENT MEMORY SYSTEM
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|
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Patent #:
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Issue Dt:
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06/15/2010
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Application #:
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11286100
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Filing Dt:
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11/22/2005
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Publication #:
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Pub Dt:
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05/24/2007
| | | | |
Title:
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MEMORY SYSTEM FOR LEGACY HOSTS
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Patent #:
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Issue Dt:
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10/19/2010
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Application #:
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11287452
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Filing Dt:
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11/23/2005
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Publication #:
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Pub Dt:
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05/24/2007
| | | | |
Title:
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DEVICES HAVING REVERSIBLE RESISTIVITY-SWITCHING METAL OXIDE OR NITRIDE LAYER WITH ADDED METAL
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|
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Patent #:
|
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Issue Dt:
|
04/01/2008
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Application #:
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11292130
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Filing Dt:
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12/01/2005
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Publication #:
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Pub Dt:
|
06/07/2007
| | | | |
Title:
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METHOD FOR MANAGING APPLIANCES
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|
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Patent #:
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Issue Dt:
|
06/15/2010
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Application #:
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11292132
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Filing Dt:
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12/01/2005
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Publication #:
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Pub Dt:
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06/07/2007
| | | | |
Title:
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SYSTEM FOR MANAGING APPLIANCES
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Patent #:
|
|
Issue Dt:
|
02/03/2009
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Application #:
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11295747
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
Title:
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SOFT PROGRAMMING NON-VOLATILE MEMORY UTILIZING INDIVIDUAL VERIFICATION AND ADDITIONAL SOFT PROGRAMMING OF SUBSETS OF MEMORY CELLS
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|
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Patent #:
|
|
Issue Dt:
|
09/30/2008
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Application #:
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11295755
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
Title:
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ERASING NON-VOLATILE MEMORY UTILIZING CHANGING WORD LINE CONDITIONS TO COMPENSATE FOR SLOWER ERASING MEMORY CELLS
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|
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Patent #:
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|
Issue Dt:
|
03/25/2008
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Application #:
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11295776
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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06/14/2007
| | | | |
Title:
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REDUCING READ DISTURB FOR NON-VOLATILE STORAGE
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Patent #:
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|
Issue Dt:
|
11/10/2009
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Application #:
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11296022
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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06/07/2007
| | | | |
Title:
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METHOD OF FORMING LOW RESISTANCE VOID-FREE CONTACTS
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|
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Patent #:
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Issue Dt:
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07/15/2008
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Application #:
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11296028
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
Title:
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SYSTEMS FOR ERASING NON-VOLATILE MEMORY USING INDIVIDUAL VERIFICATION AND ADDITIONAL ERASING OF SUBSETS OF MEMORY CELLS
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|
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Patent #:
|
|
Issue Dt:
|
07/22/2008
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Application #:
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11296032
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
|
10/05/2006
| | | | |
Title:
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SYSTEMS FOR ERASING NON-VOLATILE MEMORY UTILIZING CHANGING WORD LINE CONDITIONS TO COMPENSATE FOR SLOWER ERASING MEMORY CELLS
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|
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Patent #:
|
|
Issue Dt:
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07/22/2008
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Application #:
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11296055
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
Title:
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ERASING NON-VOLATILE MEMORY USING INDIVIDUAL VERIFICATION AND ADDITIONAL ERASING OF SUBSETS OF MEMORY CELLS
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Patent #:
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Issue Dt:
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08/05/2008
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Application #:
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11296071
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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10/05/2006
| | | | |
Title:
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SYSTEMS FOR SOFT PROGRAMMING NON-VOLATILE MEMORY UTILIZING INDIVIDUAL VERIFICATION AND ADDITIONAL SOFT PROGRAMMING OF SUBSETS OF MEMORY CELLS
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Patent #:
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Issue Dt:
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08/28/2007
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Application #:
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11296087
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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06/07/2007
| | | | |
Title:
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SYSTEM FOR REDUCING READ DISTURB FOR NON-VOLATILE STORAGE
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Patent #:
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Issue Dt:
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06/15/2010
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Application #:
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11296235
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Filing Dt:
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12/06/2005
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Publication #:
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Pub Dt:
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06/07/2007
| | | | |
Title:
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LOW RESISTANCE VOID-FREE CONTACTS
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Patent #:
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Issue Dt:
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11/20/2007
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Application #:
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11298104
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Filing Dt:
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12/09/2005
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Publication #:
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Pub Dt:
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05/04/2006
| | | | |
Title:
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OPERATING TECHNIQUES FOR REDUCING PROGRAM AND READ DISTURBS OF A NON-VOLATILE MEMORY
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Patent #:
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Issue Dt:
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07/29/2008
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Application #:
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11298331
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Filing Dt:
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12/09/2005
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Publication #:
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Pub Dt:
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04/27/2006
| | | | |
Title:
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DEPOSITED SEMICONDUCTOR STRUCTURE TO MINIMIZE N-TYPE DOPANT DIFFUSION AND METHOD OF MAKING
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Patent #:
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Issue Dt:
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10/22/2013
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Application #:
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11299299
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Filing Dt:
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12/09/2005
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Publication #:
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Pub Dt:
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05/22/2008
| | | | |
Title:
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COMPOSITIONS AND METHODS FOR MODULATION OF NANOSTRUCTURE ENERGY LEVELS
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Patent #:
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Issue Dt:
|
06/11/2013
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Application #:
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11301715
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Filing Dt:
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12/13/2005
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Publication #:
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Pub Dt:
|
06/14/2007
| | | | |
Title:
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SUBSTRATE PANEL WITH PLATING BAR STRUCTURED TO ALLOW MINIMUM KERF WIDTH
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Patent #:
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Issue Dt:
|
01/25/2011
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Application #:
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11302764
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Filing Dt:
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12/13/2005
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Publication #:
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Pub Dt:
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06/14/2007
| | | | |
Title:
|
LOGICALLY-ADDRESSED FILE STORAGE METHODS
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Patent #:
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Issue Dt:
|
05/06/2008
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Application #:
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11303193
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Filing Dt:
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12/16/2005
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Publication #:
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Pub Dt:
|
06/21/2007
| | | | |
Title:
|
SYSTEM FOR READING NON-VOLATILE STORAGE WITH EFFICIENT SETUP
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Patent #:
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Issue Dt:
|
12/16/2008
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Application #:
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11303220
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Filing Dt:
|
12/15/2005
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Publication #:
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Pub Dt:
|
05/04/2006
| | | | |
Title:
|
EFFICIENT CONNECTION BETWEEN MODULES OF REMOVABLE ELECTRONIC CIRCUIT CARDS
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Patent #:
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Issue Dt:
|
11/10/2009
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Application #:
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11303229
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Filing Dt:
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12/16/2005
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Publication #:
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Pub Dt:
|
06/21/2007
| | | | |
Title:
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LASER ANNEAL OF VERTICALLY ORIENTED SEMICONDUCTOR STRUCTURES WHILE MAINTAINING A DOPANT PROFILE
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Patent #:
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Issue Dt:
|
05/13/2008
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Application #:
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11303569
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Filing Dt:
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12/16/2005
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Publication #:
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Pub Dt:
|
06/21/2007
| | | | |
Title:
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VOLTAGE REGULATION WITH ACTIVE SUPPLEMENTAL CURRENT FOR OUTPUT STABILIZATION
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|
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Patent #:
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Issue Dt:
|
03/18/2008
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Application #:
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11304783
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Filing Dt:
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12/14/2005
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Publication #:
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Pub Dt:
|
06/15/2006
| | | | |
Title:
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DATA RECOVERY METHODS IN MULTI-STATE MEMORY AFTER PROGRAM FAIL
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|
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Patent #:
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Issue Dt:
|
09/02/2008
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Application #:
|
11304960
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Filing Dt:
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12/14/2005
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Publication #:
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Pub Dt:
|
06/15/2006
| | | | |
Title:
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MULTI-STATE MEMORY HAVING DATA RECOVERY AFTER PROGRAM FAIL
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|
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Patent #:
|
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Issue Dt:
|
07/10/2007
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Application #:
|
11304961
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Filing Dt:
|
12/14/2005
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Publication #:
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Pub Dt:
|
05/18/2006
| | | | |
Title:
|
SMART VERIFY FOR MULTI-STATE MEMORIES
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|
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Patent #:
|
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Issue Dt:
|
06/09/2009
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Application #:
|
11305588
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Filing Dt:
|
12/16/2005
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Publication #:
|
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Pub Dt:
|
06/21/2007
| | | | |
Title:
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READING NON-VOLATILE STORAGE WITH EFFICIENT SETUP
|
|