skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:038809/0600   Pages: 17
Recorded: 05/25/2016
Attorney Dkt #:NAME CHANGE PART 2C
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 552
Page 1 of 6
Pages: 1 2 3 4 5 6
1
Patent #:
7508713
Issue Dt:
03/24/2009
Application #:
11693601
Filing Dt:
03/29/2007
Publication #:
US20080239813
Pub Dt:
10/02/2008
Title:
METHOD OF COMPENSATING VARIATIONS ALONG A WORD LINE IN A NON-VOLATILE MEMORY
2
Patent #:
7577031
Issue Dt:
08/18/2009
Application #:
11693616
Filing Dt:
03/29/2007
Publication #:
US20080239824
Pub Dt:
10/02/2008
Title:
NON-VOLATILE MEMORY WITH COMPENSATION FOR VARIATIONS ALONG A WORD LINE
3
Patent #:
7685478
Issue Dt:
03/23/2010
Application #:
11693644
Filing Dt:
03/29/2007
Publication #:
US20080244143
Pub Dt:
10/02/2008
Title:
METHOD OF TESTING MEMORY CARD OPERATION
4
Patent #:
7676714
Issue Dt:
03/09/2010
Application #:
11693648
Filing Dt:
03/29/2007
Publication #:
US20080244140
Pub Dt:
10/02/2008
Title:
EXTENDER STRIP AND TEST ASSEMBLY FOR TESTING MEMORY CARD OPERATION
5
Patent #:
7904793
Issue Dt:
03/08/2011
Application #:
11693649
Filing Dt:
03/29/2007
Publication #:
US20080250300
Pub Dt:
10/09/2008
Title:
METHOD FOR DECODING DATA IN NON-VOLATILE STORAGE USING RELIABILITY METRICS BASED ON MULTIPLE READS
6
Patent #:
7797480
Issue Dt:
09/14/2010
Application #:
11693663
Filing Dt:
03/29/2007
Publication #:
US20080244162
Pub Dt:
10/02/2008
Title:
METHOD FOR READING NON-VOLATILE STORAGE USING PRE-CONDITIONING WAVEFORMS AND MODIFIED RELIABILITY METRICS
7
Patent #:
7745285
Issue Dt:
06/29/2010
Application #:
11693765
Filing Dt:
03/30/2007
Publication #:
US20080239827
Pub Dt:
10/02/2008
Title:
METHODS OF FORMING AND OPERATING NAND MEMORY WITH SIDE-TUNNELING
8
Patent #:
7512005
Issue Dt:
03/31/2009
Application #:
11693769
Filing Dt:
03/30/2007
Publication #:
US20080239821
Pub Dt:
10/02/2008
Title:
NAND MEMORY WITH SIDE-TUNNELING
9
Patent #:
7618850
Issue Dt:
11/17/2009
Application #:
11693845
Filing Dt:
03/30/2007
Publication #:
US20070164309
Pub Dt:
07/19/2007
Title:
METHOD OF MAKING A DIODE READ/WRITE MEMORY CELL IN A PROGRAMMED STATE
10
Patent #:
7580296
Issue Dt:
08/25/2009
Application #:
11694714
Filing Dt:
03/30/2007
Publication #:
US20080239801
Pub Dt:
10/02/2008
Title:
LOAD MANAGEMENT FOR MEMORY DEVICE
11
Patent #:
7580298
Issue Dt:
08/25/2009
Application #:
11694746
Filing Dt:
03/30/2007
Publication #:
US20080239836
Pub Dt:
10/02/2008
Title:
METHOD FOR MANAGING ELECTRICAL LOAD OF AN ELECTRONIC DEVICE
12
Patent #:
7558129
Issue Dt:
07/07/2009
Application #:
11694760
Filing Dt:
03/30/2007
Publication #:
US20080239802
Pub Dt:
10/02/2008
Title:
DEVICE WITH LOAD-BASED VOLTAGE GENERATION
13
Patent #:
7515488
Issue Dt:
04/07/2009
Application #:
11694798
Filing Dt:
03/30/2007
Publication #:
US20080239856
Pub Dt:
10/02/2008
Title:
METHOD FOR LOAD-BASED VOLTAGE GENERATION
14
Patent #:
8566695
Issue Dt:
10/22/2013
Application #:
11694866
Filing Dt:
03/30/2007
Publication #:
US20080244713
Pub Dt:
10/02/2008
Title:
CONTROLLING ACCESS TO DIGITAL CONTENT
15
Patent #:
7966550
Issue Dt:
06/21/2011
Application #:
11694947
Filing Dt:
03/31/2007
Publication #:
US20080244338
Pub Dt:
10/02/2008
Title:
SOFT BIT DATA TRANSMISSION FOR ERROR CORRECTION CONTROL IN NON-VOLATILE MEMORY
16
Patent #:
7966546
Issue Dt:
06/21/2011
Application #:
11694948
Filing Dt:
03/31/2007
Publication #:
US20080244360
Pub Dt:
10/02/2008
Title:
NON-VOLATILE MEMORY WITH SOFT BIT DATA TRANSMISSION FOR ERROR CORRECTION CONTROL
17
Patent #:
7975209
Issue Dt:
07/05/2011
Application #:
11694950
Filing Dt:
03/31/2007
Publication #:
US20080244367
Pub Dt:
10/02/2008
Title:
NON-VOLATILE MEMORY WITH GUIDED SIMULATED ANNEALING ERROR CORRECTION CONTROL
18
Patent #:
7971127
Issue Dt:
06/28/2011
Application #:
11694951
Filing Dt:
03/31/2007
Publication #:
US20080244368
Pub Dt:
10/02/2008
Title:
GUIDED SIMULATED ANNEALING IN NON-VOLATILE MEMORY ERROR CORRECTION CONTROL
19
Patent #:
7564711
Issue Dt:
07/21/2009
Application #:
11694987
Filing Dt:
03/31/2007
Publication #:
US20080198660
Pub Dt:
08/21/2008
Title:
MULTIPLE PASS WRITE SEQUENCE FOR NON-VOLATILE STORAGE
20
Patent #:
7616500
Issue Dt:
11/10/2009
Application #:
11694989
Filing Dt:
03/31/2007
Publication #:
US20080198664
Pub Dt:
08/21/2008
Title:
NON-VOLATILE STORAGE APPARATUS WITH MULTIPLE PASS WRITE SEQUENCE
21
Patent #:
7564715
Issue Dt:
07/21/2009
Application #:
11694990
Filing Dt:
03/31/2007
Publication #:
US20080198665
Pub Dt:
08/21/2008
Title:
VARIABLE INITIAL PROGRAM VOLTAGE MAGNITUDE FOR NON-VOLATILE STORAGE
22
Patent #:
7616495
Issue Dt:
11/10/2009
Application #:
11694991
Filing Dt:
03/31/2007
Publication #:
US20080198661
Pub Dt:
08/21/2008
Title:
NON-VOLATILE STORAGE APPARATUS WITH VARIABLE INITIAL PROGRAM VOLTAGE MAGNITUDE
23
Patent #:
7619930
Issue Dt:
11/17/2009
Application #:
11694992
Filing Dt:
03/31/2007
Publication #:
US20080198662
Pub Dt:
08/21/2008
Title:
DYNAMIC VERIFY BASED ON THRESHOLD VOLTAGE DISTRIBUTION
24
Patent #:
7642873
Issue Dt:
01/05/2010
Application #:
11695009
Filing Dt:
03/31/2007
Publication #:
US20080238564
Pub Dt:
10/02/2008
Title:
METHOD FOR ENABLING AN OSCILLATOR CIRCUIT USING TRANSITION DETECTION
25
Patent #:
7642874
Issue Dt:
01/05/2010
Application #:
11695010
Filing Dt:
03/31/2007
Publication #:
US20080238565
Pub Dt:
10/02/2008
Title:
OSCILLATOR CIRCUIT WITH TRANSITION DETECTION ENABLE
26
Patent #:
7696804
Issue Dt:
04/13/2010
Application #:
11695011
Filing Dt:
03/31/2007
Publication #:
US20080238522
Pub Dt:
10/02/2008
Title:
METHOD FOR INCORPORATING TRANSISTOR SNAP-BACK PROTECTION IN A LEVEL SHIFTER CIRCUIT
27
Patent #:
7696805
Issue Dt:
04/13/2010
Application #:
11695013
Filing Dt:
03/31/2007
Publication #:
US20080238523
Pub Dt:
10/02/2008
Title:
LEVEL SHIFTER CIRCUIT INCORPORATING TRANSISTOR SNAP-BACK PROTECTION
28
Patent #:
7558140
Issue Dt:
07/07/2009
Application #:
11695015
Filing Dt:
03/31/2007
Publication #:
US20080239839
Pub Dt:
10/02/2008
Title:
METHOD FOR USING A SPATIALLY DISTRIBUTED AMPLIFIER CIRCUIT
29
Patent #:
7554406
Issue Dt:
06/30/2009
Application #:
11695017
Filing Dt:
03/31/2007
Publication #:
US20080238541
Pub Dt:
10/02/2008
Title:
SPATIALLY DISTRIBUTED AMPLIFIER CIRCUIT
30
Patent #:
7382017
Issue Dt:
06/03/2008
Application #:
11695728
Filing Dt:
04/03/2007
Publication #:
US20070187768
Pub Dt:
08/16/2007
Title:
NANO-ENABLED MEMORY DEVICES AND ANISOTROPIC CHARGE CARRYING ARRAYS
31
Patent #:
7585564
Issue Dt:
09/08/2009
Application #:
11706730
Filing Dt:
02/13/2007
Publication #:
US20080032134
Pub Dt:
02/07/2008
Title:
POST-DEPOSITION ENCAPSULATION OF NANOSTRUCTURES: COMPOSITIONS, DEVICES AND SYSTEMS INCORPORATING SAME
32
Patent #:
7904670
Issue Dt:
03/08/2011
Application #:
11725628
Filing Dt:
03/19/2007
Publication #:
US20080235463
Pub Dt:
09/25/2008
Title:
METHODS FOR CONVERSION OF UPDATE BLOCKS BASED ON COMPARISON WITH A THRESHOLD SIZE
33
Patent #:
8275953
Issue Dt:
09/25/2012
Application #:
11725720
Filing Dt:
03/19/2007
Publication #:
US20080235437
Pub Dt:
09/25/2008
Title:
METHODS FOR FORCING AN UPDATE BLOCK TO REMAIN SEQUENTIAL
34
Patent #:
8341375
Issue Dt:
12/25/2012
Application #:
11725746
Filing Dt:
03/19/2007
Publication #:
US20080235439
Pub Dt:
09/25/2008
Title:
METHODS FOR CONVERSION OF UPDATE BLOCKS BASED ON ASSOCIATION WITH HOST FILE MANAGEMENT DATA STRUCTURES
35
Patent #:
7987332
Issue Dt:
07/26/2011
Application #:
11726648
Filing Dt:
03/21/2007
Publication #:
US20080235466
Pub Dt:
09/25/2008
Title:
METHODS FOR STORING MEMORY OPERATIONS IN A QUEUE
36
Patent #:
7613857
Issue Dt:
11/03/2009
Application #:
11731511
Filing Dt:
03/30/2007
Publication #:
US20080244179
Pub Dt:
10/02/2008
Title:
MEMORY DEVICE WITH A BUILT-IN MEMORY ARRAY AND A CONNECTOR FOR A REMOVABLE MEMORY DEVICE
37
Patent #:
7603499
Issue Dt:
10/13/2009
Application #:
11731523
Filing Dt:
03/30/2007
Publication #:
US20080244113
Pub Dt:
10/02/2008
Title:
METHOD FOR USING A MEMORY DEVICE WITH A BUILT-IN MEMORY ARRAY AND A CONNECTOR FOR A REMOVABLE MEMORY DEVICE
38
Patent #:
7633799
Issue Dt:
12/15/2009
Application #:
11731531
Filing Dt:
03/30/2007
Publication #:
US20080244202
Pub Dt:
10/02/2008
Title:
METHOD COMBINING LOWER-ENDURANCE/PERFORMANCE AND HIGHER-ENDURANCE/PERFORMANCE INFORMATION STORAGE TO SUPPORT DATA PROCESSING
39
Patent #:
7629253
Issue Dt:
12/08/2009
Application #:
11731579
Filing Dt:
03/30/2007
Publication #:
US20080242080
Pub Dt:
10/02/2008
Title:
METHOD FOR IMPLEMENTING DIFFUSION BARRIER IN 3D MEMORY
40
Patent #:
8124971
Issue Dt:
02/28/2012
Application #:
11731676
Filing Dt:
03/30/2007
Publication #:
US20080237862
Pub Dt:
10/02/2008
Title:
IMPLEMENTATION OF DIFFUSION BARRIER IN 3D MEMORY
41
Patent #:
7643348
Issue Dt:
01/05/2010
Application #:
11733694
Filing Dt:
04/10/2007
Publication #:
US20080253197
Pub Dt:
10/16/2008
Title:
PREDICTIVE PROGRAMMING IN NON-VOLATILE MEMORY
42
Patent #:
7551483
Issue Dt:
06/23/2009
Application #:
11733706
Filing Dt:
04/10/2007
Publication #:
US20080253193
Pub Dt:
10/16/2008
Title:
NON-VOLATILE MEMORY WITH PREDICTIVE PROGRAMMING
43
Patent #:
7397698
Issue Dt:
07/08/2008
Application #:
11735265
Filing Dt:
04/13/2007
Publication #:
US20070195602
Pub Dt:
08/23/2007
Title:
REDUCING FLOATING GATE TO FLOATING GATE COUPLING EFFECT
44
Patent #:
7606071
Issue Dt:
10/20/2009
Application #:
11739501
Filing Dt:
04/24/2007
Publication #:
US20080266963
Pub Dt:
10/30/2008
Title:
COMPENSATING SOURCE VOLTAGE DROP IN NON-VOLATILE STORAGE
45
Patent #:
7606072
Issue Dt:
10/20/2009
Application #:
11739509
Filing Dt:
04/24/2007
Publication #:
US20080266964
Pub Dt:
10/30/2008
Title:
NON-VOLATILE STORAGE WITH COMPENSATION FOR SOURCE VOLTAGE DROP
46
Patent #:
7606079
Issue Dt:
10/20/2009
Application #:
11740091
Filing Dt:
04/25/2007
Publication #:
US20080266973
Pub Dt:
10/30/2008
Title:
REDUCING POWER CONSUMPTION DURING READ OPERATIONS IN NON-VOLATILE STORAGE
47
Patent #:
7440327
Issue Dt:
10/21/2008
Application #:
11740096
Filing Dt:
04/25/2007
Publication #:
US20080266975
Pub Dt:
10/30/2008
Title:
NON-VOLATILE STORAGE WITH REDUCED POWER CONSUMPTION DURING READ OPERATIONS
48
Patent #:
7460404
Issue Dt:
12/02/2008
Application #:
11745082
Filing Dt:
05/07/2007
Publication #:
US20080279007
Pub Dt:
11/13/2008
Title:
BOOSTING FOR NON-VOLATILE STORAGE USING CHANNEL ISOLATION SWITCHING
49
Patent #:
7463522
Issue Dt:
12/09/2008
Application #:
11745092
Filing Dt:
05/07/2007
Publication #:
US20080279008
Pub Dt:
11/13/2008
Title:
NON-VOLATILE STORAGE WITH BOOSTING USING CHANNEL ISOLATION SWITCHING
50
Patent #:
7518919
Issue Dt:
04/14/2009
Application #:
11748077
Filing Dt:
05/14/2007
Publication #:
US20070211532
Pub Dt:
09/13/2007
Title:
FLASH MEMORY DATA CORRECTION AND SCRUB TECHNIQUES
51
Patent #:
7443736
Issue Dt:
10/28/2008
Application #:
11750469
Filing Dt:
05/18/2007
Publication #:
US20070217264
Pub Dt:
09/20/2007
Title:
SUBSTRATE ELECTRON INJECTION TECHNIQUES FOR PROGRAMMING NON-VOLATILE CHARGE STORAGE MEMORY CELLS AND FOR CONTROLLING PROGRAM DISTURB
52
Patent #:
7508714
Issue Dt:
03/24/2009
Application #:
11751567
Filing Dt:
05/21/2007
Publication #:
US20070217263
Pub Dt:
09/20/2007
Title:
MEMORY ARRAY INCORPORATING MIRRORED NAND STRINGS AND NON-SHARED GLOBAL BIT LINES WITHIN A BLOCK
53
Patent #:
7760555
Issue Dt:
07/20/2010
Application #:
11752008
Filing Dt:
05/22/2007
Publication #:
US20070217259
Pub Dt:
09/20/2007
Title:
TRACKING CELLS FOR A MEMORY SYSTEM
54
Patent #:
7681094
Issue Dt:
03/16/2010
Application #:
11752024
Filing Dt:
05/22/2007
Publication #:
US20070226434
Pub Dt:
09/27/2007
Title:
DATA RECOVERY IN A MEMORY SYSTEM USING TRACKING CELLS
55
Patent #:
7863950
Issue Dt:
01/04/2011
Application #:
11752807
Filing Dt:
05/23/2007
Publication #:
US20070216448
Pub Dt:
09/20/2007
Title:
APPARATUS FOR ADAPTIVE TRIP POINT DETECTION
56
Patent #:
7863951
Issue Dt:
01/04/2011
Application #:
11752819
Filing Dt:
05/23/2007
Publication #:
US20070222482
Pub Dt:
09/27/2007
Title:
METHODS FOR ADAPTIVE TRIP POINT DETECTION
57
Patent #:
7447081
Issue Dt:
11/04/2008
Application #:
11753327
Filing Dt:
05/24/2007
Publication #:
US20070230250
Pub Dt:
10/04/2007
Title:
METHODS FOR IMPROVED PROGRAM-VERIFY OPERATIONS IN NON-VOLATILE MEMORIES
58
Patent #:
7656703
Issue Dt:
02/02/2010
Application #:
11753958
Filing Dt:
05/25/2007
Publication #:
US20080291735
Pub Dt:
11/27/2008
Title:
METHOD FOR USING TRANSITIONAL VOLTAGE DURING PROGRAMMING OF NON-VOLATILE STORAGE
59
Patent #:
7706189
Issue Dt:
04/27/2010
Application #:
11753963
Filing Dt:
05/25/2007
Publication #:
US20080291736
Pub Dt:
11/27/2008
Title:
NON-VOLATILE STORAGE SYSTEM WITH TRANSITIONAL VOLTAGE DURING PROGRAMMING
60
Patent #:
8296752
Issue Dt:
10/23/2012
Application #:
11758449
Filing Dt:
06/05/2007
Publication #:
US20070234341
Pub Dt:
10/04/2007
Title:
IMPLEMENTATION OF IN-SYSTEM PROGRAMMING TO UPDATE FIRMWARE 0N MEMORY CARDS
61
Patent #:
7584391
Issue Dt:
09/01/2009
Application #:
11759872
Filing Dt:
06/07/2007
Publication #:
US20070234144
Pub Dt:
10/04/2007
Title:
SMART VERIFY FOR MULTI-STATE MEMORIES
62
Patent #:
7492640
Issue Dt:
02/17/2009
Application #:
11759898
Filing Dt:
06/07/2007
Publication #:
US20080304316
Pub Dt:
12/11/2008
Title:
SENSING WITH BIT-LINE LOCKOUT CONTROL IN NON-VOLATILE MEMORY
63
Patent #:
7489553
Issue Dt:
02/10/2009
Application #:
11759909
Filing Dt:
06/07/2007
Publication #:
US20080304325
Pub Dt:
12/11/2008
Title:
NON-VOLATILE MEMORY WITH IMPROVED SENSING HAVING BIT-LINE LOCKOUT CONTROL
64
Patent #:
7611927
Issue Dt:
11/03/2009
Application #:
11760385
Filing Dt:
06/08/2007
Publication #:
US20080305577
Pub Dt:
12/11/2008
Title:
METHOD OF MINIMIZING KERF WIDTH ON A SEMICONDUCTOR SUBSTRATE PANEL
65
Patent #:
8637972
Issue Dt:
01/28/2014
Application #:
11760405
Filing Dt:
06/08/2007
Publication #:
US20080303166
Pub Dt:
12/11/2008
Title:
TWO-SIDED SUBSTRATE LEAD CONNECTION FOR MINIMIZING KERF WIDTH ON A SEMICONDUCTOR SUBSTRATE PANEL
66
Patent #:
8713283
Issue Dt:
04/29/2014
Application #:
11760469
Filing Dt:
06/08/2007
Publication #:
US20080307155
Pub Dt:
12/11/2008
Title:
METHOD OF INTERFACING A HOST OPERATING THROUGH A LOGICAL ADDRESS SPACE WITH A DIRECT FILE STORAGE MEDIUM
67
Patent #:
7715255
Issue Dt:
05/11/2010
Application #:
11763287
Filing Dt:
06/14/2007
Publication #:
US20080311684
Pub Dt:
12/18/2008
Title:
PROGRAMMABLE CHIP ENABLE AND CHIP ADDRESS IN SEMICONDUCTOR MEMORY
68
Patent #:
7477545
Issue Dt:
01/13/2009
Application #:
11763292
Filing Dt:
06/14/2007
Publication #:
US20080310242
Pub Dt:
12/18/2008
Title:
SYSTEMS FOR PROGRAMMABLE CHIP ENABLE AND CHIP ADDRESS IN SEMICONDUCTOR MEMORY
69
Patent #:
7790534
Issue Dt:
09/07/2010
Application #:
11763671
Filing Dt:
06/15/2007
Publication #:
US20080311710
Pub Dt:
12/18/2008
Title:
METHOD TO FORM LOW-DEFECT POLYCRYSTALLINE SEMICONDUCTOR MATERIAL FOR USE IN A TRANSISTOR
70
Patent #:
8004013
Issue Dt:
08/23/2011
Application #:
11763816
Filing Dt:
06/15/2007
Publication #:
US20080308903
Pub Dt:
12/18/2008
Title:
POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS
71
Patent #:
7855119
Issue Dt:
12/21/2010
Application #:
11763876
Filing Dt:
06/15/2007
Publication #:
US20080311722
Pub Dt:
12/18/2008
Title:
METHOD FOR FORMING POLYCRYSTALLINE THIN FILM BIPOLAR TRANSISTORS
72
Patent #:
8659028
Issue Dt:
02/25/2014
Application #:
11764789
Filing Dt:
06/18/2007
Publication #:
US20070263423
Pub Dt:
11/15/2007
Title:
THREE-DIMENSIONAL MEMORY DEVICE INCORPORATING SEGMENTED ARRAY LINE MEMORY ARRAY
73
Patent #:
7433233
Issue Dt:
10/07/2008
Application #:
11764793
Filing Dt:
06/18/2007
Publication #:
US20070242511
Pub Dt:
10/18/2007
Title:
NAND MEMORY ARRAY INCORPORATING CAPACITANCE BOOSTING OF CHANNEL REGIONS IN UNSELECTED MEMORY CELLS AND METHOD FOR OPERATION OF SAME
74
Patent #:
7537968
Issue Dt:
05/26/2009
Application #:
11765254
Filing Dt:
06/19/2007
Publication #:
US20080318397
Pub Dt:
12/25/2008
Title:
JUNCTION DIODE WITH REDUCED REVERSE CURRENT
75
Patent #:
8423794
Issue Dt:
04/16/2013
Application #:
11765583
Filing Dt:
06/20/2007
Publication #:
US20080162947
Pub Dt:
07/03/2008
Title:
METHOD AND APPARATUS FOR UPGRADING A MEMORY CARD THAT HAS SECURITY MECHANISMS FOR PREVENTING COPYING OF SECURE CONTENT AND APPLICATIONS
76
Patent #:
8143156
Issue Dt:
03/27/2012
Application #:
11765866
Filing Dt:
06/20/2007
Publication #:
US20080318381
Pub Dt:
12/25/2008
Title:
METHODS OF FORMING HIGH DENSITY SEMICONDUCTOR DEVICES USING RECURSIVE SPACER TECHNIQUE
77
Patent #:
7580290
Issue Dt:
08/25/2009
Application #:
11766580
Filing Dt:
06/21/2007
Publication #:
US20080316832
Pub Dt:
12/25/2008
Title:
NON-VOLATILE STORAGE SYSTEM WITH INTELLIGENT CONTROL OF PROGRAM PULSE DURATION
78
Patent #:
7630249
Issue Dt:
12/08/2009
Application #:
11766583
Filing Dt:
06/21/2007
Publication #:
US20080316833
Pub Dt:
12/25/2008
Title:
INTELLIGENT CONTROL OF PROGRAM PULSE DURATION
79
Patent #:
7849383
Issue Dt:
12/07/2010
Application #:
11767587
Filing Dt:
06/25/2007
Publication #:
US20080320346
Pub Dt:
12/25/2008
Title:
SYSTEMS AND METHODS FOR READING NONVOLATILE MEMORY USING MULTIPLE READING SCHEMES
80
Patent #:
7719889
Issue Dt:
05/18/2010
Application #:
11767605
Filing Dt:
06/25/2007
Publication #:
US20080316815
Pub Dt:
12/25/2008
Title:
METHODS OF PROGRAMMING MULTILEVEL CELL NONVOLATILE MEMORY
81
Patent #:
7630252
Issue Dt:
12/08/2009
Application #:
11767611
Filing Dt:
06/25/2007
Publication #:
US20080316816
Pub Dt:
12/25/2008
Title:
SYSTEMS FOR PROGRAMMING MULTILEVEL CELL NONVOLATILE MEMORY
82
Patent #:
7636260
Issue Dt:
12/22/2009
Application #:
11767647
Filing Dt:
06/25/2007
Publication #:
US20080316811
Pub Dt:
12/25/2008
Title:
METHOD FOR OPERATING NON-VOLATILE STORAGE WITH INDIVIDUALLY CONTROLLABLE SHIELD PLATES BETWEEN STORAGE ELEMENTS
83
Patent #:
7808826
Issue Dt:
10/05/2010
Application #:
11767652
Filing Dt:
06/25/2007
Publication #:
US20080316827
Pub Dt:
12/25/2008
Title:
NON-VOLATILE STORAGE WITH INDIVIDUALLY CONTROLLABLE SHIELD PLATES BETWEEN STORAGE ELEMENTS
84
Patent #:
7781286
Issue Dt:
08/24/2010
Application #:
11767661
Filing Dt:
06/25/2007
Publication #:
US20080318379
Pub Dt:
12/25/2008
Title:
METHOD FOR FABRICATING NON-VOLATILE STORAGE WITH INDIVIDUALLY CONTROLLABLE SHIELD PLATES BETWEEN STORAGE ELEMENTS
85
Patent #:
8097504
Issue Dt:
01/17/2012
Application #:
11768461
Filing Dt:
06/26/2007
Publication #:
US20090004843
Pub Dt:
01/01/2009
Title:
METHOD FOR FORMING DUAL BIT LINE METAL LAYERS FOR NON-VOLATILE MEMORY
86
Patent #:
8368137
Issue Dt:
02/05/2013
Application #:
11768468
Filing Dt:
06/26/2007
Publication #:
US20090003025
Pub Dt:
01/01/2009
Title:
DUAL BIT LINE METAL LAYERS FOR NON-VOLATILE MEMORY
87
Patent #:
7718546
Issue Dt:
05/18/2010
Application #:
11769027
Filing Dt:
06/27/2007
Publication #:
US20090004786
Pub Dt:
01/01/2009
Title:
METHOD FOR FABRICATING A 3-D INTEGRATED CIRCUIT USING A HARD MASK OF SILICON-OXYNITRIDE ON AMORPHOUS CARBON
88
Patent #:
8504784
Issue Dt:
08/06/2013
Application #:
11769033
Filing Dt:
06/27/2007
Publication #:
US20090006719
Pub Dt:
01/01/2009
Title:
SCHEDULING METHODS OF PHASED GARBAGE COLLECTION AND HOUSEKEEPING OPERATIONS IN A FLASH MEMORY SYSTEM
89
Patent #:
7861037
Issue Dt:
12/28/2010
Application #:
11769087
Filing Dt:
06/27/2007
Publication #:
US20090006721
Pub Dt:
01/01/2009
Title:
METHODS OF AUTO STARTING WITH PORTABLE MASS STORAGE DEVICE
90
Patent #:
7917697
Issue Dt:
03/29/2011
Application #:
11769099
Filing Dt:
06/27/2007
Publication #:
US20090006722
Pub Dt:
01/01/2009
Title:
AUTO START CONFIGURATION WITH PORTABLE MASS STORAGE DEVICE
91
Patent #:
7772047
Issue Dt:
08/10/2010
Application #:
11769927
Filing Dt:
06/28/2007
Publication #:
US20090004781
Pub Dt:
01/01/2009
Title:
METHOD OF FABRICATING A SEMICONDUCTOR DIE HAVING A REDISTRIBUTION LAYER
92
Patent #:
7763980
Issue Dt:
07/27/2010
Application #:
11769937
Filing Dt:
06/28/2007
Publication #:
US20090001610
Pub Dt:
01/01/2009
Title:
SEMICONDUCTOR DIE HAVING A REDISTRIBUTION LAYER
93
Patent #:
8318535
Issue Dt:
11/27/2012
Application #:
11769942
Filing Dt:
06/28/2007
Publication #:
US20090004776
Pub Dt:
01/01/2009
Title:
METHOD OF FABRICATING A MEMORY CARD USING SIP/SMT HYBRID TECHNOLOGY
94
Patent #:
7772686
Issue Dt:
08/10/2010
Application #:
11769954
Filing Dt:
06/28/2007
Publication #:
US20090001365
Pub Dt:
01/01/2009
Title:
MEMORY CARD FABRICATED USING SIP/SMT HYBRID TECHNOLOGY
95
Patent #:
8058099
Issue Dt:
11/15/2011
Application #:
11770052
Filing Dt:
06/28/2007
Publication #:
US20090004782
Pub Dt:
01/01/2009
Title:
METHOD OF FABRICATING A TWO-SIDED DIE IN A FOUR-SIDED LEADFRAME BASED PACKAGE
96
Patent #:
8395246
Issue Dt:
03/12/2013
Application #:
11770066
Filing Dt:
06/28/2007
Publication #:
US20090001534
Pub Dt:
01/01/2009
Title:
TWO-SIDED DIE IN A FOUR-SIDED LEADFRAME BASED PACKAGE
97
Patent #:
7939382
Issue Dt:
05/10/2011
Application #:
11770078
Filing Dt:
06/28/2007
Publication #:
US20090004785
Pub Dt:
01/01/2009
Title:
METHOD OF FABRICATING A SEMICONDUCTOR PACKAGE HAVING THROUGH HOLES FOR MOLDING BACK SIDE OF PACKAGE
98
Patent #:
7952179
Issue Dt:
05/31/2011
Application #:
11770088
Filing Dt:
06/28/2007
Publication #:
US20090001552
Pub Dt:
01/01/2009
Title:
SEMICONDUCTOR PACKAGE HAVING THROUGH HOLES FOR MOLDING BACK SIDE OF PACKAGE
99
Patent #:
7489542
Issue Dt:
02/10/2009
Application #:
11770466
Filing Dt:
06/28/2007
Publication #:
US20070247916
Pub Dt:
10/25/2007
Title:
SYSTEMS FOR VARIABLE READING IN NON-VOLATILE MEMORY
100
Patent #:
7927990
Issue Dt:
04/19/2011
Application #:
11771137
Filing Dt:
06/29/2007
Publication #:
US20090004844
Pub Dt:
01/01/2009
Title:
FORMING COMPLIMENTARY METAL FEATURES USING CONFORMAL INSULATOR LAYER
Assignor
1
SANDISK TECHNOLOGIES INC
Exec Dt:
05/16/2016
Assignee
1
SANDISK TECHNOLOGIES LLC
6900 DALLAS PARKWAY
SUITE 325
PLANO, TEXAS 75024
Correspondence name and address
SANDISK
951 SANDISK DRIVE
PATENT DEPARTMENT/SIMONA BENJAMIN
MILPITAS, CA 95035

Search Results as of: 05/04/2024 01:47 AM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT