Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 038920/0945 | |
| Pages: | 4 |
| | Recorded: | 06/15/2016 | | |
| Attorney Dkt #: | AM21057TP-US02 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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12/19/2017
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Application #:
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15183202
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Filing Dt:
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06/15/2016
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Publication #:
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Pub Dt:
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10/13/2016
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Title:
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METHOD OF FORMING SPLIT GATE MEMORY WITH IMPROVED RELIABILITY
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Assignee
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| 6501 WILLIAM CANNON DRIVE WEST TX30/OE62 |
| AUSTIN, TEXAS 78735 |
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Correspondence name and address
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FREESCALE SEMICONDUCTOR, INC. LAW DEPART
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6501 WILLIAM CANNON DRIVE WEST TX30/OE62
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AUSTIN, TX 78735
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